| // Code generated from _gen/386.rules using 'go generate'; DO NOT EDIT. |
| |
| package ssa |
| |
| import "math" |
| import "cmd/compile/internal/types" |
| |
| func rewriteValue386(v *Value) bool { |
| switch v.Op { |
| case Op386ADCL: |
| return rewriteValue386_Op386ADCL(v) |
| case Op386ADDL: |
| return rewriteValue386_Op386ADDL(v) |
| case Op386ADDLcarry: |
| return rewriteValue386_Op386ADDLcarry(v) |
| case Op386ADDLconst: |
| return rewriteValue386_Op386ADDLconst(v) |
| case Op386ADDLconstmodify: |
| return rewriteValue386_Op386ADDLconstmodify(v) |
| case Op386ADDLload: |
| return rewriteValue386_Op386ADDLload(v) |
| case Op386ADDLmodify: |
| return rewriteValue386_Op386ADDLmodify(v) |
| case Op386ADDSD: |
| return rewriteValue386_Op386ADDSD(v) |
| case Op386ADDSDload: |
| return rewriteValue386_Op386ADDSDload(v) |
| case Op386ADDSS: |
| return rewriteValue386_Op386ADDSS(v) |
| case Op386ADDSSload: |
| return rewriteValue386_Op386ADDSSload(v) |
| case Op386ANDL: |
| return rewriteValue386_Op386ANDL(v) |
| case Op386ANDLconst: |
| return rewriteValue386_Op386ANDLconst(v) |
| case Op386ANDLconstmodify: |
| return rewriteValue386_Op386ANDLconstmodify(v) |
| case Op386ANDLload: |
| return rewriteValue386_Op386ANDLload(v) |
| case Op386ANDLmodify: |
| return rewriteValue386_Op386ANDLmodify(v) |
| case Op386CMPB: |
| return rewriteValue386_Op386CMPB(v) |
| case Op386CMPBconst: |
| return rewriteValue386_Op386CMPBconst(v) |
| case Op386CMPBload: |
| return rewriteValue386_Op386CMPBload(v) |
| case Op386CMPL: |
| return rewriteValue386_Op386CMPL(v) |
| case Op386CMPLconst: |
| return rewriteValue386_Op386CMPLconst(v) |
| case Op386CMPLload: |
| return rewriteValue386_Op386CMPLload(v) |
| case Op386CMPW: |
| return rewriteValue386_Op386CMPW(v) |
| case Op386CMPWconst: |
| return rewriteValue386_Op386CMPWconst(v) |
| case Op386CMPWload: |
| return rewriteValue386_Op386CMPWload(v) |
| case Op386DIVSD: |
| return rewriteValue386_Op386DIVSD(v) |
| case Op386DIVSDload: |
| return rewriteValue386_Op386DIVSDload(v) |
| case Op386DIVSS: |
| return rewriteValue386_Op386DIVSS(v) |
| case Op386DIVSSload: |
| return rewriteValue386_Op386DIVSSload(v) |
| case Op386LEAL: |
| return rewriteValue386_Op386LEAL(v) |
| case Op386LEAL1: |
| return rewriteValue386_Op386LEAL1(v) |
| case Op386LEAL2: |
| return rewriteValue386_Op386LEAL2(v) |
| case Op386LEAL4: |
| return rewriteValue386_Op386LEAL4(v) |
| case Op386LEAL8: |
| return rewriteValue386_Op386LEAL8(v) |
| case Op386MOVBLSX: |
| return rewriteValue386_Op386MOVBLSX(v) |
| case Op386MOVBLSXload: |
| return rewriteValue386_Op386MOVBLSXload(v) |
| case Op386MOVBLZX: |
| return rewriteValue386_Op386MOVBLZX(v) |
| case Op386MOVBload: |
| return rewriteValue386_Op386MOVBload(v) |
| case Op386MOVBstore: |
| return rewriteValue386_Op386MOVBstore(v) |
| case Op386MOVBstoreconst: |
| return rewriteValue386_Op386MOVBstoreconst(v) |
| case Op386MOVLload: |
| return rewriteValue386_Op386MOVLload(v) |
| case Op386MOVLstore: |
| return rewriteValue386_Op386MOVLstore(v) |
| case Op386MOVLstoreconst: |
| return rewriteValue386_Op386MOVLstoreconst(v) |
| case Op386MOVSDconst: |
| return rewriteValue386_Op386MOVSDconst(v) |
| case Op386MOVSDload: |
| return rewriteValue386_Op386MOVSDload(v) |
| case Op386MOVSDstore: |
| return rewriteValue386_Op386MOVSDstore(v) |
| case Op386MOVSSconst: |
| return rewriteValue386_Op386MOVSSconst(v) |
| case Op386MOVSSload: |
| return rewriteValue386_Op386MOVSSload(v) |
| case Op386MOVSSstore: |
| return rewriteValue386_Op386MOVSSstore(v) |
| case Op386MOVWLSX: |
| return rewriteValue386_Op386MOVWLSX(v) |
| case Op386MOVWLSXload: |
| return rewriteValue386_Op386MOVWLSXload(v) |
| case Op386MOVWLZX: |
| return rewriteValue386_Op386MOVWLZX(v) |
| case Op386MOVWload: |
| return rewriteValue386_Op386MOVWload(v) |
| case Op386MOVWstore: |
| return rewriteValue386_Op386MOVWstore(v) |
| case Op386MOVWstoreconst: |
| return rewriteValue386_Op386MOVWstoreconst(v) |
| case Op386MULL: |
| return rewriteValue386_Op386MULL(v) |
| case Op386MULLconst: |
| return rewriteValue386_Op386MULLconst(v) |
| case Op386MULLload: |
| return rewriteValue386_Op386MULLload(v) |
| case Op386MULSD: |
| return rewriteValue386_Op386MULSD(v) |
| case Op386MULSDload: |
| return rewriteValue386_Op386MULSDload(v) |
| case Op386MULSS: |
| return rewriteValue386_Op386MULSS(v) |
| case Op386MULSSload: |
| return rewriteValue386_Op386MULSSload(v) |
| case Op386NEGL: |
| return rewriteValue386_Op386NEGL(v) |
| case Op386NOTL: |
| return rewriteValue386_Op386NOTL(v) |
| case Op386ORL: |
| return rewriteValue386_Op386ORL(v) |
| case Op386ORLconst: |
| return rewriteValue386_Op386ORLconst(v) |
| case Op386ORLconstmodify: |
| return rewriteValue386_Op386ORLconstmodify(v) |
| case Op386ORLload: |
| return rewriteValue386_Op386ORLload(v) |
| case Op386ORLmodify: |
| return rewriteValue386_Op386ORLmodify(v) |
| case Op386ROLB: |
| return rewriteValue386_Op386ROLB(v) |
| case Op386ROLBconst: |
| return rewriteValue386_Op386ROLBconst(v) |
| case Op386ROLL: |
| return rewriteValue386_Op386ROLL(v) |
| case Op386ROLLconst: |
| return rewriteValue386_Op386ROLLconst(v) |
| case Op386ROLW: |
| return rewriteValue386_Op386ROLW(v) |
| case Op386ROLWconst: |
| return rewriteValue386_Op386ROLWconst(v) |
| case Op386SARB: |
| return rewriteValue386_Op386SARB(v) |
| case Op386SARBconst: |
| return rewriteValue386_Op386SARBconst(v) |
| case Op386SARL: |
| return rewriteValue386_Op386SARL(v) |
| case Op386SARLconst: |
| return rewriteValue386_Op386SARLconst(v) |
| case Op386SARW: |
| return rewriteValue386_Op386SARW(v) |
| case Op386SARWconst: |
| return rewriteValue386_Op386SARWconst(v) |
| case Op386SBBL: |
| return rewriteValue386_Op386SBBL(v) |
| case Op386SBBLcarrymask: |
| return rewriteValue386_Op386SBBLcarrymask(v) |
| case Op386SETA: |
| return rewriteValue386_Op386SETA(v) |
| case Op386SETAE: |
| return rewriteValue386_Op386SETAE(v) |
| case Op386SETB: |
| return rewriteValue386_Op386SETB(v) |
| case Op386SETBE: |
| return rewriteValue386_Op386SETBE(v) |
| case Op386SETEQ: |
| return rewriteValue386_Op386SETEQ(v) |
| case Op386SETG: |
| return rewriteValue386_Op386SETG(v) |
| case Op386SETGE: |
| return rewriteValue386_Op386SETGE(v) |
| case Op386SETL: |
| return rewriteValue386_Op386SETL(v) |
| case Op386SETLE: |
| return rewriteValue386_Op386SETLE(v) |
| case Op386SETNE: |
| return rewriteValue386_Op386SETNE(v) |
| case Op386SHLL: |
| return rewriteValue386_Op386SHLL(v) |
| case Op386SHLLconst: |
| return rewriteValue386_Op386SHLLconst(v) |
| case Op386SHRB: |
| return rewriteValue386_Op386SHRB(v) |
| case Op386SHRBconst: |
| return rewriteValue386_Op386SHRBconst(v) |
| case Op386SHRL: |
| return rewriteValue386_Op386SHRL(v) |
| case Op386SHRLconst: |
| return rewriteValue386_Op386SHRLconst(v) |
| case Op386SHRW: |
| return rewriteValue386_Op386SHRW(v) |
| case Op386SHRWconst: |
| return rewriteValue386_Op386SHRWconst(v) |
| case Op386SUBL: |
| return rewriteValue386_Op386SUBL(v) |
| case Op386SUBLcarry: |
| return rewriteValue386_Op386SUBLcarry(v) |
| case Op386SUBLconst: |
| return rewriteValue386_Op386SUBLconst(v) |
| case Op386SUBLload: |
| return rewriteValue386_Op386SUBLload(v) |
| case Op386SUBLmodify: |
| return rewriteValue386_Op386SUBLmodify(v) |
| case Op386SUBSD: |
| return rewriteValue386_Op386SUBSD(v) |
| case Op386SUBSDload: |
| return rewriteValue386_Op386SUBSDload(v) |
| case Op386SUBSS: |
| return rewriteValue386_Op386SUBSS(v) |
| case Op386SUBSSload: |
| return rewriteValue386_Op386SUBSSload(v) |
| case Op386XORL: |
| return rewriteValue386_Op386XORL(v) |
| case Op386XORLconst: |
| return rewriteValue386_Op386XORLconst(v) |
| case Op386XORLconstmodify: |
| return rewriteValue386_Op386XORLconstmodify(v) |
| case Op386XORLload: |
| return rewriteValue386_Op386XORLload(v) |
| case Op386XORLmodify: |
| return rewriteValue386_Op386XORLmodify(v) |
| case OpAdd16: |
| v.Op = Op386ADDL |
| return true |
| case OpAdd32: |
| v.Op = Op386ADDL |
| return true |
| case OpAdd32F: |
| v.Op = Op386ADDSS |
| return true |
| case OpAdd32carry: |
| v.Op = Op386ADDLcarry |
| return true |
| case OpAdd32withcarry: |
| v.Op = Op386ADCL |
| return true |
| case OpAdd64F: |
| v.Op = Op386ADDSD |
| return true |
| case OpAdd8: |
| v.Op = Op386ADDL |
| return true |
| case OpAddPtr: |
| v.Op = Op386ADDL |
| return true |
| case OpAddr: |
| return rewriteValue386_OpAddr(v) |
| case OpAnd16: |
| v.Op = Op386ANDL |
| return true |
| case OpAnd32: |
| v.Op = Op386ANDL |
| return true |
| case OpAnd8: |
| v.Op = Op386ANDL |
| return true |
| case OpAndB: |
| v.Op = Op386ANDL |
| return true |
| case OpAvg32u: |
| v.Op = Op386AVGLU |
| return true |
| case OpBswap16: |
| return rewriteValue386_OpBswap16(v) |
| case OpBswap32: |
| v.Op = Op386BSWAPL |
| return true |
| case OpClosureCall: |
| v.Op = Op386CALLclosure |
| return true |
| case OpCom16: |
| v.Op = Op386NOTL |
| return true |
| case OpCom32: |
| v.Op = Op386NOTL |
| return true |
| case OpCom8: |
| v.Op = Op386NOTL |
| return true |
| case OpConst16: |
| return rewriteValue386_OpConst16(v) |
| case OpConst32: |
| v.Op = Op386MOVLconst |
| return true |
| case OpConst32F: |
| v.Op = Op386MOVSSconst |
| return true |
| case OpConst64F: |
| v.Op = Op386MOVSDconst |
| return true |
| case OpConst8: |
| return rewriteValue386_OpConst8(v) |
| case OpConstBool: |
| return rewriteValue386_OpConstBool(v) |
| case OpConstNil: |
| return rewriteValue386_OpConstNil(v) |
| case OpCtz16: |
| return rewriteValue386_OpCtz16(v) |
| case OpCtz16NonZero: |
| v.Op = Op386BSFL |
| return true |
| case OpCtz32: |
| v.Op = Op386LoweredCtz32 |
| return true |
| case OpCtz32NonZero: |
| v.Op = Op386BSFL |
| return true |
| case OpCtz8: |
| return rewriteValue386_OpCtz8(v) |
| case OpCtz8NonZero: |
| v.Op = Op386BSFL |
| return true |
| case OpCvt32Fto32: |
| v.Op = Op386CVTTSS2SL |
| return true |
| case OpCvt32Fto64F: |
| v.Op = Op386CVTSS2SD |
| return true |
| case OpCvt32to32F: |
| v.Op = Op386CVTSL2SS |
| return true |
| case OpCvt32to64F: |
| v.Op = Op386CVTSL2SD |
| return true |
| case OpCvt64Fto32: |
| v.Op = Op386CVTTSD2SL |
| return true |
| case OpCvt64Fto32F: |
| v.Op = Op386CVTSD2SS |
| return true |
| case OpCvtBoolToUint8: |
| v.Op = OpCopy |
| return true |
| case OpDiv16: |
| v.Op = Op386DIVW |
| return true |
| case OpDiv16u: |
| v.Op = Op386DIVWU |
| return true |
| case OpDiv32: |
| v.Op = Op386DIVL |
| return true |
| case OpDiv32F: |
| v.Op = Op386DIVSS |
| return true |
| case OpDiv32u: |
| v.Op = Op386DIVLU |
| return true |
| case OpDiv64F: |
| v.Op = Op386DIVSD |
| return true |
| case OpDiv8: |
| return rewriteValue386_OpDiv8(v) |
| case OpDiv8u: |
| return rewriteValue386_OpDiv8u(v) |
| case OpEq16: |
| return rewriteValue386_OpEq16(v) |
| case OpEq32: |
| return rewriteValue386_OpEq32(v) |
| case OpEq32F: |
| return rewriteValue386_OpEq32F(v) |
| case OpEq64F: |
| return rewriteValue386_OpEq64F(v) |
| case OpEq8: |
| return rewriteValue386_OpEq8(v) |
| case OpEqB: |
| return rewriteValue386_OpEqB(v) |
| case OpEqPtr: |
| return rewriteValue386_OpEqPtr(v) |
| case OpGetCallerPC: |
| v.Op = Op386LoweredGetCallerPC |
| return true |
| case OpGetCallerSP: |
| v.Op = Op386LoweredGetCallerSP |
| return true |
| case OpGetClosurePtr: |
| v.Op = Op386LoweredGetClosurePtr |
| return true |
| case OpGetG: |
| v.Op = Op386LoweredGetG |
| return true |
| case OpHmul32: |
| v.Op = Op386HMULL |
| return true |
| case OpHmul32u: |
| v.Op = Op386HMULLU |
| return true |
| case OpInterCall: |
| v.Op = Op386CALLinter |
| return true |
| case OpIsInBounds: |
| return rewriteValue386_OpIsInBounds(v) |
| case OpIsNonNil: |
| return rewriteValue386_OpIsNonNil(v) |
| case OpIsSliceInBounds: |
| return rewriteValue386_OpIsSliceInBounds(v) |
| case OpLeq16: |
| return rewriteValue386_OpLeq16(v) |
| case OpLeq16U: |
| return rewriteValue386_OpLeq16U(v) |
| case OpLeq32: |
| return rewriteValue386_OpLeq32(v) |
| case OpLeq32F: |
| return rewriteValue386_OpLeq32F(v) |
| case OpLeq32U: |
| return rewriteValue386_OpLeq32U(v) |
| case OpLeq64F: |
| return rewriteValue386_OpLeq64F(v) |
| case OpLeq8: |
| return rewriteValue386_OpLeq8(v) |
| case OpLeq8U: |
| return rewriteValue386_OpLeq8U(v) |
| case OpLess16: |
| return rewriteValue386_OpLess16(v) |
| case OpLess16U: |
| return rewriteValue386_OpLess16U(v) |
| case OpLess32: |
| return rewriteValue386_OpLess32(v) |
| case OpLess32F: |
| return rewriteValue386_OpLess32F(v) |
| case OpLess32U: |
| return rewriteValue386_OpLess32U(v) |
| case OpLess64F: |
| return rewriteValue386_OpLess64F(v) |
| case OpLess8: |
| return rewriteValue386_OpLess8(v) |
| case OpLess8U: |
| return rewriteValue386_OpLess8U(v) |
| case OpLoad: |
| return rewriteValue386_OpLoad(v) |
| case OpLocalAddr: |
| return rewriteValue386_OpLocalAddr(v) |
| case OpLsh16x16: |
| return rewriteValue386_OpLsh16x16(v) |
| case OpLsh16x32: |
| return rewriteValue386_OpLsh16x32(v) |
| case OpLsh16x64: |
| return rewriteValue386_OpLsh16x64(v) |
| case OpLsh16x8: |
| return rewriteValue386_OpLsh16x8(v) |
| case OpLsh32x16: |
| return rewriteValue386_OpLsh32x16(v) |
| case OpLsh32x32: |
| return rewriteValue386_OpLsh32x32(v) |
| case OpLsh32x64: |
| return rewriteValue386_OpLsh32x64(v) |
| case OpLsh32x8: |
| return rewriteValue386_OpLsh32x8(v) |
| case OpLsh8x16: |
| return rewriteValue386_OpLsh8x16(v) |
| case OpLsh8x32: |
| return rewriteValue386_OpLsh8x32(v) |
| case OpLsh8x64: |
| return rewriteValue386_OpLsh8x64(v) |
| case OpLsh8x8: |
| return rewriteValue386_OpLsh8x8(v) |
| case OpMod16: |
| v.Op = Op386MODW |
| return true |
| case OpMod16u: |
| v.Op = Op386MODWU |
| return true |
| case OpMod32: |
| v.Op = Op386MODL |
| return true |
| case OpMod32u: |
| v.Op = Op386MODLU |
| return true |
| case OpMod8: |
| return rewriteValue386_OpMod8(v) |
| case OpMod8u: |
| return rewriteValue386_OpMod8u(v) |
| case OpMove: |
| return rewriteValue386_OpMove(v) |
| case OpMul16: |
| v.Op = Op386MULL |
| return true |
| case OpMul32: |
| v.Op = Op386MULL |
| return true |
| case OpMul32F: |
| v.Op = Op386MULSS |
| return true |
| case OpMul32uhilo: |
| v.Op = Op386MULLQU |
| return true |
| case OpMul64F: |
| v.Op = Op386MULSD |
| return true |
| case OpMul8: |
| v.Op = Op386MULL |
| return true |
| case OpNeg16: |
| v.Op = Op386NEGL |
| return true |
| case OpNeg32: |
| v.Op = Op386NEGL |
| return true |
| case OpNeg32F: |
| return rewriteValue386_OpNeg32F(v) |
| case OpNeg64F: |
| return rewriteValue386_OpNeg64F(v) |
| case OpNeg8: |
| v.Op = Op386NEGL |
| return true |
| case OpNeq16: |
| return rewriteValue386_OpNeq16(v) |
| case OpNeq32: |
| return rewriteValue386_OpNeq32(v) |
| case OpNeq32F: |
| return rewriteValue386_OpNeq32F(v) |
| case OpNeq64F: |
| return rewriteValue386_OpNeq64F(v) |
| case OpNeq8: |
| return rewriteValue386_OpNeq8(v) |
| case OpNeqB: |
| return rewriteValue386_OpNeqB(v) |
| case OpNeqPtr: |
| return rewriteValue386_OpNeqPtr(v) |
| case OpNilCheck: |
| v.Op = Op386LoweredNilCheck |
| return true |
| case OpNot: |
| return rewriteValue386_OpNot(v) |
| case OpOffPtr: |
| return rewriteValue386_OpOffPtr(v) |
| case OpOr16: |
| v.Op = Op386ORL |
| return true |
| case OpOr32: |
| v.Op = Op386ORL |
| return true |
| case OpOr8: |
| v.Op = Op386ORL |
| return true |
| case OpOrB: |
| v.Op = Op386ORL |
| return true |
| case OpPanicBounds: |
| return rewriteValue386_OpPanicBounds(v) |
| case OpPanicExtend: |
| return rewriteValue386_OpPanicExtend(v) |
| case OpRotateLeft16: |
| v.Op = Op386ROLW |
| return true |
| case OpRotateLeft32: |
| v.Op = Op386ROLL |
| return true |
| case OpRotateLeft8: |
| v.Op = Op386ROLB |
| return true |
| case OpRound32F: |
| v.Op = OpCopy |
| return true |
| case OpRound64F: |
| v.Op = OpCopy |
| return true |
| case OpRsh16Ux16: |
| return rewriteValue386_OpRsh16Ux16(v) |
| case OpRsh16Ux32: |
| return rewriteValue386_OpRsh16Ux32(v) |
| case OpRsh16Ux64: |
| return rewriteValue386_OpRsh16Ux64(v) |
| case OpRsh16Ux8: |
| return rewriteValue386_OpRsh16Ux8(v) |
| case OpRsh16x16: |
| return rewriteValue386_OpRsh16x16(v) |
| case OpRsh16x32: |
| return rewriteValue386_OpRsh16x32(v) |
| case OpRsh16x64: |
| return rewriteValue386_OpRsh16x64(v) |
| case OpRsh16x8: |
| return rewriteValue386_OpRsh16x8(v) |
| case OpRsh32Ux16: |
| return rewriteValue386_OpRsh32Ux16(v) |
| case OpRsh32Ux32: |
| return rewriteValue386_OpRsh32Ux32(v) |
| case OpRsh32Ux64: |
| return rewriteValue386_OpRsh32Ux64(v) |
| case OpRsh32Ux8: |
| return rewriteValue386_OpRsh32Ux8(v) |
| case OpRsh32x16: |
| return rewriteValue386_OpRsh32x16(v) |
| case OpRsh32x32: |
| return rewriteValue386_OpRsh32x32(v) |
| case OpRsh32x64: |
| return rewriteValue386_OpRsh32x64(v) |
| case OpRsh32x8: |
| return rewriteValue386_OpRsh32x8(v) |
| case OpRsh8Ux16: |
| return rewriteValue386_OpRsh8Ux16(v) |
| case OpRsh8Ux32: |
| return rewriteValue386_OpRsh8Ux32(v) |
| case OpRsh8Ux64: |
| return rewriteValue386_OpRsh8Ux64(v) |
| case OpRsh8Ux8: |
| return rewriteValue386_OpRsh8Ux8(v) |
| case OpRsh8x16: |
| return rewriteValue386_OpRsh8x16(v) |
| case OpRsh8x32: |
| return rewriteValue386_OpRsh8x32(v) |
| case OpRsh8x64: |
| return rewriteValue386_OpRsh8x64(v) |
| case OpRsh8x8: |
| return rewriteValue386_OpRsh8x8(v) |
| case OpSelect0: |
| return rewriteValue386_OpSelect0(v) |
| case OpSelect1: |
| return rewriteValue386_OpSelect1(v) |
| case OpSignExt16to32: |
| v.Op = Op386MOVWLSX |
| return true |
| case OpSignExt8to16: |
| v.Op = Op386MOVBLSX |
| return true |
| case OpSignExt8to32: |
| v.Op = Op386MOVBLSX |
| return true |
| case OpSignmask: |
| return rewriteValue386_OpSignmask(v) |
| case OpSlicemask: |
| return rewriteValue386_OpSlicemask(v) |
| case OpSqrt: |
| v.Op = Op386SQRTSD |
| return true |
| case OpSqrt32: |
| v.Op = Op386SQRTSS |
| return true |
| case OpStaticCall: |
| v.Op = Op386CALLstatic |
| return true |
| case OpStore: |
| return rewriteValue386_OpStore(v) |
| case OpSub16: |
| v.Op = Op386SUBL |
| return true |
| case OpSub32: |
| v.Op = Op386SUBL |
| return true |
| case OpSub32F: |
| v.Op = Op386SUBSS |
| return true |
| case OpSub32carry: |
| v.Op = Op386SUBLcarry |
| return true |
| case OpSub32withcarry: |
| v.Op = Op386SBBL |
| return true |
| case OpSub64F: |
| v.Op = Op386SUBSD |
| return true |
| case OpSub8: |
| v.Op = Op386SUBL |
| return true |
| case OpSubPtr: |
| v.Op = Op386SUBL |
| return true |
| case OpTailCall: |
| v.Op = Op386CALLtail |
| return true |
| case OpTrunc16to8: |
| v.Op = OpCopy |
| return true |
| case OpTrunc32to16: |
| v.Op = OpCopy |
| return true |
| case OpTrunc32to8: |
| v.Op = OpCopy |
| return true |
| case OpWB: |
| v.Op = Op386LoweredWB |
| return true |
| case OpXor16: |
| v.Op = Op386XORL |
| return true |
| case OpXor32: |
| v.Op = Op386XORL |
| return true |
| case OpXor8: |
| v.Op = Op386XORL |
| return true |
| case OpZero: |
| return rewriteValue386_OpZero(v) |
| case OpZeroExt16to32: |
| v.Op = Op386MOVWLZX |
| return true |
| case OpZeroExt8to16: |
| v.Op = Op386MOVBLZX |
| return true |
| case OpZeroExt8to32: |
| v.Op = Op386MOVBLZX |
| return true |
| case OpZeromask: |
| return rewriteValue386_OpZeromask(v) |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADCL(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (ADCL x (MOVLconst [c]) f) |
| // result: (ADCLconst [c] x f) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386MOVLconst { |
| continue |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| f := v_2 |
| v.reset(Op386ADCLconst) |
| v.AuxInt = int32ToAuxInt(c) |
| v.AddArg2(x, f) |
| return true |
| } |
| break |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDL(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (ADDL x (MOVLconst <t> [c])) |
| // cond: !t.IsPtr() |
| // result: (ADDLconst [c] x) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386MOVLconst { |
| continue |
| } |
| t := v_1.Type |
| c := auxIntToInt32(v_1.AuxInt) |
| if !(!t.IsPtr()) { |
| continue |
| } |
| v.reset(Op386ADDLconst) |
| v.AuxInt = int32ToAuxInt(c) |
| v.AddArg(x) |
| return true |
| } |
| break |
| } |
| // match: (ADDL x (SHLLconst [3] y)) |
| // result: (LEAL8 x y) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 3 { |
| continue |
| } |
| y := v_1.Args[0] |
| v.reset(Op386LEAL8) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (ADDL x (SHLLconst [2] y)) |
| // result: (LEAL4 x y) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 2 { |
| continue |
| } |
| y := v_1.Args[0] |
| v.reset(Op386LEAL4) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (ADDL x (SHLLconst [1] y)) |
| // result: (LEAL2 x y) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 1 { |
| continue |
| } |
| y := v_1.Args[0] |
| v.reset(Op386LEAL2) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (ADDL x (ADDL y y)) |
| // result: (LEAL2 x y) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386ADDL { |
| continue |
| } |
| y := v_1.Args[1] |
| if y != v_1.Args[0] { |
| continue |
| } |
| v.reset(Op386LEAL2) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (ADDL x (ADDL x y)) |
| // result: (LEAL2 y x) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386ADDL { |
| continue |
| } |
| _ = v_1.Args[1] |
| v_1_0 := v_1.Args[0] |
| v_1_1 := v_1.Args[1] |
| for _i1 := 0; _i1 <= 1; _i1, v_1_0, v_1_1 = _i1+1, v_1_1, v_1_0 { |
| if x != v_1_0 { |
| continue |
| } |
| y := v_1_1 |
| v.reset(Op386LEAL2) |
| v.AddArg2(y, x) |
| return true |
| } |
| } |
| break |
| } |
| // match: (ADDL (ADDLconst [c] x) y) |
| // result: (LEAL1 [c] x y) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| if v_0.Op != Op386ADDLconst { |
| continue |
| } |
| c := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| y := v_1 |
| v.reset(Op386LEAL1) |
| v.AuxInt = int32ToAuxInt(c) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (ADDL x (LEAL [c] {s} y)) |
| // cond: x.Op != OpSB && y.Op != OpSB |
| // result: (LEAL1 [c] {s} x y) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386LEAL { |
| continue |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| s := auxToSym(v_1.Aux) |
| y := v_1.Args[0] |
| if !(x.Op != OpSB && y.Op != OpSB) { |
| continue |
| } |
| v.reset(Op386LEAL1) |
| v.AuxInt = int32ToAuxInt(c) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (ADDL x l:(MOVLload [off] {sym} ptr mem)) |
| // cond: canMergeLoadClobber(v, l, x) && clobber(l) |
| // result: (ADDLload x [off] {sym} ptr mem) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| l := v_1 |
| if l.Op != Op386MOVLload { |
| continue |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(canMergeLoadClobber(v, l, x) && clobber(l)) { |
| continue |
| } |
| v.reset(Op386ADDLload) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(x, ptr, mem) |
| return true |
| } |
| break |
| } |
| // match: (ADDL x (NEGL y)) |
| // result: (SUBL x y) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386NEGL { |
| continue |
| } |
| y := v_1.Args[0] |
| v.reset(Op386SUBL) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDLcarry(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (ADDLcarry x (MOVLconst [c])) |
| // result: (ADDLconstcarry [c] x) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386MOVLconst { |
| continue |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| v.reset(Op386ADDLconstcarry) |
| v.AuxInt = int32ToAuxInt(c) |
| v.AddArg(x) |
| return true |
| } |
| break |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDLconst(v *Value) bool { |
| v_0 := v.Args[0] |
| // match: (ADDLconst [c] (ADDL x y)) |
| // result: (LEAL1 [c] x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386ADDL { |
| break |
| } |
| y := v_0.Args[1] |
| x := v_0.Args[0] |
| v.reset(Op386LEAL1) |
| v.AuxInt = int32ToAuxInt(c) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (ADDLconst [c] (LEAL [d] {s} x)) |
| // cond: is32Bit(int64(c)+int64(d)) |
| // result: (LEAL [c+d] {s} x) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| s := auxToSym(v_0.Aux) |
| x := v_0.Args[0] |
| if !(is32Bit(int64(c) + int64(d))) { |
| break |
| } |
| v.reset(Op386LEAL) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg(x) |
| return true |
| } |
| // match: (ADDLconst [c] x:(SP)) |
| // result: (LEAL [c] x) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| x := v_0 |
| if x.Op != OpSP { |
| break |
| } |
| v.reset(Op386LEAL) |
| v.AuxInt = int32ToAuxInt(c) |
| v.AddArg(x) |
| return true |
| } |
| // match: (ADDLconst [c] (LEAL1 [d] {s} x y)) |
| // cond: is32Bit(int64(c)+int64(d)) |
| // result: (LEAL1 [c+d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386LEAL1 { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| s := auxToSym(v_0.Aux) |
| y := v_0.Args[1] |
| x := v_0.Args[0] |
| if !(is32Bit(int64(c) + int64(d))) { |
| break |
| } |
| v.reset(Op386LEAL1) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (ADDLconst [c] (LEAL2 [d] {s} x y)) |
| // cond: is32Bit(int64(c)+int64(d)) |
| // result: (LEAL2 [c+d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386LEAL2 { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| s := auxToSym(v_0.Aux) |
| y := v_0.Args[1] |
| x := v_0.Args[0] |
| if !(is32Bit(int64(c) + int64(d))) { |
| break |
| } |
| v.reset(Op386LEAL2) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (ADDLconst [c] (LEAL4 [d] {s} x y)) |
| // cond: is32Bit(int64(c)+int64(d)) |
| // result: (LEAL4 [c+d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386LEAL4 { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| s := auxToSym(v_0.Aux) |
| y := v_0.Args[1] |
| x := v_0.Args[0] |
| if !(is32Bit(int64(c) + int64(d))) { |
| break |
| } |
| v.reset(Op386LEAL4) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (ADDLconst [c] (LEAL8 [d] {s} x y)) |
| // cond: is32Bit(int64(c)+int64(d)) |
| // result: (LEAL8 [c+d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386LEAL8 { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| s := auxToSym(v_0.Aux) |
| y := v_0.Args[1] |
| x := v_0.Args[0] |
| if !(is32Bit(int64(c) + int64(d))) { |
| break |
| } |
| v.reset(Op386LEAL8) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (ADDLconst [c] x) |
| // cond: c==0 |
| // result: x |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| x := v_0 |
| if !(c == 0) { |
| break |
| } |
| v.copyOf(x) |
| return true |
| } |
| // match: (ADDLconst [c] (MOVLconst [d])) |
| // result: (MOVLconst [c+d]) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| v.reset(Op386MOVLconst) |
| v.AuxInt = int32ToAuxInt(c + d) |
| return true |
| } |
| // match: (ADDLconst [c] (ADDLconst [d] x)) |
| // result: (ADDLconst [c+d] x) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| v.reset(Op386ADDLconst) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.AddArg(x) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDLconstmodify(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (ADDLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem) |
| // cond: valoff1.canAdd32(off2) |
| // result: (ADDLconstmodify [valoff1.addOffset32(off2)] {sym} base mem) |
| for { |
| valoff1 := auxIntToValAndOff(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| base := v_0.Args[0] |
| mem := v_1 |
| if !(valoff1.canAdd32(off2)) { |
| break |
| } |
| v.reset(Op386ADDLconstmodify) |
| v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(base, mem) |
| return true |
| } |
| // match: (ADDLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem) |
| // cond: valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (ADDLconstmodify [valoff1.addOffset32(off2)] {mergeSym(sym1,sym2)} base mem) |
| for { |
| valoff1 := auxIntToValAndOff(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| mem := v_1 |
| if !(valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386ADDLconstmodify) |
| v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2)) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDLload(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (ADDLload [off1] {sym} val (ADDLconst [off2] base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (ADDLload [off1+off2] {sym} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386ADDLload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| // match: (ADDLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (ADDLload [off1+off2] {mergeSym(sym1,sym2)} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386ADDLload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDLmodify(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (ADDLmodify [off1] {sym} (ADDLconst [off2] base) val mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (ADDLmodify [off1+off2] {sym} base val mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| base := v_0.Args[0] |
| val := v_1 |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386ADDLmodify) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(base, val, mem) |
| return true |
| } |
| // match: (ADDLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (ADDLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| val := v_1 |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386ADDLmodify) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(base, val, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDSD(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (ADDSD x l:(MOVSDload [off] {sym} ptr mem)) |
| // cond: canMergeLoadClobber(v, l, x) && clobber(l) |
| // result: (ADDSDload x [off] {sym} ptr mem) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| l := v_1 |
| if l.Op != Op386MOVSDload { |
| continue |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(canMergeLoadClobber(v, l, x) && clobber(l)) { |
| continue |
| } |
| v.reset(Op386ADDSDload) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(x, ptr, mem) |
| return true |
| } |
| break |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDSDload(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (ADDSDload [off1] {sym} val (ADDLconst [off2] base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (ADDSDload [off1+off2] {sym} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386ADDSDload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| // match: (ADDSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (ADDSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386ADDSDload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDSS(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (ADDSS x l:(MOVSSload [off] {sym} ptr mem)) |
| // cond: canMergeLoadClobber(v, l, x) && clobber(l) |
| // result: (ADDSSload x [off] {sym} ptr mem) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| l := v_1 |
| if l.Op != Op386MOVSSload { |
| continue |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(canMergeLoadClobber(v, l, x) && clobber(l)) { |
| continue |
| } |
| v.reset(Op386ADDSSload) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(x, ptr, mem) |
| return true |
| } |
| break |
| } |
| return false |
| } |
| func rewriteValue386_Op386ADDSSload(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (ADDSSload [off1] {sym} val (ADDLconst [off2] base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (ADDSSload [off1+off2] {sym} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386ADDSSload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| // match: (ADDSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (ADDSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386ADDSSload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ANDL(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (ANDL x (MOVLconst [c])) |
| // result: (ANDLconst [c] x) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386MOVLconst { |
| continue |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| v.reset(Op386ANDLconst) |
| v.AuxInt = int32ToAuxInt(c) |
| v.AddArg(x) |
| return true |
| } |
| break |
| } |
| // match: (ANDL x l:(MOVLload [off] {sym} ptr mem)) |
| // cond: canMergeLoadClobber(v, l, x) && clobber(l) |
| // result: (ANDLload x [off] {sym} ptr mem) |
| for { |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| l := v_1 |
| if l.Op != Op386MOVLload { |
| continue |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(canMergeLoadClobber(v, l, x) && clobber(l)) { |
| continue |
| } |
| v.reset(Op386ANDLload) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(x, ptr, mem) |
| return true |
| } |
| break |
| } |
| // match: (ANDL x x) |
| // result: x |
| for { |
| x := v_0 |
| if x != v_1 { |
| break |
| } |
| v.copyOf(x) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ANDLconst(v *Value) bool { |
| v_0 := v.Args[0] |
| // match: (ANDLconst [c] (ANDLconst [d] x)) |
| // result: (ANDLconst [c & d] x) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386ANDLconst { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| v.reset(Op386ANDLconst) |
| v.AuxInt = int32ToAuxInt(c & d) |
| v.AddArg(x) |
| return true |
| } |
| // match: (ANDLconst [c] _) |
| // cond: c==0 |
| // result: (MOVLconst [0]) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if !(c == 0) { |
| break |
| } |
| v.reset(Op386MOVLconst) |
| v.AuxInt = int32ToAuxInt(0) |
| return true |
| } |
| // match: (ANDLconst [c] x) |
| // cond: c==-1 |
| // result: x |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| x := v_0 |
| if !(c == -1) { |
| break |
| } |
| v.copyOf(x) |
| return true |
| } |
| // match: (ANDLconst [c] (MOVLconst [d])) |
| // result: (MOVLconst [c&d]) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| v.reset(Op386MOVLconst) |
| v.AuxInt = int32ToAuxInt(c & d) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ANDLconstmodify(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (ANDLconstmodify [valoff1] {sym} (ADDLconst [off2] base) mem) |
| // cond: valoff1.canAdd32(off2) |
| // result: (ANDLconstmodify [valoff1.addOffset32(off2)] {sym} base mem) |
| for { |
| valoff1 := auxIntToValAndOff(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| base := v_0.Args[0] |
| mem := v_1 |
| if !(valoff1.canAdd32(off2)) { |
| break |
| } |
| v.reset(Op386ANDLconstmodify) |
| v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(base, mem) |
| return true |
| } |
| // match: (ANDLconstmodify [valoff1] {sym1} (LEAL [off2] {sym2} base) mem) |
| // cond: valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (ANDLconstmodify [valoff1.addOffset32(off2)] {mergeSym(sym1,sym2)} base mem) |
| for { |
| valoff1 := auxIntToValAndOff(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| mem := v_1 |
| if !(valoff1.canAdd32(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386ANDLconstmodify) |
| v.AuxInt = valAndOffToAuxInt(valoff1.addOffset32(off2)) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ANDLload(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (ANDLload [off1] {sym} val (ADDLconst [off2] base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (ANDLload [off1+off2] {sym} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386ANDLload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| // match: (ANDLload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (ANDLload [off1+off2] {mergeSym(sym1,sym2)} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386ANDLload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386ANDLmodify(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (ANDLmodify [off1] {sym} (ADDLconst [off2] base) val mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (ANDLmodify [off1+off2] {sym} base val mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| base := v_0.Args[0] |
| val := v_1 |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386ANDLmodify) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(base, val, mem) |
| return true |
| } |
| // match: (ANDLmodify [off1] {sym1} (LEAL [off2] {sym2} base) val mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (ANDLmodify [off1+off2] {mergeSym(sym1,sym2)} base val mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| val := v_1 |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386ANDLmodify) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(base, val, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386CMPB(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| // match: (CMPB x (MOVLconst [c])) |
| // result: (CMPBconst x [int8(c)]) |
| for { |
| x := v_0 |
| if v_1.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| v.reset(Op386CMPBconst) |
| v.AuxInt = int8ToAuxInt(int8(c)) |
| v.AddArg(x) |
| return true |
| } |
| // match: (CMPB (MOVLconst [c]) x) |
| // result: (InvertFlags (CMPBconst x [int8(c)])) |
| for { |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_0.AuxInt) |
| x := v_1 |
| v.reset(Op386InvertFlags) |
| v0 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags) |
| v0.AuxInt = int8ToAuxInt(int8(c)) |
| v0.AddArg(x) |
| v.AddArg(v0) |
| return true |
| } |
| // match: (CMPB x y) |
| // cond: canonLessThan(x,y) |
| // result: (InvertFlags (CMPB y x)) |
| for { |
| x := v_0 |
| y := v_1 |
| if !(canonLessThan(x, y)) { |
| break |
| } |
| v.reset(Op386InvertFlags) |
| v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags) |
| v0.AddArg2(y, x) |
| v.AddArg(v0) |
| return true |
| } |
| // match: (CMPB l:(MOVBload {sym} [off] ptr mem) x) |
| // cond: canMergeLoad(v, l) && clobber(l) |
| // result: (CMPBload {sym} [off] ptr x mem) |
| for { |
| l := v_0 |
| if l.Op != Op386MOVBload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| x := v_1 |
| if !(canMergeLoad(v, l) && clobber(l)) { |
| break |
| } |
| v.reset(Op386CMPBload) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (CMPB x l:(MOVBload {sym} [off] ptr mem)) |
| // cond: canMergeLoad(v, l) && clobber(l) |
| // result: (InvertFlags (CMPBload {sym} [off] ptr x mem)) |
| for { |
| x := v_0 |
| l := v_1 |
| if l.Op != Op386MOVBload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(canMergeLoad(v, l) && clobber(l)) { |
| break |
| } |
| v.reset(Op386InvertFlags) |
| v0 := b.NewValue0(l.Pos, Op386CMPBload, types.TypeFlags) |
| v0.AuxInt = int32ToAuxInt(off) |
| v0.Aux = symToAux(sym) |
| v0.AddArg3(ptr, x, mem) |
| v.AddArg(v0) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386CMPBconst(v *Value) bool { |
| v_0 := v.Args[0] |
| b := v.Block |
| // match: (CMPBconst (MOVLconst [x]) [y]) |
| // cond: int8(x)==y |
| // result: (FlagEQ) |
| for { |
| y := auxIntToInt8(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int8(x) == y) { |
| break |
| } |
| v.reset(Op386FlagEQ) |
| return true |
| } |
| // match: (CMPBconst (MOVLconst [x]) [y]) |
| // cond: int8(x)<y && uint8(x)<uint8(y) |
| // result: (FlagLT_ULT) |
| for { |
| y := auxIntToInt8(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int8(x) < y && uint8(x) < uint8(y)) { |
| break |
| } |
| v.reset(Op386FlagLT_ULT) |
| return true |
| } |
| // match: (CMPBconst (MOVLconst [x]) [y]) |
| // cond: int8(x)<y && uint8(x)>uint8(y) |
| // result: (FlagLT_UGT) |
| for { |
| y := auxIntToInt8(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int8(x) < y && uint8(x) > uint8(y)) { |
| break |
| } |
| v.reset(Op386FlagLT_UGT) |
| return true |
| } |
| // match: (CMPBconst (MOVLconst [x]) [y]) |
| // cond: int8(x)>y && uint8(x)<uint8(y) |
| // result: (FlagGT_ULT) |
| for { |
| y := auxIntToInt8(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int8(x) > y && uint8(x) < uint8(y)) { |
| break |
| } |
| v.reset(Op386FlagGT_ULT) |
| return true |
| } |
| // match: (CMPBconst (MOVLconst [x]) [y]) |
| // cond: int8(x)>y && uint8(x)>uint8(y) |
| // result: (FlagGT_UGT) |
| for { |
| y := auxIntToInt8(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int8(x) > y && uint8(x) > uint8(y)) { |
| break |
| } |
| v.reset(Op386FlagGT_UGT) |
| return true |
| } |
| // match: (CMPBconst (ANDLconst _ [m]) [n]) |
| // cond: 0 <= int8(m) && int8(m) < n |
| // result: (FlagLT_ULT) |
| for { |
| n := auxIntToInt8(v.AuxInt) |
| if v_0.Op != Op386ANDLconst { |
| break |
| } |
| m := auxIntToInt32(v_0.AuxInt) |
| if !(0 <= int8(m) && int8(m) < n) { |
| break |
| } |
| v.reset(Op386FlagLT_ULT) |
| return true |
| } |
| // match: (CMPBconst l:(ANDL x y) [0]) |
| // cond: l.Uses==1 |
| // result: (TESTB x y) |
| for { |
| if auxIntToInt8(v.AuxInt) != 0 { |
| break |
| } |
| l := v_0 |
| if l.Op != Op386ANDL { |
| break |
| } |
| y := l.Args[1] |
| x := l.Args[0] |
| if !(l.Uses == 1) { |
| break |
| } |
| v.reset(Op386TESTB) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (CMPBconst l:(ANDLconst [c] x) [0]) |
| // cond: l.Uses==1 |
| // result: (TESTBconst [int8(c)] x) |
| for { |
| if auxIntToInt8(v.AuxInt) != 0 { |
| break |
| } |
| l := v_0 |
| if l.Op != Op386ANDLconst { |
| break |
| } |
| c := auxIntToInt32(l.AuxInt) |
| x := l.Args[0] |
| if !(l.Uses == 1) { |
| break |
| } |
| v.reset(Op386TESTBconst) |
| v.AuxInt = int8ToAuxInt(int8(c)) |
| v.AddArg(x) |
| return true |
| } |
| // match: (CMPBconst x [0]) |
| // result: (TESTB x x) |
| for { |
| if auxIntToInt8(v.AuxInt) != 0 { |
| break |
| } |
| x := v_0 |
| v.reset(Op386TESTB) |
| v.AddArg2(x, x) |
| return true |
| } |
| // match: (CMPBconst l:(MOVBload {sym} [off] ptr mem) [c]) |
| // cond: l.Uses == 1 && clobber(l) |
| // result: @l.Block (CMPBconstload {sym} [makeValAndOff(int32(c),off)] ptr mem) |
| for { |
| c := auxIntToInt8(v.AuxInt) |
| l := v_0 |
| if l.Op != Op386MOVBload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(l.Uses == 1 && clobber(l)) { |
| break |
| } |
| b = l.Block |
| v0 := b.NewValue0(l.Pos, Op386CMPBconstload, types.TypeFlags) |
| v.copyOf(v0) |
| v0.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(c), off)) |
| v0.Aux = symToAux(sym) |
| v0.AddArg2(ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386CMPBload(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (CMPBload {sym} [off] ptr (MOVLconst [c]) mem) |
| // result: (CMPBconstload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| mem := v_2 |
| v.reset(Op386CMPBconstload) |
| v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386CMPL(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| // match: (CMPL x (MOVLconst [c])) |
| // result: (CMPLconst x [c]) |
| for { |
| x := v_0 |
| if v_1.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| v.reset(Op386CMPLconst) |
| v.AuxInt = int32ToAuxInt(c) |
| v.AddArg(x) |
| return true |
| } |
| // match: (CMPL (MOVLconst [c]) x) |
| // result: (InvertFlags (CMPLconst x [c])) |
| for { |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_0.AuxInt) |
| x := v_1 |
| v.reset(Op386InvertFlags) |
| v0 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags) |
| v0.AuxInt = int32ToAuxInt(c) |
| v0.AddArg(x) |
| v.AddArg(v0) |
| return true |
| } |
| // match: (CMPL x y) |
| // cond: canonLessThan(x,y) |
| // result: (InvertFlags (CMPL y x)) |
| for { |
| x := v_0 |
| y := v_1 |
| if !(canonLessThan(x, y)) { |
| break |
| } |
| v.reset(Op386InvertFlags) |
| v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags) |
| v0.AddArg2(y, x) |
| v.AddArg(v0) |
| return true |
| } |
| // match: (CMPL l:(MOVLload {sym} [off] ptr mem) x) |
| // cond: canMergeLoad(v, l) && clobber(l) |
| // result: (CMPLload {sym} [off] ptr x mem) |
| for { |
| l := v_0 |
| if l.Op != Op386MOVLload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| x := v_1 |
| if !(canMergeLoad(v, l) && clobber(l)) { |
| break |
| } |
| v.reset(Op386CMPLload) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (CMPL x l:(MOVLload {sym} [off] ptr mem)) |
| // cond: canMergeLoad(v, l) && clobber(l) |
| // result: (InvertFlags (CMPLload {sym} [off] ptr x mem)) |
| for { |
| x := v_0 |
| l := v_1 |
| if l.Op != Op386MOVLload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(canMergeLoad(v, l) && clobber(l)) { |
| break |
| } |
| v.reset(Op386InvertFlags) |
| v0 := b.NewValue0(l.Pos, Op386CMPLload, types.TypeFlags) |
| v0.AuxInt = int32ToAuxInt(off) |
| v0.Aux = symToAux(sym) |
| v0.AddArg3(ptr, x, mem) |
| v.AddArg(v0) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386CMPLconst(v *Value) bool { |
| v_0 := v.Args[0] |
| b := v.Block |
| // match: (CMPLconst (MOVLconst [x]) [y]) |
| // cond: x==y |
| // result: (FlagEQ) |
| for { |
| y := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(x == y) { |
| break |
| } |
| v.reset(Op386FlagEQ) |
| return true |
| } |
| // match: (CMPLconst (MOVLconst [x]) [y]) |
| // cond: x<y && uint32(x)<uint32(y) |
| // result: (FlagLT_ULT) |
| for { |
| y := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(x < y && uint32(x) < uint32(y)) { |
| break |
| } |
| v.reset(Op386FlagLT_ULT) |
| return true |
| } |
| // match: (CMPLconst (MOVLconst [x]) [y]) |
| // cond: x<y && uint32(x)>uint32(y) |
| // result: (FlagLT_UGT) |
| for { |
| y := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(x < y && uint32(x) > uint32(y)) { |
| break |
| } |
| v.reset(Op386FlagLT_UGT) |
| return true |
| } |
| // match: (CMPLconst (MOVLconst [x]) [y]) |
| // cond: x>y && uint32(x)<uint32(y) |
| // result: (FlagGT_ULT) |
| for { |
| y := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(x > y && uint32(x) < uint32(y)) { |
| break |
| } |
| v.reset(Op386FlagGT_ULT) |
| return true |
| } |
| // match: (CMPLconst (MOVLconst [x]) [y]) |
| // cond: x>y && uint32(x)>uint32(y) |
| // result: (FlagGT_UGT) |
| for { |
| y := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(x > y && uint32(x) > uint32(y)) { |
| break |
| } |
| v.reset(Op386FlagGT_UGT) |
| return true |
| } |
| // match: (CMPLconst (SHRLconst _ [c]) [n]) |
| // cond: 0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n) |
| // result: (FlagLT_ULT) |
| for { |
| n := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386SHRLconst { |
| break |
| } |
| c := auxIntToInt32(v_0.AuxInt) |
| if !(0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)) { |
| break |
| } |
| v.reset(Op386FlagLT_ULT) |
| return true |
| } |
| // match: (CMPLconst (ANDLconst _ [m]) [n]) |
| // cond: 0 <= m && m < n |
| // result: (FlagLT_ULT) |
| for { |
| n := auxIntToInt32(v.AuxInt) |
| if v_0.Op != Op386ANDLconst { |
| break |
| } |
| m := auxIntToInt32(v_0.AuxInt) |
| if !(0 <= m && m < n) { |
| break |
| } |
| v.reset(Op386FlagLT_ULT) |
| return true |
| } |
| // match: (CMPLconst l:(ANDL x y) [0]) |
| // cond: l.Uses==1 |
| // result: (TESTL x y) |
| for { |
| if auxIntToInt32(v.AuxInt) != 0 { |
| break |
| } |
| l := v_0 |
| if l.Op != Op386ANDL { |
| break |
| } |
| y := l.Args[1] |
| x := l.Args[0] |
| if !(l.Uses == 1) { |
| break |
| } |
| v.reset(Op386TESTL) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (CMPLconst l:(ANDLconst [c] x) [0]) |
| // cond: l.Uses==1 |
| // result: (TESTLconst [c] x) |
| for { |
| if auxIntToInt32(v.AuxInt) != 0 { |
| break |
| } |
| l := v_0 |
| if l.Op != Op386ANDLconst { |
| break |
| } |
| c := auxIntToInt32(l.AuxInt) |
| x := l.Args[0] |
| if !(l.Uses == 1) { |
| break |
| } |
| v.reset(Op386TESTLconst) |
| v.AuxInt = int32ToAuxInt(c) |
| v.AddArg(x) |
| return true |
| } |
| // match: (CMPLconst x [0]) |
| // result: (TESTL x x) |
| for { |
| if auxIntToInt32(v.AuxInt) != 0 { |
| break |
| } |
| x := v_0 |
| v.reset(Op386TESTL) |
| v.AddArg2(x, x) |
| return true |
| } |
| // match: (CMPLconst l:(MOVLload {sym} [off] ptr mem) [c]) |
| // cond: l.Uses == 1 && clobber(l) |
| // result: @l.Block (CMPLconstload {sym} [makeValAndOff(int32(c),off)] ptr mem) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| l := v_0 |
| if l.Op != Op386MOVLload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(l.Uses == 1 && clobber(l)) { |
| break |
| } |
| b = l.Block |
| v0 := b.NewValue0(l.Pos, Op386CMPLconstload, types.TypeFlags) |
| v.copyOf(v0) |
| v0.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(c), off)) |
| v0.Aux = symToAux(sym) |
| v0.AddArg2(ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386CMPLload(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (CMPLload {sym} [off] ptr (MOVLconst [c]) mem) |
| // result: (CMPLconstload {sym} [makeValAndOff(c,off)] ptr mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| mem := v_2 |
| v.reset(Op386CMPLconstload) |
| v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386CMPW(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| // match: (CMPW x (MOVLconst [c])) |
| // result: (CMPWconst x [int16(c)]) |
| for { |
| x := v_0 |
| if v_1.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| v.reset(Op386CMPWconst) |
| v.AuxInt = int16ToAuxInt(int16(c)) |
| v.AddArg(x) |
| return true |
| } |
| // match: (CMPW (MOVLconst [c]) x) |
| // result: (InvertFlags (CMPWconst x [int16(c)])) |
| for { |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_0.AuxInt) |
| x := v_1 |
| v.reset(Op386InvertFlags) |
| v0 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags) |
| v0.AuxInt = int16ToAuxInt(int16(c)) |
| v0.AddArg(x) |
| v.AddArg(v0) |
| return true |
| } |
| // match: (CMPW x y) |
| // cond: canonLessThan(x,y) |
| // result: (InvertFlags (CMPW y x)) |
| for { |
| x := v_0 |
| y := v_1 |
| if !(canonLessThan(x, y)) { |
| break |
| } |
| v.reset(Op386InvertFlags) |
| v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags) |
| v0.AddArg2(y, x) |
| v.AddArg(v0) |
| return true |
| } |
| // match: (CMPW l:(MOVWload {sym} [off] ptr mem) x) |
| // cond: canMergeLoad(v, l) && clobber(l) |
| // result: (CMPWload {sym} [off] ptr x mem) |
| for { |
| l := v_0 |
| if l.Op != Op386MOVWload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| x := v_1 |
| if !(canMergeLoad(v, l) && clobber(l)) { |
| break |
| } |
| v.reset(Op386CMPWload) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (CMPW x l:(MOVWload {sym} [off] ptr mem)) |
| // cond: canMergeLoad(v, l) && clobber(l) |
| // result: (InvertFlags (CMPWload {sym} [off] ptr x mem)) |
| for { |
| x := v_0 |
| l := v_1 |
| if l.Op != Op386MOVWload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(canMergeLoad(v, l) && clobber(l)) { |
| break |
| } |
| v.reset(Op386InvertFlags) |
| v0 := b.NewValue0(l.Pos, Op386CMPWload, types.TypeFlags) |
| v0.AuxInt = int32ToAuxInt(off) |
| v0.Aux = symToAux(sym) |
| v0.AddArg3(ptr, x, mem) |
| v.AddArg(v0) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386CMPWconst(v *Value) bool { |
| v_0 := v.Args[0] |
| b := v.Block |
| // match: (CMPWconst (MOVLconst [x]) [y]) |
| // cond: int16(x)==y |
| // result: (FlagEQ) |
| for { |
| y := auxIntToInt16(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int16(x) == y) { |
| break |
| } |
| v.reset(Op386FlagEQ) |
| return true |
| } |
| // match: (CMPWconst (MOVLconst [x]) [y]) |
| // cond: int16(x)<y && uint16(x)<uint16(y) |
| // result: (FlagLT_ULT) |
| for { |
| y := auxIntToInt16(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int16(x) < y && uint16(x) < uint16(y)) { |
| break |
| } |
| v.reset(Op386FlagLT_ULT) |
| return true |
| } |
| // match: (CMPWconst (MOVLconst [x]) [y]) |
| // cond: int16(x)<y && uint16(x)>uint16(y) |
| // result: (FlagLT_UGT) |
| for { |
| y := auxIntToInt16(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int16(x) < y && uint16(x) > uint16(y)) { |
| break |
| } |
| v.reset(Op386FlagLT_UGT) |
| return true |
| } |
| // match: (CMPWconst (MOVLconst [x]) [y]) |
| // cond: int16(x)>y && uint16(x)<uint16(y) |
| // result: (FlagGT_ULT) |
| for { |
| y := auxIntToInt16(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int16(x) > y && uint16(x) < uint16(y)) { |
| break |
| } |
| v.reset(Op386FlagGT_ULT) |
| return true |
| } |
| // match: (CMPWconst (MOVLconst [x]) [y]) |
| // cond: int16(x)>y && uint16(x)>uint16(y) |
| // result: (FlagGT_UGT) |
| for { |
| y := auxIntToInt16(v.AuxInt) |
| if v_0.Op != Op386MOVLconst { |
| break |
| } |
| x := auxIntToInt32(v_0.AuxInt) |
| if !(int16(x) > y && uint16(x) > uint16(y)) { |
| break |
| } |
| v.reset(Op386FlagGT_UGT) |
| return true |
| } |
| // match: (CMPWconst (ANDLconst _ [m]) [n]) |
| // cond: 0 <= int16(m) && int16(m) < n |
| // result: (FlagLT_ULT) |
| for { |
| n := auxIntToInt16(v.AuxInt) |
| if v_0.Op != Op386ANDLconst { |
| break |
| } |
| m := auxIntToInt32(v_0.AuxInt) |
| if !(0 <= int16(m) && int16(m) < n) { |
| break |
| } |
| v.reset(Op386FlagLT_ULT) |
| return true |
| } |
| // match: (CMPWconst l:(ANDL x y) [0]) |
| // cond: l.Uses==1 |
| // result: (TESTW x y) |
| for { |
| if auxIntToInt16(v.AuxInt) != 0 { |
| break |
| } |
| l := v_0 |
| if l.Op != Op386ANDL { |
| break |
| } |
| y := l.Args[1] |
| x := l.Args[0] |
| if !(l.Uses == 1) { |
| break |
| } |
| v.reset(Op386TESTW) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (CMPWconst l:(ANDLconst [c] x) [0]) |
| // cond: l.Uses==1 |
| // result: (TESTWconst [int16(c)] x) |
| for { |
| if auxIntToInt16(v.AuxInt) != 0 { |
| break |
| } |
| l := v_0 |
| if l.Op != Op386ANDLconst { |
| break |
| } |
| c := auxIntToInt32(l.AuxInt) |
| x := l.Args[0] |
| if !(l.Uses == 1) { |
| break |
| } |
| v.reset(Op386TESTWconst) |
| v.AuxInt = int16ToAuxInt(int16(c)) |
| v.AddArg(x) |
| return true |
| } |
| // match: (CMPWconst x [0]) |
| // result: (TESTW x x) |
| for { |
| if auxIntToInt16(v.AuxInt) != 0 { |
| break |
| } |
| x := v_0 |
| v.reset(Op386TESTW) |
| v.AddArg2(x, x) |
| return true |
| } |
| // match: (CMPWconst l:(MOVWload {sym} [off] ptr mem) [c]) |
| // cond: l.Uses == 1 && clobber(l) |
| // result: @l.Block (CMPWconstload {sym} [makeValAndOff(int32(c),off)] ptr mem) |
| for { |
| c := auxIntToInt16(v.AuxInt) |
| l := v_0 |
| if l.Op != Op386MOVWload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(l.Uses == 1 && clobber(l)) { |
| break |
| } |
| b = l.Block |
| v0 := b.NewValue0(l.Pos, Op386CMPWconstload, types.TypeFlags) |
| v.copyOf(v0) |
| v0.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(c), off)) |
| v0.Aux = symToAux(sym) |
| v0.AddArg2(ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386CMPWload(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (CMPWload {sym} [off] ptr (MOVLconst [c]) mem) |
| // result: (CMPWconstload {sym} [makeValAndOff(int32(int16(c)),off)] ptr mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| mem := v_2 |
| v.reset(Op386CMPWconstload) |
| v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int16(c)), off)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386DIVSD(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (DIVSD x l:(MOVSDload [off] {sym} ptr mem)) |
| // cond: canMergeLoadClobber(v, l, x) && clobber(l) |
| // result: (DIVSDload x [off] {sym} ptr mem) |
| for { |
| x := v_0 |
| l := v_1 |
| if l.Op != Op386MOVSDload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(canMergeLoadClobber(v, l, x) && clobber(l)) { |
| break |
| } |
| v.reset(Op386DIVSDload) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(x, ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386DIVSDload(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (DIVSDload [off1] {sym} val (ADDLconst [off2] base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (DIVSDload [off1+off2] {sym} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386DIVSDload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| // match: (DIVSDload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (DIVSDload [off1+off2] {mergeSym(sym1,sym2)} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386DIVSDload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386DIVSS(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (DIVSS x l:(MOVSSload [off] {sym} ptr mem)) |
| // cond: canMergeLoadClobber(v, l, x) && clobber(l) |
| // result: (DIVSSload x [off] {sym} ptr mem) |
| for { |
| x := v_0 |
| l := v_1 |
| if l.Op != Op386MOVSSload { |
| break |
| } |
| off := auxIntToInt32(l.AuxInt) |
| sym := auxToSym(l.Aux) |
| mem := l.Args[1] |
| ptr := l.Args[0] |
| if !(canMergeLoadClobber(v, l, x) && clobber(l)) { |
| break |
| } |
| v.reset(Op386DIVSSload) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(x, ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386DIVSSload(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (DIVSSload [off1] {sym} val (ADDLconst [off2] base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (DIVSSload [off1+off2] {sym} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386DIVSSload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| // match: (DIVSSload [off1] {sym1} val (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (DIVSSload [off1+off2] {mergeSym(sym1,sym2)} val base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| val := v_0 |
| if v_1.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| base := v_1.Args[0] |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386DIVSSload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(val, base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386LEAL(v *Value) bool { |
| v_0 := v.Args[0] |
| // match: (LEAL [c] {s} (ADDLconst [d] x)) |
| // cond: is32Bit(int64(c)+int64(d)) |
| // result: (LEAL [c+d] {s} x) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| if !(is32Bit(int64(c) + int64(d))) { |
| break |
| } |
| v.reset(Op386LEAL) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg(x) |
| return true |
| } |
| // match: (LEAL [c] {s} (ADDL x y)) |
| // cond: x.Op != OpSB && y.Op != OpSB |
| // result: (LEAL1 [c] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDL { |
| break |
| } |
| _ = v_0.Args[1] |
| v_0_0 := v_0.Args[0] |
| v_0_1 := v_0.Args[1] |
| for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 { |
| x := v_0_0 |
| y := v_0_1 |
| if !(x.Op != OpSB && y.Op != OpSB) { |
| continue |
| } |
| v.reset(Op386LEAL1) |
| v.AuxInt = int32ToAuxInt(c) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (LEAL [off1] {sym1} (LEAL [off2] {sym2} x)) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) |
| // result: (LEAL [off1+off2] {mergeSym(sym1,sym2)} x) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| x := v_0.Args[0] |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) { |
| break |
| } |
| v.reset(Op386LEAL) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg(x) |
| return true |
| } |
| // match: (LEAL [off1] {sym1} (LEAL1 [off2] {sym2} x y)) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) |
| // result: (LEAL1 [off1+off2] {mergeSym(sym1,sym2)} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL1 { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| y := v_0.Args[1] |
| x := v_0.Args[0] |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) { |
| break |
| } |
| v.reset(Op386LEAL1) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL [off1] {sym1} (LEAL2 [off2] {sym2} x y)) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) |
| // result: (LEAL2 [off1+off2] {mergeSym(sym1,sym2)} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL2 { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| y := v_0.Args[1] |
| x := v_0.Args[0] |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) { |
| break |
| } |
| v.reset(Op386LEAL2) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL [off1] {sym1} (LEAL4 [off2] {sym2} x y)) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) |
| // result: (LEAL4 [off1+off2] {mergeSym(sym1,sym2)} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL4 { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| y := v_0.Args[1] |
| x := v_0.Args[0] |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) { |
| break |
| } |
| v.reset(Op386LEAL4) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL [off1] {sym1} (LEAL8 [off2] {sym2} x y)) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) |
| // result: (LEAL8 [off1+off2] {mergeSym(sym1,sym2)} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL8 { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| y := v_0.Args[1] |
| x := v_0.Args[0] |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) { |
| break |
| } |
| v.reset(Op386LEAL8) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(x, y) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386LEAL1(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (LEAL1 [c] {s} (ADDLconst [d] x) y) |
| // cond: is32Bit(int64(c)+int64(d)) && x.Op != OpSB |
| // result: (LEAL1 [c+d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| if v_0.Op != Op386ADDLconst { |
| continue |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| y := v_1 |
| if !(is32Bit(int64(c)+int64(d)) && x.Op != OpSB) { |
| continue |
| } |
| v.reset(Op386LEAL1) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (LEAL1 [c] {s} x (SHLLconst [1] y)) |
| // result: (LEAL2 [c] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 1 { |
| continue |
| } |
| y := v_1.Args[0] |
| v.reset(Op386LEAL2) |
| v.AuxInt = int32ToAuxInt(c) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (LEAL1 [c] {s} x (SHLLconst [2] y)) |
| // result: (LEAL4 [c] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 2 { |
| continue |
| } |
| y := v_1.Args[0] |
| v.reset(Op386LEAL4) |
| v.AuxInt = int32ToAuxInt(c) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (LEAL1 [c] {s} x (SHLLconst [3] y)) |
| // result: (LEAL8 [c] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 3 { |
| continue |
| } |
| y := v_1.Args[0] |
| v.reset(Op386LEAL8) |
| v.AuxInt = int32ToAuxInt(c) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (LEAL1 [off1] {sym1} (LEAL [off2] {sym2} x) y) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB |
| // result: (LEAL1 [off1+off2] {mergeSym(sym1,sym2)} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| if v_0.Op != Op386LEAL { |
| continue |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| x := v_0.Args[0] |
| y := v_1 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB) { |
| continue |
| } |
| v.reset(Op386LEAL1) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (LEAL1 [off1] {sym1} x (LEAL1 [off2] {sym2} y y)) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) |
| // result: (LEAL2 [off1+off2] {mergeSym(sym1, sym2)} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386LEAL1 { |
| continue |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| y := v_1.Args[1] |
| if y != v_1.Args[0] || !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) { |
| continue |
| } |
| v.reset(Op386LEAL2) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(x, y) |
| return true |
| } |
| break |
| } |
| // match: (LEAL1 [off1] {sym1} x (LEAL1 [off2] {sym2} x y)) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) |
| // result: (LEAL2 [off1+off2] {mergeSym(sym1, sym2)} y x) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 { |
| x := v_0 |
| if v_1.Op != Op386LEAL1 { |
| continue |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| _ = v_1.Args[1] |
| v_1_0 := v_1.Args[0] |
| v_1_1 := v_1.Args[1] |
| for _i1 := 0; _i1 <= 1; _i1, v_1_0, v_1_1 = _i1+1, v_1_1, v_1_0 { |
| if x != v_1_0 { |
| continue |
| } |
| y := v_1_1 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2)) { |
| continue |
| } |
| v.reset(Op386LEAL2) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(y, x) |
| return true |
| } |
| } |
| break |
| } |
| // match: (LEAL1 [0] {nil} x y) |
| // result: (ADDL x y) |
| for { |
| if auxIntToInt32(v.AuxInt) != 0 || auxToSym(v.Aux) != nil { |
| break |
| } |
| x := v_0 |
| y := v_1 |
| v.reset(Op386ADDL) |
| v.AddArg2(x, y) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386LEAL2(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (LEAL2 [c] {s} (ADDLconst [d] x) y) |
| // cond: is32Bit(int64(c)+int64(d)) && x.Op != OpSB |
| // result: (LEAL2 [c+d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| y := v_1 |
| if !(is32Bit(int64(c)+int64(d)) && x.Op != OpSB) { |
| break |
| } |
| v.reset(Op386LEAL2) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL2 [c] {s} x (ADDLconst [d] y)) |
| // cond: is32Bit(int64(c)+2*int64(d)) && y.Op != OpSB |
| // result: (LEAL2 [c+2*d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| x := v_0 |
| if v_1.Op != Op386ADDLconst { |
| break |
| } |
| d := auxIntToInt32(v_1.AuxInt) |
| y := v_1.Args[0] |
| if !(is32Bit(int64(c)+2*int64(d)) && y.Op != OpSB) { |
| break |
| } |
| v.reset(Op386LEAL2) |
| v.AuxInt = int32ToAuxInt(c + 2*d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL2 [c] {s} x (SHLLconst [1] y)) |
| // result: (LEAL4 [c] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| x := v_0 |
| if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 1 { |
| break |
| } |
| y := v_1.Args[0] |
| v.reset(Op386LEAL4) |
| v.AuxInt = int32ToAuxInt(c) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL2 [c] {s} x (SHLLconst [2] y)) |
| // result: (LEAL8 [c] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| x := v_0 |
| if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 2 { |
| break |
| } |
| y := v_1.Args[0] |
| v.reset(Op386LEAL8) |
| v.AuxInt = int32ToAuxInt(c) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL2 [off1] {sym1} (LEAL [off2] {sym2} x) y) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB |
| // result: (LEAL2 [off1+off2] {mergeSym(sym1,sym2)} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| x := v_0.Args[0] |
| y := v_1 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB) { |
| break |
| } |
| v.reset(Op386LEAL2) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL2 [off1] {sym} x (LEAL1 [off2] {nil} y y)) |
| // cond: is32Bit(int64(off1)+2*int64(off2)) |
| // result: (LEAL4 [off1+2*off2] {sym} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| x := v_0 |
| if v_1.Op != Op386LEAL1 { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| if auxToSym(v_1.Aux) != nil { |
| break |
| } |
| y := v_1.Args[1] |
| if y != v_1.Args[0] || !(is32Bit(int64(off1) + 2*int64(off2))) { |
| break |
| } |
| v.reset(Op386LEAL4) |
| v.AuxInt = int32ToAuxInt(off1 + 2*off2) |
| v.Aux = symToAux(sym) |
| v.AddArg2(x, y) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386LEAL4(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (LEAL4 [c] {s} (ADDLconst [d] x) y) |
| // cond: is32Bit(int64(c)+int64(d)) && x.Op != OpSB |
| // result: (LEAL4 [c+d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| y := v_1 |
| if !(is32Bit(int64(c)+int64(d)) && x.Op != OpSB) { |
| break |
| } |
| v.reset(Op386LEAL4) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL4 [c] {s} x (ADDLconst [d] y)) |
| // cond: is32Bit(int64(c)+4*int64(d)) && y.Op != OpSB |
| // result: (LEAL4 [c+4*d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| x := v_0 |
| if v_1.Op != Op386ADDLconst { |
| break |
| } |
| d := auxIntToInt32(v_1.AuxInt) |
| y := v_1.Args[0] |
| if !(is32Bit(int64(c)+4*int64(d)) && y.Op != OpSB) { |
| break |
| } |
| v.reset(Op386LEAL4) |
| v.AuxInt = int32ToAuxInt(c + 4*d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL4 [c] {s} x (SHLLconst [1] y)) |
| // result: (LEAL8 [c] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| x := v_0 |
| if v_1.Op != Op386SHLLconst || auxIntToInt32(v_1.AuxInt) != 1 { |
| break |
| } |
| y := v_1.Args[0] |
| v.reset(Op386LEAL8) |
| v.AuxInt = int32ToAuxInt(c) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL4 [off1] {sym1} (LEAL [off2] {sym2} x) y) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB |
| // result: (LEAL4 [off1+off2] {mergeSym(sym1,sym2)} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| x := v_0.Args[0] |
| y := v_1 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB) { |
| break |
| } |
| v.reset(Op386LEAL4) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL4 [off1] {sym} x (LEAL1 [off2] {nil} y y)) |
| // cond: is32Bit(int64(off1)+4*int64(off2)) |
| // result: (LEAL8 [off1+4*off2] {sym} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| x := v_0 |
| if v_1.Op != Op386LEAL1 { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| if auxToSym(v_1.Aux) != nil { |
| break |
| } |
| y := v_1.Args[1] |
| if y != v_1.Args[0] || !(is32Bit(int64(off1) + 4*int64(off2))) { |
| break |
| } |
| v.reset(Op386LEAL8) |
| v.AuxInt = int32ToAuxInt(off1 + 4*off2) |
| v.Aux = symToAux(sym) |
| v.AddArg2(x, y) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386LEAL8(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| // match: (LEAL8 [c] {s} (ADDLconst [d] x) y) |
| // cond: is32Bit(int64(c)+int64(d)) && x.Op != OpSB |
| // result: (LEAL8 [c+d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| d := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| y := v_1 |
| if !(is32Bit(int64(c)+int64(d)) && x.Op != OpSB) { |
| break |
| } |
| v.reset(Op386LEAL8) |
| v.AuxInt = int32ToAuxInt(c + d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL8 [c] {s} x (ADDLconst [d] y)) |
| // cond: is32Bit(int64(c)+8*int64(d)) && y.Op != OpSB |
| // result: (LEAL8 [c+8*d] {s} x y) |
| for { |
| c := auxIntToInt32(v.AuxInt) |
| s := auxToSym(v.Aux) |
| x := v_0 |
| if v_1.Op != Op386ADDLconst { |
| break |
| } |
| d := auxIntToInt32(v_1.AuxInt) |
| y := v_1.Args[0] |
| if !(is32Bit(int64(c)+8*int64(d)) && y.Op != OpSB) { |
| break |
| } |
| v.reset(Op386LEAL8) |
| v.AuxInt = int32ToAuxInt(c + 8*d) |
| v.Aux = symToAux(s) |
| v.AddArg2(x, y) |
| return true |
| } |
| // match: (LEAL8 [off1] {sym1} (LEAL [off2] {sym2} x) y) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB |
| // result: (LEAL8 [off1+off2] {mergeSym(sym1,sym2)} x y) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| x := v_0.Args[0] |
| y := v_1 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && x.Op != OpSB) { |
| break |
| } |
| v.reset(Op386LEAL8) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(x, y) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVBLSX(v *Value) bool { |
| v_0 := v.Args[0] |
| b := v.Block |
| // match: (MOVBLSX x:(MOVBload [off] {sym} ptr mem)) |
| // cond: x.Uses == 1 && clobber(x) |
| // result: @x.Block (MOVBLSXload <v.Type> [off] {sym} ptr mem) |
| for { |
| x := v_0 |
| if x.Op != Op386MOVBload { |
| break |
| } |
| off := auxIntToInt32(x.AuxInt) |
| sym := auxToSym(x.Aux) |
| mem := x.Args[1] |
| ptr := x.Args[0] |
| if !(x.Uses == 1 && clobber(x)) { |
| break |
| } |
| b = x.Block |
| v0 := b.NewValue0(x.Pos, Op386MOVBLSXload, v.Type) |
| v.copyOf(v0) |
| v0.AuxInt = int32ToAuxInt(off) |
| v0.Aux = symToAux(sym) |
| v0.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVBLSX (ANDLconst [c] x)) |
| // cond: c & 0x80 == 0 |
| // result: (ANDLconst [c & 0x7f] x) |
| for { |
| if v_0.Op != Op386ANDLconst { |
| break |
| } |
| c := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| if !(c&0x80 == 0) { |
| break |
| } |
| v.reset(Op386ANDLconst) |
| v.AuxInt = int32ToAuxInt(c & 0x7f) |
| v.AddArg(x) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVBLSXload(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (MOVBLSXload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) |
| // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) |
| // result: (MOVBLSX x) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVBstore { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| x := v_1.Args[1] |
| ptr2 := v_1.Args[0] |
| if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { |
| break |
| } |
| v.reset(Op386MOVBLSX) |
| v.AddArg(x) |
| return true |
| } |
| // match: (MOVBLSXload [off1] {sym1} (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (MOVBLSXload [off1+off2] {mergeSym(sym1,sym2)} base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| mem := v_1 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386MOVBLSXload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVBLZX(v *Value) bool { |
| v_0 := v.Args[0] |
| b := v.Block |
| // match: (MOVBLZX x:(MOVBload [off] {sym} ptr mem)) |
| // cond: x.Uses == 1 && clobber(x) |
| // result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem) |
| for { |
| x := v_0 |
| if x.Op != Op386MOVBload { |
| break |
| } |
| off := auxIntToInt32(x.AuxInt) |
| sym := auxToSym(x.Aux) |
| mem := x.Args[1] |
| ptr := x.Args[0] |
| if !(x.Uses == 1 && clobber(x)) { |
| break |
| } |
| b = x.Block |
| v0 := b.NewValue0(x.Pos, Op386MOVBload, v.Type) |
| v.copyOf(v0) |
| v0.AuxInt = int32ToAuxInt(off) |
| v0.Aux = symToAux(sym) |
| v0.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVBLZX (ANDLconst [c] x)) |
| // result: (ANDLconst [c & 0xff] x) |
| for { |
| if v_0.Op != Op386ANDLconst { |
| break |
| } |
| c := auxIntToInt32(v_0.AuxInt) |
| x := v_0.Args[0] |
| v.reset(Op386ANDLconst) |
| v.AuxInt = int32ToAuxInt(c & 0xff) |
| v.AddArg(x) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVBload(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) |
| // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) |
| // result: (MOVBLZX x) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVBstore { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| x := v_1.Args[1] |
| ptr2 := v_1.Args[0] |
| if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { |
| break |
| } |
| v.reset(Op386MOVBLZX) |
| v.AddArg(x) |
| return true |
| } |
| // match: (MOVBload [off1] {sym} (ADDLconst [off2] ptr) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (MOVBload [off1+off2] {sym} ptr mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| ptr := v_0.Args[0] |
| mem := v_1 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386MOVBload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVBload [off1] {sym1} (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| mem := v_1 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386MOVBload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(base, mem) |
| return true |
| } |
| // match: (MOVBload [off] {sym} (SB) _) |
| // cond: symIsRO(sym) |
| // result: (MOVLconst [int32(read8(sym, int64(off)))]) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != OpSB || !(symIsRO(sym)) { |
| break |
| } |
| v.reset(Op386MOVLconst) |
| v.AuxInt = int32ToAuxInt(int32(read8(sym, int64(off)))) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVBstore(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (MOVBstore [off] {sym} ptr (MOVBLSX x) mem) |
| // result: (MOVBstore [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVBLSX { |
| break |
| } |
| x := v_1.Args[0] |
| mem := v_2 |
| v.reset(Op386MOVBstore) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (MOVBstore [off] {sym} ptr (MOVBLZX x) mem) |
| // result: (MOVBstore [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVBLZX { |
| break |
| } |
| x := v_1.Args[0] |
| mem := v_2 |
| v.reset(Op386MOVBstore) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (MOVBstore [off1] {sym} (ADDLconst [off2] ptr) val mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (MOVBstore [off1+off2] {sym} ptr val mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| ptr := v_0.Args[0] |
| val := v_1 |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386MOVBstore) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, val, mem) |
| return true |
| } |
| // match: (MOVBstore [off] {sym} ptr (MOVLconst [c]) mem) |
| // result: (MOVBstoreconst [makeValAndOff(c,off)] {sym} ptr mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| mem := v_2 |
| v.reset(Op386MOVBstoreconst) |
| v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVBstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| val := v_1 |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386MOVBstore) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(base, val, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVBstoreconst(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (MOVBstoreconst [sc] {s} (ADDLconst [off] ptr) mem) |
| // cond: sc.canAdd32(off) |
| // result: (MOVBstoreconst [sc.addOffset32(off)] {s} ptr mem) |
| for { |
| sc := auxIntToValAndOff(v.AuxInt) |
| s := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off := auxIntToInt32(v_0.AuxInt) |
| ptr := v_0.Args[0] |
| mem := v_1 |
| if !(sc.canAdd32(off)) { |
| break |
| } |
| v.reset(Op386MOVBstoreconst) |
| v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off)) |
| v.Aux = symToAux(s) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVBstoreconst [sc] {sym1} (LEAL [off] {sym2} ptr) mem) |
| // cond: canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (MOVBstoreconst [sc.addOffset32(off)] {mergeSym(sym1, sym2)} ptr mem) |
| for { |
| sc := auxIntToValAndOff(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| ptr := v_0.Args[0] |
| mem := v_1 |
| if !(canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386MOVBstoreconst) |
| v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off)) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVLload(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (MOVLload [off] {sym} ptr (MOVLstore [off2] {sym2} ptr2 x _)) |
| // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) |
| // result: x |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVLstore { |
| break |
| } |
| off2 := auxIntToInt32(v_1.AuxInt) |
| sym2 := auxToSym(v_1.Aux) |
| x := v_1.Args[1] |
| ptr2 := v_1.Args[0] |
| if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { |
| break |
| } |
| v.copyOf(x) |
| return true |
| } |
| // match: (MOVLload [off1] {sym} (ADDLconst [off2] ptr) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (MOVLload [off1+off2] {sym} ptr mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| ptr := v_0.Args[0] |
| mem := v_1 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386MOVLload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVLload [off1] {sym1} (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (MOVLload [off1+off2] {mergeSym(sym1,sym2)} base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| mem := v_1 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386MOVLload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(base, mem) |
| return true |
| } |
| // match: (MOVLload [off] {sym} (SB) _) |
| // cond: symIsRO(sym) |
| // result: (MOVLconst [int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))]) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != OpSB || !(symIsRO(sym)) { |
| break |
| } |
| v.reset(Op386MOVLconst) |
| v.AuxInt = int32ToAuxInt(int32(read32(sym, int64(off), config.ctxt.Arch.ByteOrder))) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVLstore(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (MOVLstore [off1] {sym} (ADDLconst [off2] ptr) val mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (MOVLstore [off1+off2] {sym} ptr val mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| ptr := v_0.Args[0] |
| val := v_1 |
| mem := v_2 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386MOVLstore) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, val, mem) |
| return true |
| } |
| // match: (MOVLstore [off] {sym} ptr (MOVLconst [c]) mem) |
| // result: (MOVLstoreconst [makeValAndOff(c,off)] {sym} ptr mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| if v_1.Op != Op386MOVLconst { |
| break |
| } |
| c := auxIntToInt32(v_1.AuxInt) |
| mem := v_2 |
| v.reset(Op386MOVLstoreconst) |
| v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVLstore [off1] {sym1} (LEAL [off2] {sym2} base) val mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (MOVLstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| val := v_1 |
| mem := v_2 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386MOVLstore) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg3(base, val, mem) |
| return true |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(ADDLload x [off] {sym} ptr mem) mem) |
| // cond: y.Uses==1 && clobber(y) |
| // result: (ADDLmodify [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386ADDLload || auxIntToInt32(y.AuxInt) != off || auxToSym(y.Aux) != sym { |
| break |
| } |
| mem := y.Args[2] |
| x := y.Args[0] |
| if ptr != y.Args[1] || mem != v_2 || !(y.Uses == 1 && clobber(y)) { |
| break |
| } |
| v.reset(Op386ADDLmodify) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(ANDLload x [off] {sym} ptr mem) mem) |
| // cond: y.Uses==1 && clobber(y) |
| // result: (ANDLmodify [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386ANDLload || auxIntToInt32(y.AuxInt) != off || auxToSym(y.Aux) != sym { |
| break |
| } |
| mem := y.Args[2] |
| x := y.Args[0] |
| if ptr != y.Args[1] || mem != v_2 || !(y.Uses == 1 && clobber(y)) { |
| break |
| } |
| v.reset(Op386ANDLmodify) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(ORLload x [off] {sym} ptr mem) mem) |
| // cond: y.Uses==1 && clobber(y) |
| // result: (ORLmodify [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386ORLload || auxIntToInt32(y.AuxInt) != off || auxToSym(y.Aux) != sym { |
| break |
| } |
| mem := y.Args[2] |
| x := y.Args[0] |
| if ptr != y.Args[1] || mem != v_2 || !(y.Uses == 1 && clobber(y)) { |
| break |
| } |
| v.reset(Op386ORLmodify) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(XORLload x [off] {sym} ptr mem) mem) |
| // cond: y.Uses==1 && clobber(y) |
| // result: (XORLmodify [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386XORLload || auxIntToInt32(y.AuxInt) != off || auxToSym(y.Aux) != sym { |
| break |
| } |
| mem := y.Args[2] |
| x := y.Args[0] |
| if ptr != y.Args[1] || mem != v_2 || !(y.Uses == 1 && clobber(y)) { |
| break |
| } |
| v.reset(Op386XORLmodify) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(ADDL l:(MOVLload [off] {sym} ptr mem) x) mem) |
| // cond: y.Uses==1 && l.Uses==1 && clobber(y, l) |
| // result: (ADDLmodify [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386ADDL { |
| break |
| } |
| _ = y.Args[1] |
| y_0 := y.Args[0] |
| y_1 := y.Args[1] |
| for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 { |
| l := y_0 |
| if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym { |
| continue |
| } |
| mem := l.Args[1] |
| if ptr != l.Args[0] { |
| continue |
| } |
| x := y_1 |
| if mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) { |
| continue |
| } |
| v.reset(Op386ADDLmodify) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| break |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(SUBL l:(MOVLload [off] {sym} ptr mem) x) mem) |
| // cond: y.Uses==1 && l.Uses==1 && clobber(y, l) |
| // result: (SUBLmodify [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386SUBL { |
| break |
| } |
| x := y.Args[1] |
| l := y.Args[0] |
| if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym { |
| break |
| } |
| mem := l.Args[1] |
| if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) { |
| break |
| } |
| v.reset(Op386SUBLmodify) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(ANDL l:(MOVLload [off] {sym} ptr mem) x) mem) |
| // cond: y.Uses==1 && l.Uses==1 && clobber(y, l) |
| // result: (ANDLmodify [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386ANDL { |
| break |
| } |
| _ = y.Args[1] |
| y_0 := y.Args[0] |
| y_1 := y.Args[1] |
| for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 { |
| l := y_0 |
| if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym { |
| continue |
| } |
| mem := l.Args[1] |
| if ptr != l.Args[0] { |
| continue |
| } |
| x := y_1 |
| if mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) { |
| continue |
| } |
| v.reset(Op386ANDLmodify) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| break |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(ORL l:(MOVLload [off] {sym} ptr mem) x) mem) |
| // cond: y.Uses==1 && l.Uses==1 && clobber(y, l) |
| // result: (ORLmodify [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386ORL { |
| break |
| } |
| _ = y.Args[1] |
| y_0 := y.Args[0] |
| y_1 := y.Args[1] |
| for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 { |
| l := y_0 |
| if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym { |
| continue |
| } |
| mem := l.Args[1] |
| if ptr != l.Args[0] { |
| continue |
| } |
| x := y_1 |
| if mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) { |
| continue |
| } |
| v.reset(Op386ORLmodify) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| break |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(XORL l:(MOVLload [off] {sym} ptr mem) x) mem) |
| // cond: y.Uses==1 && l.Uses==1 && clobber(y, l) |
| // result: (XORLmodify [off] {sym} ptr x mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386XORL { |
| break |
| } |
| _ = y.Args[1] |
| y_0 := y.Args[0] |
| y_1 := y.Args[1] |
| for _i0 := 0; _i0 <= 1; _i0, y_0, y_1 = _i0+1, y_1, y_0 { |
| l := y_0 |
| if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym { |
| continue |
| } |
| mem := l.Args[1] |
| if ptr != l.Args[0] { |
| continue |
| } |
| x := y_1 |
| if mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) { |
| continue |
| } |
| v.reset(Op386XORLmodify) |
| v.AuxInt = int32ToAuxInt(off) |
| v.Aux = symToAux(sym) |
| v.AddArg3(ptr, x, mem) |
| return true |
| } |
| break |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(ADDLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem) |
| // cond: y.Uses==1 && l.Uses==1 && clobber(y, l) |
| // result: (ADDLconstmodify [makeValAndOff(c,off)] {sym} ptr mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386ADDLconst { |
| break |
| } |
| c := auxIntToInt32(y.AuxInt) |
| l := y.Args[0] |
| if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym { |
| break |
| } |
| mem := l.Args[1] |
| if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) { |
| break |
| } |
| v.reset(Op386ADDLconstmodify) |
| v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(ANDLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem) |
| // cond: y.Uses==1 && l.Uses==1 && clobber(y, l) |
| // result: (ANDLconstmodify [makeValAndOff(c,off)] {sym} ptr mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386ANDLconst { |
| break |
| } |
| c := auxIntToInt32(y.AuxInt) |
| l := y.Args[0] |
| if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym { |
| break |
| } |
| mem := l.Args[1] |
| if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) { |
| break |
| } |
| v.reset(Op386ANDLconstmodify) |
| v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(ORLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem) |
| // cond: y.Uses==1 && l.Uses==1 && clobber(y, l) |
| // result: (ORLconstmodify [makeValAndOff(c,off)] {sym} ptr mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386ORLconst { |
| break |
| } |
| c := auxIntToInt32(y.AuxInt) |
| l := y.Args[0] |
| if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym { |
| break |
| } |
| mem := l.Args[1] |
| if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) { |
| break |
| } |
| v.reset(Op386ORLconstmodify) |
| v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVLstore {sym} [off] ptr y:(XORLconst [c] l:(MOVLload [off] {sym} ptr mem)) mem) |
| // cond: y.Uses==1 && l.Uses==1 && clobber(y, l) |
| // result: (XORLconstmodify [makeValAndOff(c,off)] {sym} ptr mem) |
| for { |
| off := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| ptr := v_0 |
| y := v_1 |
| if y.Op != Op386XORLconst { |
| break |
| } |
| c := auxIntToInt32(y.AuxInt) |
| l := y.Args[0] |
| if l.Op != Op386MOVLload || auxIntToInt32(l.AuxInt) != off || auxToSym(l.Aux) != sym { |
| break |
| } |
| mem := l.Args[1] |
| if ptr != l.Args[0] || mem != v_2 || !(y.Uses == 1 && l.Uses == 1 && clobber(y, l)) { |
| break |
| } |
| v.reset(Op386XORLconstmodify) |
| v.AuxInt = valAndOffToAuxInt(makeValAndOff(c, off)) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVLstoreconst(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (MOVLstoreconst [sc] {s} (ADDLconst [off] ptr) mem) |
| // cond: sc.canAdd32(off) |
| // result: (MOVLstoreconst [sc.addOffset32(off)] {s} ptr mem) |
| for { |
| sc := auxIntToValAndOff(v.AuxInt) |
| s := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off := auxIntToInt32(v_0.AuxInt) |
| ptr := v_0.Args[0] |
| mem := v_1 |
| if !(sc.canAdd32(off)) { |
| break |
| } |
| v.reset(Op386MOVLstoreconst) |
| v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off)) |
| v.Aux = symToAux(s) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVLstoreconst [sc] {sym1} (LEAL [off] {sym2} ptr) mem) |
| // cond: canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (MOVLstoreconst [sc.addOffset32(off)] {mergeSym(sym1, sym2)} ptr mem) |
| for { |
| sc := auxIntToValAndOff(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| ptr := v_0.Args[0] |
| mem := v_1 |
| if !(canMergeSym(sym1, sym2) && sc.canAdd32(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386MOVLstoreconst) |
| v.AuxInt = valAndOffToAuxInt(sc.addOffset32(off)) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVSDconst(v *Value) bool { |
| b := v.Block |
| config := b.Func.Config |
| typ := &b.Func.Config.Types |
| // match: (MOVSDconst [c]) |
| // cond: config.ctxt.Flag_shared |
| // result: (MOVSDconst2 (MOVSDconst1 [c])) |
| for { |
| c := auxIntToFloat64(v.AuxInt) |
| if !(config.ctxt.Flag_shared) { |
| break |
| } |
| v.reset(Op386MOVSDconst2) |
| v0 := b.NewValue0(v.Pos, Op386MOVSDconst1, typ.UInt32) |
| v0.AuxInt = float64ToAuxInt(c) |
| v.AddArg(v0) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVSDload(v *Value) bool { |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
| // match: (MOVSDload [off1] {sym} (ADDLconst [off2] ptr) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) |
| // result: (MOVSDload [off1+off2] {sym} ptr mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym := auxToSym(v.Aux) |
| if v_0.Op != Op386ADDLconst { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| ptr := v_0.Args[0] |
| mem := v_1 |
| if !(is32Bit(int64(off1) + int64(off2))) { |
| break |
| } |
| v.reset(Op386MOVSDload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(sym) |
| v.AddArg2(ptr, mem) |
| return true |
| } |
| // match: (MOVSDload [off1] {sym1} (LEAL [off2] {sym2} base) mem) |
| // cond: is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared) |
| // result: (MOVSDload [off1+off2] {mergeSym(sym1,sym2)} base mem) |
| for { |
| off1 := auxIntToInt32(v.AuxInt) |
| sym1 := auxToSym(v.Aux) |
| if v_0.Op != Op386LEAL { |
| break |
| } |
| off2 := auxIntToInt32(v_0.AuxInt) |
| sym2 := auxToSym(v_0.Aux) |
| base := v_0.Args[0] |
| mem := v_1 |
| if !(is32Bit(int64(off1)+int64(off2)) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) { |
| break |
| } |
| v.reset(Op386MOVSDload) |
| v.AuxInt = int32ToAuxInt(off1 + off2) |
| v.Aux = symToAux(mergeSym(sym1, sym2)) |
| v.AddArg2(base, mem) |
| return true |
| } |
| return false |
| } |
| func rewriteValue386_Op386MOVSDstore(v *Value) bool { |
| v_2 := v.Args[2] |
| v_1 := v.Args[1] |
| v_0 := v.Args[0] |
| b := v.Block |
| config := b.Func.Config |
|