internal/simdgen/ops/AddSub/go.yaml

!sum
# Add
- go: Add
  asm: "VPADD[BWDQ]|VADDP[SD]"
  in:
  - &any
    go: $t
  - *any
  out:
  - *any
- go: MaskedAdd
  asm: "VPADD[BWDQ]|VADDP[SD]"
  in:
  - class: mask
  - *any
  - *any
  out:
  - *any
# Saturated Add
- go: SaturatedAdd
  asm: "VPADDS[BWDQ]"
  in:
  - &int
    go: $t
    base: int
  - *int
  out:
  - *int
- go: SaturatedAdd
  asm: "VPADDS[BWDQ]"
  in:
  - &uint
    go: $t
    base: uint
  - *uint
  out:
  - *uint
- go: MaskedSaturatedAdd
  asm: "VPADDS[BWDQ]"
  in:
  - class: mask
  - *int
  - *int
  out:
  - *int
- go: MaskedSaturatedAdd
  asm: "VPADDS[BWDQ]"
  in:
  - class: mask
  - *uint
  - *uint
  out:
  - *uint

# Sub
- go: Sub
  asm: "VPSUB[BWDQ]|VADDP[SD]"
  in: &2any
  - *any
  - *any
  out: &1any
  - *any
- go: MaskedSub
  asm: "VPSUB[BWDQ]|VADDP[SD]"
  in:
  - class: mask
  - *any
  - *any
  out:
  - *any
# Saturated Sub
- go: SaturatedSub
  asm: "VPSUBS[BWDQ]"
  in: &2int
  - *int
  - *int
  out: &1int
  - *int
- go: SaturatedSub
  asm: "VPSUBS[BWDQ]"
  in:
  - *uint
  - *uint
  out:
  - *uint
- go: MaskedSaturatedSub
  asm: "VPSUBS[BWDQ]"
  in:
  - class: mask
  - *int
  - *int
  out:
  - *int
- go: MaskedSaturatedSub
  asm: "VPSUBS[BWDQ]"
  in:
  - class: mask
  - *uint
  - *uint
  out:
  - *uint
- go: PairwiseAdd
  asm: "VPHADD[DW]"
  in: *2any
  out: *1any
- go: PairwiseSub
  asm: "VPHSUB[DW]"
  in: *2any
  out: *1any
- go: PairwiseAdd
  asm: "VHADDP[SD]" # floats
  in: *2any
  out: *1any
- go: PairwiseSub
  asm: "VHSUBP[SD]"  # floats
  in: *2any
  out: *1any
- go: SaturatedPairwiseAdd
  asm: "VPHADDS[DW]"
  in: *2int
  out: *1int
- go: SaturatedPairwiseSub
  asm: "VPHSUBS[DW]"
  in: *2int
  out: *1int