cpu: detect RDRAND and RDSEED instructions on x86
Change-Id: I2d0094d64ba12f888758aeebdb43aed353ddeeb9
Reviewed-on: https://go-review.googlesource.com/c/160577
Run-TryBot: Tobias Klauser <tobias.klauser@gmail.com>
Reviewed-by: Ian Lance Taylor <iant@golang.org>
diff --git a/cpu/cpu.go b/cpu/cpu.go
index 84962cf..6b0034e 100644
--- a/cpu/cpu.go
+++ b/cpu/cpu.go
@@ -29,6 +29,8 @@
HasOSXSAVE bool // OS supports XSAVE/XRESTOR for saving/restoring XMM registers.
HasPCLMULQDQ bool // PCLMULQDQ instruction - most often used for AES-GCM
HasPOPCNT bool // Hamming weight instruction POPCNT.
+ HasRDRAND bool // RDRAND instruction (on-chip random number generator)
+ HasRDSEED bool // RDSEED instruction (on-chip random number generator)
HasSSE2 bool // Streaming SIMD extension 2 (always available on amd64)
HasSSE3 bool // Streaming SIMD extension 3
HasSSSE3 bool // Supplemental streaming SIMD extension 3
diff --git a/cpu/cpu_x86.go b/cpu/cpu_x86.go
index 71e288b..2b3ca2e 100644
--- a/cpu/cpu_x86.go
+++ b/cpu/cpu_x86.go
@@ -27,6 +27,7 @@
X86.HasPOPCNT = isSet(23, ecx1)
X86.HasAES = isSet(25, ecx1)
X86.HasOSXSAVE = isSet(27, ecx1)
+ X86.HasRDRAND = isSet(30, ecx1)
osSupportsAVX := false
// For XGETBV, OSXSAVE bit is required and sufficient.
@@ -47,6 +48,7 @@
X86.HasAVX2 = isSet(5, ebx7) && osSupportsAVX
X86.HasBMI2 = isSet(8, ebx7)
X86.HasERMS = isSet(9, ebx7)
+ X86.HasRDSEED = isSet(18, ebx7)
X86.HasADX = isSet(19, ebx7)
}
