cpu: fix cpu cacheLineSize for arm64 darwin(a.k.a. M1)
The existing value for M1 is 64, which is the same as other arm64 cpus.
But the correct cacheLineSize for M1 should be 128, which can be
verified using the following command:
$ sysctl -a hw | grep cachelinesize
hw.cachelinesize: 128
Fixes golang/go#53075
Change-Id: I555716ed412cdc02941c8b1d9767952f7ad6678c
Reviewed-on: https://go-review.googlesource.com/c/sys/+/408614
Run-TryBot: Keith Randall <khr@golang.org>
Reviewed-by: Keith Randall <khr@golang.org>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Joedian Reid <joedian@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
diff --git a/cpu/cpu_arm64.go b/cpu/cpu_arm64.go
index bbaba18..f3eb993 100644
--- a/cpu/cpu_arm64.go
+++ b/cpu/cpu_arm64.go
@@ -6,7 +6,10 @@
import "runtime"
-const cacheLineSize = 64
+// cacheLineSize is used to prevent false sharing of cache lines.
+// We choose 128 because Apple Silicon, a.k.a. M1, has 128-byte cache line size.
+// It doesn't cost much and is much more future-proof.
+const cacheLineSize = 128
func initOptions() {
options = []option{
