| commit | 9ef1692c93bf96328bcaf7a5c8a46094748da7f3 | [log] [tgz] |
|---|---|---|
| author | Austin Clements <austin@google.com> | Tue Jan 13 09:34:53 2026 -0500 |
| committer | Cherry Mui <cherryyz@google.com> | Tue Jan 13 12:17:09 2026 -0800 |
| tree | 96266bb6505523fc2a42b89ce1bfb59dfe4b61b2 | |
| parent | e2fef50def98b87107ab963f657d43d7869b8463 [diff] |
simd/archsimd/_gen/simdgen: feature implications This simplifies our handling of XED features, adds a table of which features imply which other features, and adds this information to the documentation of the CPU features APIs. As part of this we fix an issue around the "AVXAES" feature. AVXAES is defined as the combination of the AVX and AES CPUID flags. Several other features also work like this, but have hand-written logic in internal/cpu to compute logical feature flags from the underlying CPUID bits. For these, we expose a single feature check function from the SIMD API. AVXAES currently doesn't work like this: it requires the user to check both features. However, this forces the SIMD API to expose an "AES" feature check, which really has nothing to do with SIMD. To make this consistent, we introduce an AVXAES feature check function and use it in feature requirement docs. Unlike the others combo features, this is implemented in the simd package, but the difference is invisible to the user. Change-Id: I2985ebd361f0ecd45fd428903efe4c981a5ec65d Reviewed-on: https://go-review.googlesource.com/c/go/+/736100 LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: Junyang Shao <shaojunyang@google.com> Reviewed-on: https://go-review.googlesource.com/c/go/+/736200 Reviewed-by: Austin Clements <austin@google.com>
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