| commit | 457334d87cd32e4b30b2dbd1e1445783c24a5642 | [log] [tgz] |
|---|---|---|
| author | James Cowgill <james.cowgill@mips.com> | Wed Feb 28 16:10:14 2018 +0000 |
| committer | Andrew Bonventre <andybons@golang.org> | Sat Apr 28 20:20:58 2018 +0000 |
| tree | eab102ea2daba7fc58b95b9f4b8b4752128407fd | |
| parent | f26ed07f53daf19b33e13b3a93f185320d7b9a8b [diff] |
[release-branch.go1.10] cmd/internal/obj/mips: load/store even float registers first There is a bug in Octeon III processors where storing an odd floating point register after it has recently been written to by a double floating point operation will store the old value from before the double operation (there are some extra details - the operation and store must be a certain number of cycles apart). However, this bug does not occur if the even register is stored first. Currently the bug only happens on big endian because go always loads the even register first on little endian. Workaround the bug by always loading / storing the even floating point register first. Since this is just an instruction reordering, it should have no performance penalty. This follows other compilers like GCC which will always store the even register first (although you do have to set the ISA level to MIPS I to prevent it from using SDC1). Fixes golang/go#24995 Change-Id: I5e73daa4d724ca1df7bf5228aab19f53f26a4976 Reviewed-on: https://go-review.googlesource.com/97735 Reviewed-by: Keith Randall <khr@golang.org> (cherry picked from commit 423111081b87c6c4e61c4d94c94bfdf1853fa01f) Reviewed-on: https://go-review.googlesource.com/110078 Run-TryBot: Andrew Bonventre <andybons@golang.org> Reviewed-by: Ian Lance Taylor <iant@golang.org> TryBot-Result: Gobot Gobot <gobot@golang.org>
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