| // autogenerated from rulegen/lower_amd64.rules: do not edit! |
| // generated with: go run rulegen/rulegen.go rulegen/lower_amd64.rules lowerAmd64 lowerAmd64.go |
| package ssa |
| |
| func lowerAmd64(v *Value) bool { |
| switch v.Op { |
| case OpADDQ: |
| // match: (ADDQ x (MOVQconst [c])) |
| // cond: |
| // result: (ADDQconst [c] x) |
| { |
| x := v.Args[0] |
| if v.Args[1].Op != OpMOVQconst { |
| goto endacffd55e74ee0ff59ad58a18ddfc9973 |
| } |
| c := v.Args[1].Aux |
| v.Op = OpADDQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = c |
| v.AddArg(x) |
| return true |
| } |
| goto endacffd55e74ee0ff59ad58a18ddfc9973 |
| endacffd55e74ee0ff59ad58a18ddfc9973: |
| ; |
| // match: (ADDQ (MOVQconst [c]) x) |
| // cond: |
| // result: (ADDQconst [c] x) |
| { |
| if v.Args[0].Op != OpMOVQconst { |
| goto end7166f476d744ab7a51125959d3d3c7e2 |
| } |
| c := v.Args[0].Aux |
| x := v.Args[1] |
| v.Op = OpADDQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = c |
| v.AddArg(x) |
| return true |
| } |
| goto end7166f476d744ab7a51125959d3d3c7e2 |
| end7166f476d744ab7a51125959d3d3c7e2: |
| ; |
| // match: (ADDQ x (SHLQconst [shift] y)) |
| // cond: shift.(int64) == 3 |
| // result: (LEAQ8 [int64(0)] x y) |
| { |
| x := v.Args[0] |
| if v.Args[1].Op != OpSHLQconst { |
| goto endaf4f724e1e17f2b116d336c07da0165d |
| } |
| shift := v.Args[1].Aux |
| y := v.Args[1].Args[0] |
| if !(shift.(int64) == 3) { |
| goto endaf4f724e1e17f2b116d336c07da0165d |
| } |
| v.Op = OpLEAQ8 |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = int64(0) |
| v.AddArg(x) |
| v.AddArg(y) |
| return true |
| } |
| goto endaf4f724e1e17f2b116d336c07da0165d |
| endaf4f724e1e17f2b116d336c07da0165d: |
| ; |
| case OpADDQconst: |
| // match: (ADDQconst [c] (LEAQ8 [d] x y)) |
| // cond: |
| // result: (LEAQ8 [addOff(c, d)] x y) |
| { |
| c := v.Aux |
| if v.Args[0].Op != OpLEAQ8 { |
| goto ende2cc681c9abf9913288803fb1b39e639 |
| } |
| d := v.Args[0].Aux |
| x := v.Args[0].Args[0] |
| y := v.Args[0].Args[1] |
| v.Op = OpLEAQ8 |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = addOff(c, d) |
| v.AddArg(x) |
| v.AddArg(y) |
| return true |
| } |
| goto ende2cc681c9abf9913288803fb1b39e639 |
| ende2cc681c9abf9913288803fb1b39e639: |
| ; |
| // match: (ADDQconst [off] x) |
| // cond: off.(int64) == 0 |
| // result: (Copy x) |
| { |
| off := v.Aux |
| x := v.Args[0] |
| if !(off.(int64) == 0) { |
| goto endfa1c7cc5ac4716697e891376787f86ce |
| } |
| v.Op = OpCopy |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(x) |
| return true |
| } |
| goto endfa1c7cc5ac4716697e891376787f86ce |
| endfa1c7cc5ac4716697e891376787f86ce: |
| ; |
| case OpAdd: |
| // match: (Add <t> x y) |
| // cond: (is64BitInt(t) || isPtr(t)) |
| // result: (ADDQ x y) |
| { |
| t := v.Type |
| x := v.Args[0] |
| y := v.Args[1] |
| if !(is64BitInt(t) || isPtr(t)) { |
| goto endf031c523d7dd08e4b8e7010a94cd94c9 |
| } |
| v.Op = OpADDQ |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(x) |
| v.AddArg(y) |
| return true |
| } |
| goto endf031c523d7dd08e4b8e7010a94cd94c9 |
| endf031c523d7dd08e4b8e7010a94cd94c9: |
| ; |
| // match: (Add <t> x y) |
| // cond: is32BitInt(t) |
| // result: (ADDL x y) |
| { |
| t := v.Type |
| x := v.Args[0] |
| y := v.Args[1] |
| if !(is32BitInt(t)) { |
| goto end35a02a1587264e40cf1055856ff8445a |
| } |
| v.Op = OpADDL |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(x) |
| v.AddArg(y) |
| return true |
| } |
| goto end35a02a1587264e40cf1055856ff8445a |
| end35a02a1587264e40cf1055856ff8445a: |
| ; |
| case OpCMPQ: |
| // match: (CMPQ x (MOVQconst [c])) |
| // cond: |
| // result: (CMPQconst x [c]) |
| { |
| x := v.Args[0] |
| if v.Args[1].Op != OpMOVQconst { |
| goto end32ef1328af280ac18fa8045a3502dae9 |
| } |
| c := v.Args[1].Aux |
| v.Op = OpCMPQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(x) |
| v.Aux = c |
| return true |
| } |
| goto end32ef1328af280ac18fa8045a3502dae9 |
| end32ef1328af280ac18fa8045a3502dae9: |
| ; |
| // match: (CMPQ (MOVQconst [c]) x) |
| // cond: |
| // result: (InvertFlags (CMPQconst <TypeFlags> x [c])) |
| { |
| if v.Args[0].Op != OpMOVQconst { |
| goto endf8ca12fe79290bc82b11cfa463bc9413 |
| } |
| c := v.Args[0].Aux |
| x := v.Args[1] |
| v.Op = OpInvertFlags |
| v.Aux = nil |
| v.resetArgs() |
| v0 := v.Block.NewValue(OpCMPQconst, TypeInvalid, nil) |
| v0.Type = TypeFlags |
| v0.AddArg(x) |
| v0.Aux = c |
| v.AddArg(v0) |
| return true |
| } |
| goto endf8ca12fe79290bc82b11cfa463bc9413 |
| endf8ca12fe79290bc82b11cfa463bc9413: |
| ; |
| case OpConst: |
| // match: (Const <t> [val]) |
| // cond: is64BitInt(t) |
| // result: (MOVQconst [val]) |
| { |
| t := v.Type |
| val := v.Aux |
| if !(is64BitInt(t)) { |
| goto end7f5c5b34093fbc6860524cb803ee51bf |
| } |
| v.Op = OpMOVQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = val |
| return true |
| } |
| goto end7f5c5b34093fbc6860524cb803ee51bf |
| end7f5c5b34093fbc6860524cb803ee51bf: |
| ; |
| case OpGlobal: |
| // match: (Global [sym]) |
| // cond: |
| // result: (LEAQglobal [GlobalOffset{sym,0}]) |
| { |
| sym := v.Aux |
| v.Op = OpLEAQglobal |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = GlobalOffset{sym, 0} |
| return true |
| } |
| goto end3a3c76fac0e2e53c0e1c60b9524e6f1c |
| end3a3c76fac0e2e53c0e1c60b9524e6f1c: |
| ; |
| case OpIsInBounds: |
| // match: (IsInBounds idx len) |
| // cond: |
| // result: (SETB (CMPQ <TypeFlags> idx len)) |
| { |
| idx := v.Args[0] |
| len := v.Args[1] |
| v.Op = OpSETB |
| v.Aux = nil |
| v.resetArgs() |
| v0 := v.Block.NewValue(OpCMPQ, TypeInvalid, nil) |
| v0.Type = TypeFlags |
| v0.AddArg(idx) |
| v0.AddArg(len) |
| v.AddArg(v0) |
| return true |
| } |
| goto endb51d371171154c0f1613b687757e0576 |
| endb51d371171154c0f1613b687757e0576: |
| ; |
| case OpIsNonNil: |
| // match: (IsNonNil p) |
| // cond: |
| // result: (SETNE (TESTQ <TypeFlags> p p)) |
| { |
| p := v.Args[0] |
| v.Op = OpSETNE |
| v.Aux = nil |
| v.resetArgs() |
| v0 := v.Block.NewValue(OpTESTQ, TypeInvalid, nil) |
| v0.Type = TypeFlags |
| v0.AddArg(p) |
| v0.AddArg(p) |
| v.AddArg(v0) |
| return true |
| } |
| goto endff508c3726edfb573abc6128c177e76c |
| endff508c3726edfb573abc6128c177e76c: |
| ; |
| case OpLess: |
| // match: (Less x y) |
| // cond: is64BitInt(v.Args[0].Type) && isSigned(v.Args[0].Type) |
| // result: (SETL (CMPQ <TypeFlags> x y)) |
| { |
| x := v.Args[0] |
| y := v.Args[1] |
| if !(is64BitInt(v.Args[0].Type) && isSigned(v.Args[0].Type)) { |
| goto endcecf13a952d4c6c2383561c7d68a3cf9 |
| } |
| v.Op = OpSETL |
| v.Aux = nil |
| v.resetArgs() |
| v0 := v.Block.NewValue(OpCMPQ, TypeInvalid, nil) |
| v0.Type = TypeFlags |
| v0.AddArg(x) |
| v0.AddArg(y) |
| v.AddArg(v0) |
| return true |
| } |
| goto endcecf13a952d4c6c2383561c7d68a3cf9 |
| endcecf13a952d4c6c2383561c7d68a3cf9: |
| ; |
| case OpLoad: |
| // match: (Load <t> ptr mem) |
| // cond: t.IsBoolean() |
| // result: (MOVBload [int64(0)] ptr mem) |
| { |
| t := v.Type |
| ptr := v.Args[0] |
| mem := v.Args[1] |
| if !(t.IsBoolean()) { |
| goto end73f21632e56c3614902d3c29c82dc4ea |
| } |
| v.Op = OpMOVBload |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = int64(0) |
| v.AddArg(ptr) |
| v.AddArg(mem) |
| return true |
| } |
| goto end73f21632e56c3614902d3c29c82dc4ea |
| end73f21632e56c3614902d3c29c82dc4ea: |
| ; |
| // match: (Load <t> ptr mem) |
| // cond: (is64BitInt(t) || isPtr(t)) |
| // result: (MOVQload [int64(0)] ptr mem) |
| { |
| t := v.Type |
| ptr := v.Args[0] |
| mem := v.Args[1] |
| if !(is64BitInt(t) || isPtr(t)) { |
| goto end581ce5a20901df1b8143448ba031685b |
| } |
| v.Op = OpMOVQload |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = int64(0) |
| v.AddArg(ptr) |
| v.AddArg(mem) |
| return true |
| } |
| goto end581ce5a20901df1b8143448ba031685b |
| end581ce5a20901df1b8143448ba031685b: |
| ; |
| case OpLsh: |
| // match: (Lsh <t> x y) |
| // cond: is64BitInt(t) |
| // result: (SHLQ x y) |
| { |
| t := v.Type |
| x := v.Args[0] |
| y := v.Args[1] |
| if !(is64BitInt(t)) { |
| goto end9f05c9539e51db6ad557989e0c822e9b |
| } |
| v.Op = OpSHLQ |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(x) |
| v.AddArg(y) |
| return true |
| } |
| goto end9f05c9539e51db6ad557989e0c822e9b |
| end9f05c9539e51db6ad557989e0c822e9b: |
| ; |
| case OpMOVQload: |
| // match: (MOVQload [off1] (ADDQconst [off2] ptr) mem) |
| // cond: |
| // result: (MOVQload [addOff(off1, off2)] ptr mem) |
| { |
| off1 := v.Aux |
| if v.Args[0].Op != OpADDQconst { |
| goto end843d29b538c4483b432b632e5666d6e3 |
| } |
| off2 := v.Args[0].Aux |
| ptr := v.Args[0].Args[0] |
| mem := v.Args[1] |
| v.Op = OpMOVQload |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = addOff(off1, off2) |
| v.AddArg(ptr) |
| v.AddArg(mem) |
| return true |
| } |
| goto end843d29b538c4483b432b632e5666d6e3 |
| end843d29b538c4483b432b632e5666d6e3: |
| ; |
| // match: (MOVQload [off1] (LEAQ8 [off2] ptr idx) mem) |
| // cond: |
| // result: (MOVQloadidx8 [addOff(off1, off2)] ptr idx mem) |
| { |
| off1 := v.Aux |
| if v.Args[0].Op != OpLEAQ8 { |
| goto end02f5ad148292c46463e7c20d3b821735 |
| } |
| off2 := v.Args[0].Aux |
| ptr := v.Args[0].Args[0] |
| idx := v.Args[0].Args[1] |
| mem := v.Args[1] |
| v.Op = OpMOVQloadidx8 |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = addOff(off1, off2) |
| v.AddArg(ptr) |
| v.AddArg(idx) |
| v.AddArg(mem) |
| return true |
| } |
| goto end02f5ad148292c46463e7c20d3b821735 |
| end02f5ad148292c46463e7c20d3b821735: |
| ; |
| case OpMOVQloadidx8: |
| // match: (MOVQloadidx8 [off1] (ADDQconst [off2] ptr) idx mem) |
| // cond: |
| // result: (MOVQloadidx8 [addOff(off1, off2)] ptr idx mem) |
| { |
| off1 := v.Aux |
| if v.Args[0].Op != OpADDQconst { |
| goto ende81e44bcfb11f90916ccb440c590121f |
| } |
| off2 := v.Args[0].Aux |
| ptr := v.Args[0].Args[0] |
| idx := v.Args[1] |
| mem := v.Args[2] |
| v.Op = OpMOVQloadidx8 |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = addOff(off1, off2) |
| v.AddArg(ptr) |
| v.AddArg(idx) |
| v.AddArg(mem) |
| return true |
| } |
| goto ende81e44bcfb11f90916ccb440c590121f |
| ende81e44bcfb11f90916ccb440c590121f: |
| ; |
| case OpMOVQstore: |
| // match: (MOVQstore [off1] (ADDQconst [off2] ptr) val mem) |
| // cond: |
| // result: (MOVQstore [addOff(off1, off2)] ptr val mem) |
| { |
| off1 := v.Aux |
| if v.Args[0].Op != OpADDQconst { |
| goto end2108c693a43c79aed10b9246c39c80aa |
| } |
| off2 := v.Args[0].Aux |
| ptr := v.Args[0].Args[0] |
| val := v.Args[1] |
| mem := v.Args[2] |
| v.Op = OpMOVQstore |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = addOff(off1, off2) |
| v.AddArg(ptr) |
| v.AddArg(val) |
| v.AddArg(mem) |
| return true |
| } |
| goto end2108c693a43c79aed10b9246c39c80aa |
| end2108c693a43c79aed10b9246c39c80aa: |
| ; |
| // match: (MOVQstore [off1] (LEAQ8 [off2] ptr idx) val mem) |
| // cond: |
| // result: (MOVQstoreidx8 [addOff(off1, off2)] ptr idx val mem) |
| { |
| off1 := v.Aux |
| if v.Args[0].Op != OpLEAQ8 { |
| goto endce1db8c8d37c8397c500a2068a65c215 |
| } |
| off2 := v.Args[0].Aux |
| ptr := v.Args[0].Args[0] |
| idx := v.Args[0].Args[1] |
| val := v.Args[1] |
| mem := v.Args[2] |
| v.Op = OpMOVQstoreidx8 |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = addOff(off1, off2) |
| v.AddArg(ptr) |
| v.AddArg(idx) |
| v.AddArg(val) |
| v.AddArg(mem) |
| return true |
| } |
| goto endce1db8c8d37c8397c500a2068a65c215 |
| endce1db8c8d37c8397c500a2068a65c215: |
| ; |
| case OpMOVQstoreidx8: |
| // match: (MOVQstoreidx8 [off1] (ADDQconst [off2] ptr) idx val mem) |
| // cond: |
| // result: (MOVQstoreidx8 [addOff(off1, off2)] ptr idx val mem) |
| { |
| off1 := v.Aux |
| if v.Args[0].Op != OpADDQconst { |
| goto end01c970657b0fdefeab82458c15022163 |
| } |
| off2 := v.Args[0].Aux |
| ptr := v.Args[0].Args[0] |
| idx := v.Args[1] |
| val := v.Args[2] |
| mem := v.Args[3] |
| v.Op = OpMOVQstoreidx8 |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = addOff(off1, off2) |
| v.AddArg(ptr) |
| v.AddArg(idx) |
| v.AddArg(val) |
| v.AddArg(mem) |
| return true |
| } |
| goto end01c970657b0fdefeab82458c15022163 |
| end01c970657b0fdefeab82458c15022163: |
| ; |
| case OpMULQ: |
| // match: (MULQ x (MOVQconst [c])) |
| // cond: c.(int64) == int64(int32(c.(int64))) |
| // result: (MULQconst [c] x) |
| { |
| x := v.Args[0] |
| if v.Args[1].Op != OpMOVQconst { |
| goto ende8c09b194fcde7d9cdc69f2deff86304 |
| } |
| c := v.Args[1].Aux |
| if !(c.(int64) == int64(int32(c.(int64)))) { |
| goto ende8c09b194fcde7d9cdc69f2deff86304 |
| } |
| v.Op = OpMULQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = c |
| v.AddArg(x) |
| return true |
| } |
| goto ende8c09b194fcde7d9cdc69f2deff86304 |
| ende8c09b194fcde7d9cdc69f2deff86304: |
| ; |
| // match: (MULQ (MOVQconst [c]) x) |
| // cond: |
| // result: (MULQconst [c] x) |
| { |
| if v.Args[0].Op != OpMOVQconst { |
| goto endc6e18d6968175d6e58eafa6dcf40c1b8 |
| } |
| c := v.Args[0].Aux |
| x := v.Args[1] |
| v.Op = OpMULQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = c |
| v.AddArg(x) |
| return true |
| } |
| goto endc6e18d6968175d6e58eafa6dcf40c1b8 |
| endc6e18d6968175d6e58eafa6dcf40c1b8: |
| ; |
| case OpMULQconst: |
| // match: (MULQconst [c] x) |
| // cond: c.(int64) == 8 |
| // result: (SHLQconst [int64(3)] x) |
| { |
| c := v.Aux |
| x := v.Args[0] |
| if !(c.(int64) == 8) { |
| goto end7e16978c56138324ff2abf91fd6d94d4 |
| } |
| v.Op = OpSHLQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = int64(3) |
| v.AddArg(x) |
| return true |
| } |
| goto end7e16978c56138324ff2abf91fd6d94d4 |
| end7e16978c56138324ff2abf91fd6d94d4: |
| ; |
| // match: (MULQconst [c] x) |
| // cond: c.(int64) == 64 |
| // result: (SHLQconst [int64(5)] x) |
| { |
| c := v.Aux |
| x := v.Args[0] |
| if !(c.(int64) == 64) { |
| goto end2c7a02f230e4b311ac3a4e22f70a4f08 |
| } |
| v.Op = OpSHLQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = int64(5) |
| v.AddArg(x) |
| return true |
| } |
| goto end2c7a02f230e4b311ac3a4e22f70a4f08 |
| end2c7a02f230e4b311ac3a4e22f70a4f08: |
| ; |
| case OpMove: |
| // match: (Move [size] dst src mem) |
| // cond: |
| // result: (REPMOVSB dst src (Const <TypeUInt64> [size.(int64)]) mem) |
| { |
| size := v.Aux |
| dst := v.Args[0] |
| src := v.Args[1] |
| mem := v.Args[2] |
| v.Op = OpREPMOVSB |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(dst) |
| v.AddArg(src) |
| v0 := v.Block.NewValue(OpConst, TypeInvalid, nil) |
| v0.Type = TypeUInt64 |
| v0.Aux = size.(int64) |
| v.AddArg(v0) |
| v.AddArg(mem) |
| return true |
| } |
| goto end48909259b265a6bb2a076bc2c2dc7d1f |
| end48909259b265a6bb2a076bc2c2dc7d1f: |
| ; |
| case OpMul: |
| // match: (Mul <t> x y) |
| // cond: is64BitInt(t) |
| // result: (MULQ x y) |
| { |
| t := v.Type |
| x := v.Args[0] |
| y := v.Args[1] |
| if !(is64BitInt(t)) { |
| goto endfab0d598f376ecba45a22587d50f7aff |
| } |
| v.Op = OpMULQ |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(x) |
| v.AddArg(y) |
| return true |
| } |
| goto endfab0d598f376ecba45a22587d50f7aff |
| endfab0d598f376ecba45a22587d50f7aff: |
| ; |
| case OpOffPtr: |
| // match: (OffPtr [off] ptr) |
| // cond: |
| // result: (ADDQconst [off] ptr) |
| { |
| off := v.Aux |
| ptr := v.Args[0] |
| v.Op = OpADDQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = off |
| v.AddArg(ptr) |
| return true |
| } |
| goto end0429f947ee7ac49ff45a243e461a5290 |
| end0429f947ee7ac49ff45a243e461a5290: |
| ; |
| case OpSETL: |
| // match: (SETL (InvertFlags x)) |
| // cond: |
| // result: (SETGE x) |
| { |
| if v.Args[0].Op != OpInvertFlags { |
| goto end456c7681d48305698c1ef462d244bdc6 |
| } |
| x := v.Args[0].Args[0] |
| v.Op = OpSETGE |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(x) |
| return true |
| } |
| goto end456c7681d48305698c1ef462d244bdc6 |
| end456c7681d48305698c1ef462d244bdc6: |
| ; |
| case OpSHLQ: |
| // match: (SHLQ x (MOVQconst [c])) |
| // cond: |
| // result: (SHLQconst [c] x) |
| { |
| x := v.Args[0] |
| if v.Args[1].Op != OpMOVQconst { |
| goto endcca412bead06dc3d56ef034a82d184d6 |
| } |
| c := v.Args[1].Aux |
| v.Op = OpSHLQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = c |
| v.AddArg(x) |
| return true |
| } |
| goto endcca412bead06dc3d56ef034a82d184d6 |
| endcca412bead06dc3d56ef034a82d184d6: |
| ; |
| case OpSUBQ: |
| // match: (SUBQ x (MOVQconst [c])) |
| // cond: |
| // result: (SUBQconst x [c]) |
| { |
| x := v.Args[0] |
| if v.Args[1].Op != OpMOVQconst { |
| goto end5a74a63bd9ad15437717c6df3b25eebb |
| } |
| c := v.Args[1].Aux |
| v.Op = OpSUBQconst |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(x) |
| v.Aux = c |
| return true |
| } |
| goto end5a74a63bd9ad15437717c6df3b25eebb |
| end5a74a63bd9ad15437717c6df3b25eebb: |
| ; |
| // match: (SUBQ <t> (MOVQconst [c]) x) |
| // cond: |
| // result: (NEGQ (SUBQconst <t> x [c])) |
| { |
| t := v.Type |
| if v.Args[0].Op != OpMOVQconst { |
| goto end78e66b6fc298684ff4ac8aec5ce873c9 |
| } |
| c := v.Args[0].Aux |
| x := v.Args[1] |
| v.Op = OpNEGQ |
| v.Aux = nil |
| v.resetArgs() |
| v0 := v.Block.NewValue(OpSUBQconst, TypeInvalid, nil) |
| v0.Type = t |
| v0.AddArg(x) |
| v0.Aux = c |
| v.AddArg(v0) |
| return true |
| } |
| goto end78e66b6fc298684ff4ac8aec5ce873c9 |
| end78e66b6fc298684ff4ac8aec5ce873c9: |
| ; |
| case OpStore: |
| // match: (Store ptr val mem) |
| // cond: (is64BitInt(val.Type) || isPtr(val.Type)) |
| // result: (MOVQstore [int64(0)] ptr val mem) |
| { |
| ptr := v.Args[0] |
| val := v.Args[1] |
| mem := v.Args[2] |
| if !(is64BitInt(val.Type) || isPtr(val.Type)) { |
| goto end9680b43f504bc06f9fab000823ce471a |
| } |
| v.Op = OpMOVQstore |
| v.Aux = nil |
| v.resetArgs() |
| v.Aux = int64(0) |
| v.AddArg(ptr) |
| v.AddArg(val) |
| v.AddArg(mem) |
| return true |
| } |
| goto end9680b43f504bc06f9fab000823ce471a |
| end9680b43f504bc06f9fab000823ce471a: |
| ; |
| case OpSub: |
| // match: (Sub <t> x y) |
| // cond: is64BitInt(t) |
| // result: (SUBQ x y) |
| { |
| t := v.Type |
| x := v.Args[0] |
| y := v.Args[1] |
| if !(is64BitInt(t)) { |
| goto ende6ef29f885a8ecf3058212bb95917323 |
| } |
| v.Op = OpSUBQ |
| v.Aux = nil |
| v.resetArgs() |
| v.AddArg(x) |
| v.AddArg(y) |
| return true |
| } |
| goto ende6ef29f885a8ecf3058212bb95917323 |
| ende6ef29f885a8ecf3058212bb95917323: |
| } |
| return false |
| } |