| // Code generated by mkpreempt.go; DO NOT EDIT. |
| |
| #include "go_asm.h" |
| #include "textflag.h" |
| |
| TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 |
| MOVD R30, -240(RSP) |
| SUB $240, RSP |
| MOVD R29, -8(RSP) |
| SUB $8, RSP, R29 |
| #ifdef GOOS_ios |
| MOVD R30, (RSP) |
| #endif |
| // Save GPs |
| STP (R0, R1), 8(RSP) |
| STP (R2, R3), 24(RSP) |
| STP (R4, R5), 40(RSP) |
| STP (R6, R7), 56(RSP) |
| STP (R8, R9), 72(RSP) |
| STP (R10, R11), 88(RSP) |
| STP (R12, R13), 104(RSP) |
| STP (R14, R15), 120(RSP) |
| STP (R16, R17), 136(RSP) |
| STP (R19, R20), 152(RSP) |
| STP (R21, R22), 168(RSP) |
| STP (R23, R24), 184(RSP) |
| STP (R25, R26), 200(RSP) |
| MOVD NZCV, R0 |
| MOVD R0, 216(RSP) |
| MOVD FPSR, R0 |
| MOVD R0, 224(RSP) |
| // Save extended register state to p.xRegs.scratch |
| MOVD g_m(g), R0 |
| MOVD m_p(R0), R0 |
| ADD $(p_xRegs+xRegPerP_scratch), R0, R0 |
| VST1.P [V0.B16, V1.B16, V2.B16, V3.B16], 64(R0) |
| VST1.P [V4.B16, V5.B16, V6.B16, V7.B16], 64(R0) |
| VST1.P [V8.B16, V9.B16, V10.B16, V11.B16], 64(R0) |
| VST1.P [V12.B16, V13.B16, V14.B16, V15.B16], 64(R0) |
| VST1.P [V16.B16, V17.B16, V18.B16, V19.B16], 64(R0) |
| VST1.P [V20.B16, V21.B16, V22.B16, V23.B16], 64(R0) |
| VST1.P [V24.B16, V25.B16, V26.B16, V27.B16], 64(R0) |
| VST1.P [V28.B16, V29.B16, V30.B16, V31.B16], 64(R0) |
| CALL ·asyncPreempt2(SB) |
| // Restore non-GPs from *p.xRegs.cache |
| MOVD g_m(g), R0 |
| MOVD m_p(R0), R0 |
| MOVD (p_xRegs+xRegPerP_cache)(R0), R0 |
| VLD1.P 64(R0), [V0.B16, V1.B16, V2.B16, V3.B16] |
| VLD1.P 64(R0), [V4.B16, V5.B16, V6.B16, V7.B16] |
| VLD1.P 64(R0), [V8.B16, V9.B16, V10.B16, V11.B16] |
| VLD1.P 64(R0), [V12.B16, V13.B16, V14.B16, V15.B16] |
| VLD1.P 64(R0), [V16.B16, V17.B16, V18.B16, V19.B16] |
| VLD1.P 64(R0), [V20.B16, V21.B16, V22.B16, V23.B16] |
| VLD1.P 64(R0), [V24.B16, V25.B16, V26.B16, V27.B16] |
| VLD1.P 64(R0), [V28.B16, V29.B16, V30.B16, V31.B16] |
| // Restore GPs |
| MOVD 224(RSP), R0 |
| MOVD R0, FPSR |
| MOVD 216(RSP), R0 |
| MOVD R0, NZCV |
| LDP 200(RSP), (R25, R26) |
| LDP 184(RSP), (R23, R24) |
| LDP 168(RSP), (R21, R22) |
| LDP 152(RSP), (R19, R20) |
| LDP 136(RSP), (R16, R17) |
| LDP 120(RSP), (R14, R15) |
| LDP 104(RSP), (R12, R13) |
| LDP 88(RSP), (R10, R11) |
| LDP 72(RSP), (R8, R9) |
| LDP 56(RSP), (R6, R7) |
| LDP 40(RSP), (R4, R5) |
| LDP 24(RSP), (R2, R3) |
| LDP 8(RSP), (R0, R1) |
| MOVD 240(RSP), R30 |
| MOVD -8(RSP), R29 |
| MOVD (RSP), R27 |
| ADD $256, RSP |
| RET (R27) |
