internal/simdgen: add broadcast helper methods and SetElem for floats

Generates dev.simd CL 693758

Change-Id: I97b34d453b09054dd1eef4b3f192c2946ff4875f
Reviewed-on: https://go-review.googlesource.com/c/arch/+/693599
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
diff --git a/internal/simdgen/gen_utility.go b/internal/simdgen/gen_utility.go
index 8a3e173..20ce3c1 100644
--- a/internal/simdgen/gen_utility.go
+++ b/internal/simdgen/gen_utility.go
@@ -642,6 +642,9 @@
 		} else if op[idx].OverwriteBase != nil {
 			oBase := *op[idx].OverwriteBase
 			*op[idx].Go = strings.ReplaceAll(*op[idx].Go, capitalizeFirst(*op[idx].Base), capitalizeFirst(oBase))
+			if op[idx].Class == "greg" {
+				*op[idx].Go = strings.ReplaceAll(*op[idx].Go, *op[idx].Base, oBase)
+			}
 			*op[idx].Base = oBase
 		}
 		return nil
diff --git a/internal/simdgen/ops/Moves/categories.yaml b/internal/simdgen/ops/Moves/categories.yaml
index cd9260a..ef8e036 100644
--- a/internal/simdgen/ops/Moves/categories.yaml
+++ b/internal/simdgen/ops/Moves/categories.yaml
@@ -55,3 +55,18 @@
   documentation: !string |-
     // NAME performs an expansion on a vector x whose elements are packed to lower parts.
     // The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
+- go: Broadcast128
+  commutative: false
+  documentation: !string |-
+    // NAME copies element zero of its (128-bit) input to all elements of
+    // the 128-bit output vector.
+- go: Broadcast256
+  commutative: false
+  documentation: !string |-
+    // NAME copies element zero of its (128-bit) input to all elements of
+    // the 256-bit output vector.
+- go: Broadcast512
+  commutative: false
+  documentation: !string |-
+    // NAME copies element zero of its (128-bit) input to all elements of
+    // the 512-bit output vector.
diff --git a/internal/simdgen/ops/Moves/go.yaml b/internal/simdgen/ops/Moves/go.yaml
index 50e2869..71981c1 100644
--- a/internal/simdgen/ops/Moves/go.yaml
+++ b/internal/simdgen/ops/Moves/go.yaml
@@ -15,6 +15,24 @@
   out:
   - *t
 
+- go: SetElem
+  asm: "VPINSR[DQ]"
+  in:
+  - &t
+    class: vreg
+    base: int
+    OverwriteBase: float
+  - class: greg
+    base: int
+    OverwriteBase: float
+    lanes: 1 # Scalar, darn it!
+  - &imm
+    class: immediate
+    immOffset: 0
+    name: index
+  out:
+  - *t
+
 - go: GetElem
   asm: "VPEXTR[BWDQ]"
   in:
@@ -195,10 +213,10 @@
 
 - go: Permute2
   asm: "VPERMI2[BWDQ]|VPERMI2P[SD]"
-  # Because we are overwriting the receiver's type, we 
+  # Because we are overwriting the receiver's type, we
   # have to move the receiver to be a parameter so that
   # we can have no duplication.
-  operandOrder: "231Type1" 
+  operandOrder: "231Type1"
   in:
   - *anyindices # result in arg 0
   - *any
@@ -218,16 +236,16 @@
 # For now a non-public method because
 # (1) [OverwriteClass] must be set together with [OverwriteBase]
 # (2) "simdgen does not support [OverwriteClass] in inputs".
-# That means the signature is wrong.  
+# That means the signature is wrong.
 - go: blend
   asm: VPBLENDVB
-  in: 
+  in:
   - &v
     go: $t
     class: vreg
     base: int
   - *v
-  - 
+  -
     class: vreg
     base: int
     name: mask
@@ -237,15 +255,15 @@
 # For AVX512
 - go: blend
   asm: VPBLENDM[BWDQ]
-  in: 
+  in:
   - &v
     go: $t
     bits: 512
     class: vreg
     base: int
   - *v
-  inVariant: 
-  - 
+  inVariant:
+  -
     class: mask
   out:
   - *v
@@ -258,3 +276,97 @@
   - *any
   out:
   - *any
+
+- go: Broadcast128
+  asm: VPBROADCAST[BWDQ]
+  in:
+  - class: vreg
+    bits: 128
+    elemBits: $e
+    base: $b
+  out:
+  - class: vreg
+    bits: 128
+    elemBits: $e
+    base: $b
+
+# weirdly, this one case on AVX2 is memory-operand-only
+- go: Broadcast128
+  asm: VPBROADCASTQ
+  in:
+  - class: vreg
+    bits: 128
+    elemBits: 64
+    base: int
+    OverwriteBase: float
+  out:
+  - class: vreg
+    bits: 128
+    elemBits: 64
+    base: int
+    OverwriteBase: float
+
+- go: Broadcast256
+  asm: VPBROADCAST[BWDQ]
+  in:
+  - class: vreg
+    bits: 128
+    elemBits: $e
+    base: $b
+  out:
+  - class: vreg
+    bits: 256
+    elemBits: $e
+    base: $b
+
+- go: Broadcast512
+  asm: VPBROADCAST[BWDQ]
+  in:
+  - class: vreg
+    bits: 128
+    elemBits: $e
+    base: $b
+  out:
+  - class: vreg
+    bits: 512
+    elemBits: $e
+    base: $b
+
+- go: Broadcast128
+  asm: VBROADCASTS[SD]
+  in:
+  - class: vreg
+    bits: 128
+    elemBits: $e
+    base: $b
+  out:
+  - class: vreg
+    bits: 128
+    elemBits: $e
+    base: $b
+
+- go: Broadcast256
+  asm: VBROADCASTS[SD]
+  in:
+  - class: vreg
+    bits: 128
+    elemBits: $e
+    base: $b
+  out:
+  - class: vreg
+    bits: 256
+    elemBits: $e
+    base: $b
+
+- go: Broadcast512
+  asm: VBROADCASTS[SD]
+  in:
+  - class: vreg
+    bits: 128
+    elemBits: $e
+    base: $b
+  out:
+  - class: vreg
+    bits: 512
+    elemBits: $e
+    base: $b