x86: pull CL18840 - SDM->x86.csv converter

Add x86spec package that is capable to generate x86.csv
version 0.2.

New x86.csv does not replace v0.1 to avoid unexpected
code breaks (x86/x86map depends on v0.1).
This can be solved in another CL.

The rationale behind this is x86avxgen tool that
requires v0.2 spec.

See https://go-review.googlesource.com/#/c/arch/+/18840/

Change-Id: Iea93e1174a5a79b9b50bf99f626e3c48b19ad5c1
Reviewed-on: https://go-review.googlesource.com/66970
Run-TryBot: Iskander Sharipov <iskander.sharipov@intel.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Russ Cox <rsc@golang.org>
diff --git a/x86/x86.v0.2.csv b/x86/x86.v0.2.csv
new file mode 100644
index 0000000..b804869
--- /dev/null
+++ b/x86/x86.v0.2.csv
@@ -0,0 +1,2261 @@
+# x86 instruction set description version 0.2, 2017-09-28
+# Based on Intel Instruction Set Reference #325383-057US, December 2015.
+# https://golang.org/x/arch/x86/x86spec
+"AAD","AAD","aad","D5 0A","V","I","","pseudo","","",""
+"AAD imm8","AAD imm8","aad imm8","D5 ib","V","I","","","r","",""
+"AAM","AAM","aam","D4 0A","V","I","","pseudo","","",""
+"AAM imm8","AAM imm8","aam imm8","D4 ib","V","I","","","r","",""
+"ADC AL, imm8","ADCB imm8, AL","adcb imm8, AL","14 ib","V","V","","","rw,r","Y","8"
+"ADC AX, imm16","ADCW imm16, AX","adcw imm16, AX","15 iw","V","V","","operand16","rw,r","Y","16"
+"ADC EAX, imm32","ADCL imm32, EAX","adcl imm32, EAX","15 id","V","V","","operand32","rw,r","Y","32"
+"ADC RAX, imm32","ADCQ imm32, RAX","adcq imm32, RAX","REX.W 15 id","N.E.","V","","","rw,r","Y","64"
+"ADC r/m16, imm16","ADCW imm16, r/m16","adcw imm16, r/m16","81 /2 iw","V","V","","operand16","rw,r","Y","16"
+"ADC r/m16, imm8","ADCW imm8, r/m16","adcw imm8, r/m16","83 /2 ib","V","V","","operand16","rw,r","Y","16"
+"ADC r/m16, r16","ADCW r16, r/m16","adcw r16, r/m16","11 /r","V","V","","operand16","rw,r","Y","16"
+"ADC r/m32, imm32","ADCL imm32, r/m32","adcl imm32, r/m32","81 /2 id","V","V","","operand32","rw,r","Y","32"
+"ADC r/m32, imm8","ADCL imm8, r/m32","adcl imm8, r/m32","83 /2 ib","V","V","","operand32","rw,r","Y","32"
+"ADC r/m32, r32","ADCL r32, r/m32","adcl r32, r/m32","11 /r","V","V","","operand32","rw,r","Y","32"
+"ADC r/m64, imm32","ADCQ imm32, r/m64","adcq imm32, r/m64","REX.W 81 /2 id","N.E.","V","","","rw,r","Y","64"
+"ADC r/m64, imm8","ADCQ imm8, r/m64","adcq imm8, r/m64","REX.W 83 /2 ib","N.E.","V","","","rw,r","Y","64"
+"ADC r/m64, r64","ADCQ r64, r/m64","adcq r64, r/m64","REX.W 11 /r","N.E.","V","","","rw,r","Y","64"
+"ADC r/m8, imm8","ADCB imm8, r/m8","adcb imm8, r/m8","80 /2 ib","V","V","","","rw,r","Y","8"
+"ADC r/m8, imm8","ADCB imm8, r/m8","adcb imm8, r/m8","REX 80 /2 ib","N.E.","V","","pseudo64","rw,r","Y","8"
+"ADC r/m8, r8","ADCB r8, r/m8","adcb r8, r/m8","10 /r","V","V","","","rw,r","Y","8"
+"ADC r/m8, r8","ADCB r8, r/m8","adcb r8, r/m8","REX 10 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"ADC r16, r/m16","ADCW r/m16, r16","adcw r/m16, r16","13 /r","V","V","","operand16","rw,r","Y","16"
+"ADC r32, r/m32","ADCL r/m32, r32","adcl r/m32, r32","13 /r","V","V","","operand32","rw,r","Y","32"
+"ADC r64, r/m64","ADCQ r/m64, r64","adcq r/m64, r64","REX.W 13 /r","N.E.","V","","","rw,r","Y","64"
+"ADC r8, r/m8","ADCB r/m8, r8","adcb r/m8, r8","12 /r","V","V","","","rw,r","Y","8"
+"ADC r8, r/m8","ADCB r/m8, r8","adcb r/m8, r8","REX 12 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"ADCX r32, r/m32","ADCXL r/m32, r32","adcxl r/m32, r32","66 0F 38 F6 /r","V","V","ADX","operand16,operand32","rw,r","Y","32"
+"ADCX r64, r/m64","ADCXQ r/m64, r64","adcxq r/m64, r64","66 REX.W 0F 38 F6 /r","N.E.","V","ADX","","rw,r","Y","64"
+"ADD AL, imm8","ADDB imm8, AL","addb imm8, AL","04 ib","V","V","","","rw,r","Y","8"
+"ADD AX, imm16","ADDW imm16, AX","addw imm16, AX","05 iw","V","V","","operand16","rw,r","Y","16"
+"ADD EAX, imm32","ADDL imm32, EAX","addl imm32, EAX","05 id","V","V","","operand32","rw,r","Y","32"
+"ADD RAX, imm32","ADDQ imm32, RAX","addq imm32, RAX","REX.W 05 id","N.E.","V","","","rw,r","Y","64"
+"ADD r/m16, imm16","ADDW imm16, r/m16","addw imm16, r/m16","81 /0 iw","V","V","","operand16","rw,r","Y","16"
+"ADD r/m16, imm8","ADDW imm8, r/m16","addw imm8, r/m16","83 /0 ib","V","V","","operand16","rw,r","Y","16"
+"ADD r/m16, r16","ADDW r16, r/m16","addw r16, r/m16","01 /r","V","V","","operand16","rw,r","Y","16"
+"ADD r/m32, imm32","ADDL imm32, r/m32","addl imm32, r/m32","81 /0 id","V","V","","operand32","rw,r","Y","32"
+"ADD r/m32, imm8","ADDL imm8, r/m32","addl imm8, r/m32","83 /0 ib","V","V","","operand32","rw,r","Y","32"
+"ADD r/m32, r32","ADDL r32, r/m32","addl r32, r/m32","01 /r","V","V","","operand32","rw,r","Y","32"
+"ADD r/m64, imm32","ADDQ imm32, r/m64","addq imm32, r/m64","REX.W 81 /0 id","N.E.","V","","","rw,r","Y","64"
+"ADD r/m64, imm8","ADDQ imm8, r/m64","addq imm8, r/m64","REX.W 83 /0 ib","N.E.","V","","","rw,r","Y","64"
+"ADD r/m64, r64","ADDQ r64, r/m64","addq r64, r/m64","REX.W 01 /r","N.E.","V","","","rw,r","Y","64"
+"ADD r/m8, imm8","ADDB imm8, r/m8","addb imm8, r/m8","80 /0 ib","V","V","","","rw,r","Y","8"
+"ADD r/m8, imm8","ADDB imm8, r/m8","addb imm8, r/m8","REX 80 /0 ib","N.E.","V","","pseudo64","rw,r","Y","8"
+"ADD r/m8, r8","ADDB r8, r/m8","addb r8, r/m8","00 /r","V","V","","","rw,r","Y","8"
+"ADD r/m8, r8","ADDB r8, r/m8","addb r8, r/m8","REX 00 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"ADD r16, r/m16","ADDW r/m16, r16","addw r/m16, r16","03 /r","V","V","","operand16","rw,r","Y","16"
+"ADD r32, r/m32","ADDL r/m32, r32","addl r/m32, r32","03 /r","V","V","","operand32","rw,r","Y","32"
+"ADD r64, r/m64","ADDQ r/m64, r64","addq r/m64, r64","REX.W 03 /r","N.E.","V","","","rw,r","Y","64"
+"ADD r8, r/m8","ADDB r/m8, r8","addb r/m8, r8","02 /r","V","V","","","rw,r","Y","8"
+"ADD r8, r/m8","ADDB r/m8, r8","addb r/m8, r8","REX 02 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"ADDPD xmm1, xmm2/m128","ADDPD xmm2/m128, xmm1","addpd xmm2/m128, xmm1","66 0F 58 /r","V","V","SSE2","","rw,r","",""
+"ADDPS xmm1, xmm2/m128","ADDPS xmm2/m128, xmm1","addps xmm2/m128, xmm1","0F 58 /r","V","V","SSE","","rw,r","",""
+"ADDSD xmm1, xmm2/m64","ADDSD xmm2/m64, xmm1","addsd xmm2/m64, xmm1","F2 0F 58 /r","V","V","SSE2","","rw,r","",""
+"ADDSS xmm1, xmm2/m32","ADDSS xmm2/m32, xmm1","addss xmm2/m32, xmm1","F3 0F 58 /r","V","V","SSE","","rw,r","",""
+"ADDSUBPD xmm1, xmm2/m128","ADDSUBPD xmm2/m128, xmm1","addsubpd xmm2/m128, xmm1","66 0F D0 /r","V","V","SSE3","","rw,r","",""
+"ADDSUBPS xmm1, xmm2/m128","ADDSUBPS xmm2/m128, xmm1","addsubps xmm2/m128, xmm1","F2 0F D0 /r","V","V","SSE3","","rw,r","",""
+"ADOX r32, r/m32","ADOXL r/m32, r32","adoxl r/m32, r32","F3 0F 38 F6 /r","V","V","ADX","operand16,operand32","rw,r","Y","32"
+"ADOX r64, r/m64","ADOXQ r/m64, r64","adoxq r/m64, r64","F3 REX.W 0F 38 F6 /r","N.E.","V","ADX","","rw,r","Y","64"
+"AESDEC xmm1, xmm2/m128","AESDEC xmm2/m128, xmm1","aesdec xmm2/m128, xmm1","66 0F 38 DE /r","V","V","AES","","rw,r","",""
+"AESDECLAST xmm1, xmm2/m128","AESDECLAST xmm2/m128, xmm1","aesdeclast xmm2/m128, xmm1","66 0F 38 DF /r","V","V","AES","","rw,r","",""
+"AESENC xmm1, xmm2/m128","AESENC xmm2/m128, xmm1","aesenc xmm2/m128, xmm1","66 0F 38 DC /r","V","V","AES","","rw,r","",""
+"AESENCLAST xmm1, xmm2/m128","AESENCLAST xmm2/m128, xmm1","aesenclast xmm2/m128, xmm1","66 0F 38 DD /r","V","V","AES","","rw,r","",""
+"AESIMC xmm1, xmm2/m128","AESIMC xmm2/m128, xmm1","aesimc xmm2/m128, xmm1","66 0F 38 DB /r","V","V","AES","","w,r","",""
+"AESKEYGENASSIST xmm1, xmm2/m128, imm8","AESKEYGENASSIST imm8, xmm2/m128, xmm1","aeskeygenassist imm8, xmm2/m128, xmm1","66 0F 3A DF /r ib","V","V","AES","","w,r,r","",""
+"AND AL, imm8","ANDB imm8, AL","andb imm8, AL","24 ib","V","V","","","rw,r","Y","8"
+"AND AX, imm16","ANDW imm16, AX","andw imm16, AX","25 iw","V","V","","operand16","rw,r","Y","16"
+"AND EAX, imm32","ANDL imm32, EAX","andl imm32, EAX","25 id","V","V","","operand32","rw,r","Y","32"
+"AND RAX, imm32","ANDQ imm32, RAX","andq imm32, RAX","REX.W 25 id","N.E.","V","","","rw,r","Y","64"
+"AND r/m16, imm16","ANDW imm16, r/m16","andw imm16, r/m16","81 /4 iw","V","V","","operand16","rw,r","Y","16"
+"AND r/m16, imm8","ANDW imm8, r/m16","andw imm8, r/m16","83 /4 ib","V","V","","operand16","rw,r","Y","16"
+"AND r/m16, r16","ANDW r16, r/m16","andw r16, r/m16","21 /r","V","V","","operand16","rw,r","Y","16"
+"AND r/m32, imm32","ANDL imm32, r/m32","andl imm32, r/m32","81 /4 id","V","V","","operand32","rw,r","Y","32"
+"AND r/m32, imm8","ANDL imm8, r/m32","andl imm8, r/m32","83 /4 ib","V","V","","operand32","rw,r","Y","32"
+"AND r/m32, r32","ANDL r32, r/m32","andl r32, r/m32","21 /r","V","V","","operand32","rw,r","Y","32"
+"AND r/m64, imm32","ANDQ imm32, r/m64","andq imm32, r/m64","REX.W 81 /4 id","N.E.","V","","","rw,r","Y","64"
+"AND r/m64, imm8","ANDQ imm8, r/m64","andq imm8, r/m64","REX.W 83 /4 ib","N.E.","V","","","rw,r","Y","64"
+"AND r/m64, r64","ANDQ r64, r/m64","andq r64, r/m64","REX.W 21 /r","N.E.","V","","","rw,r","Y","64"
+"AND r/m8, imm8","ANDB imm8, r/m8","andb imm8, r/m8","80 /4 ib","V","V","","","rw,r","Y","8"
+"AND r/m8, imm8","ANDB imm8, r/m8","andb imm8, r/m8","REX 80 /4 ib","N.E.","V","","pseudo64","rw,r","Y","8"
+"AND r/m8, r8","ANDB r8, r/m8","andb r8, r/m8","20 /r","V","V","","","rw,r","Y","8"
+"AND r/m8, r8","ANDB r8, r/m8","andb r8, r/m8","REX 20 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"AND r16, r/m16","ANDW r/m16, r16","andw r/m16, r16","23 /r","V","V","","operand16","rw,r","Y","16"
+"AND r32, r/m32","ANDL r/m32, r32","andl r/m32, r32","23 /r","V","V","","operand32","rw,r","Y","32"
+"AND r64, r/m64","ANDQ r/m64, r64","andq r/m64, r64","REX.W 23 /r","N.E.","V","","","rw,r","Y","64"
+"AND r8, r/m8","ANDB r/m8, r8","andb r/m8, r8","22 /r","V","V","","","rw,r","Y","8"
+"AND r8, r/m8","ANDB r/m8, r8","andb r/m8, r8","REX 22 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"ANDN r32, r32V, r/m32","ANDNL r/m32, r32V, r32","andnl r/m32, r32V, r32","VEX.NDS.LZ.0F38.W0 F2 /r","V","V","BMI1","","w,r,r","Y","32"
+"ANDN r64, r64V, r/m64","ANDNQ r/m64, r64V, r64","andnq r/m64, r64V, r64","VEX.NDS.LZ.0F38.W1 F2 /r","N.E.","V","BMI1","","w,r,r","Y","64"
+"ANDNPD xmm1, xmm2/m128","ANDNPD xmm2/m128, xmm1","andnpd xmm2/m128, xmm1","66 0F 55 /r","V","V","SSE2","","rw,r","",""
+"ANDNPS xmm1, xmm2/m128","ANDNPS xmm2/m128, xmm1","andnps xmm2/m128, xmm1","0F 55 /r","V","V","SSE","","rw,r","",""
+"ANDPD xmm1, xmm2/m128","ANDPD xmm2/m128, xmm1","andpd xmm2/m128, xmm1","66 0F 54 /r","V","V","SSE2","","rw,r","",""
+"ANDPS xmm1, xmm2/m128","ANDPS xmm2/m128, xmm1","andps xmm2/m128, xmm1","0F 54 /r","V","V","SSE","","rw,r","",""
+"ARPL r/m16, r16","ARPL r16, r/m16","arpl r16, r/m16","63 /r","V","N.E.","","operand16,operand32","w,r","",""
+"BEXTR r32, r/m32, r32V","BEXTRL r32V, r/m32, r32","bextrl r32V, r/m32, r32","VEX.NDS.LZ.0F38.W0 F7 /r","V","V","BMI1","","w,r,r","Y","32"
+"BEXTR r64, r/m64, r64V","BEXTRQ r64V, r/m64, r64","bextrq r64V, r/m64, r64","VEX.NDS.LZ.0F38.W1 F7 /r","N.E.","V","BMI1","","w,r,r","Y","64"
+"BLENDPD xmm1, xmm2/m128, imm8","BLENDPD imm8, xmm2/m128, xmm1","blendpd imm8, xmm2/m128, xmm1","66 0F 3A 0D /r ib","V","V","SSE4_1","","rw,r,r","",""
+"BLENDPS xmm1, xmm2/m128, imm8","BLENDPS imm8, xmm2/m128, xmm1","blendps imm8, xmm2/m128, xmm1","66 0F 3A 0C /r ib","V","V","SSE4_1","","rw,r,r","",""
+"BLENDVPD xmm1, xmm2/m128, <XMM0>","BLENDVPD <XMM0>, xmm2/m128, xmm1","blendvpd <XMM0>, xmm2/m128, xmm1","66 0F 38 15 /r","V","V","SSE4_1","","rw,r,r","",""
+"BLENDVPS xmm1, xmm2/m128, <XMM0>","BLENDVPS <XMM0>, xmm2/m128, xmm1","blendvps <XMM0>, xmm2/m128, xmm1","66 0F 38 14 /r","V","V","SSE4_1","","rw,r,r","",""
+"BLSI r32V, r/m32","BLSIL r/m32, r32V","blsil r/m32, r32V","VEX.NDD.LZ.0F38.W0 F3 /3","V","V","BMI1","","w,r","Y","32"
+"BLSI r64V, r/m64","BLSIQ r/m64, r64V","blsiq r/m64, r64V","VEX.NDD.LZ.0F38.W1 F3 /3","N.E.","V","BMI1","","w,r","Y","64"
+"BLSMSK r32V, r/m32","BLSMSKL r/m32, r32V","blsmskl r/m32, r32V","VEX.NDD.LZ.0F38.W0 F3 /2","V","V","BMI1","","w,r","Y","32"
+"BLSMSK r64V, r/m64","BLSMSKQ r/m64, r64V","blsmskq r/m64, r64V","VEX.NDD.LZ.0F38.W1 F3 /2","N.E.","V","BMI1","","w,r","Y","64"
+"BLSR r32V, r/m32","BLSRL r/m32, r32V","blsrl r/m32, r32V","VEX.NDD.LZ.0F38.W0 F3 /1","V","V","BMI1","","w,r","Y","32"
+"BLSR r64V, r/m64","BLSRQ r/m64, r64V","blsrq r/m64, r64V","VEX.NDD.LZ.0F38.W1 F3 /1","N.E.","V","BMI1","","w,r","Y","64"
+"BNDCL bnd1, r/m32","BNDCL r/m32, bnd1","bndcl r/m32, bnd1","F3 0F 1A /r","V","N.E.","MPX","","w,r","",""
+"BNDCL bnd1, r/m64","BNDCL r/m64, bnd1","bndcl r/m64, bnd1","F3 0F 1A /r","N.E.","V","MPX","","w,r","",""
+"BNDCN bnd1, r/m32","BNDCN r/m32, bnd1","bndcn r/m32, bnd1","F2 0F 1B /r","V","N.E.","MPX","","w,r","",""
+"BNDCN bnd1, r/m64","BNDCN r/m64, bnd1","bndcn r/m64, bnd1","F2 0F 1B /r","N.E.","V","MPX","","w,r","",""
+"BNDCU bnd1, r/m32","BNDCU r/m32, bnd1","bndcu r/m32, bnd1","F2 0F 1A /r","V","N.E.","MPX","","w,r","",""
+"BNDCU bnd1, r/m64","BNDCU r/m64, bnd1","bndcu r/m64, bnd1","F2 0F 1A /r","N.E.","V","MPX","","w,r","",""
+"BNDLDX bnd1, mib","BNDLDX mib, bnd1","bndldx mib, bnd1","0F 1A /r","V","V","MPX","","w,r","",""
+"BNDMK bnd1, m32","BNDMK m32, bnd1","bndmk m32, bnd1","F3 0F 1B /r","V","N.E.","MPX","modrm_memonly","w,r","",""
+"BNDMK bnd1, m64","BNDMK m64, bnd1","bndmk m64, bnd1","F3 0F 1B /r","N.E.","V","MPX","modrm_memonly","w,r","",""
+"BNDMOV bnd1, bnd2/m128","BNDMOV bnd2/m128, bnd1","bndmov bnd2/m128, bnd1","66 0F 1A /r","N.E.","V","MPX","","w,r","",""
+"BNDMOV bnd1, bnd2/m64","BNDMOV bnd2/m64, bnd1","bndmov bnd2/m64, bnd1","66 0F 1A /r","V","N.E.","MPX","","w,r","",""
+"BNDMOV bnd2/m128, bnd1","BNDMOV bnd1, bnd2/m128","bndmov bnd1, bnd2/m128","66 0F 1B /r","N.E.","V","MPX","","w,r","",""
+"BNDMOV bnd2/m64, bnd1","BNDMOV bnd1, bnd2/m64","bndmov bnd1, bnd2/m64","66 0F 1B /r","V","N.E.","MPX","","w,r","",""
+"BNDSTX mib, bnd1","BNDSTX bnd1, mib","bndstx bnd1, mib","0F 1B /r","V","V","MPX","","r,r","",""
+"BOUND r16, m16&16","BOUNDW m16&16, r16","boundw r16, m16&16","62 /r","V","I","","operand16","r,r","Y","16"
+"BOUND r32, m32&32","BOUNDL m32&32, r32","boundl r32, m32&32","62 /r","V","I","","operand32","r,r","Y","32"
+"BSF r16, r/m16","BSFW r/m16, r16","bsfw r/m16, r16","0F BC /r","V","V","","operand16","w,r","Y","16"
+"BSF r32, r/m32","BSFL r/m32, r32","bsfl r/m32, r32","0F BC /r","V","V","","operand32","w,r","Y","32"
+"BSF r64, r/m64","BSFQ r/m64, r64","bsfq r/m64, r64","REX.W 0F BC /r","N.E.","V","","","w,r","Y","64"
+"BSR r16, r/m16","BSRW r/m16, r16","bsrw r/m16, r16","0F BD /r","V","V","","operand16","w,r","Y","16"
+"BSR r32, r/m32","BSRL r/m32, r32","bsrl r/m32, r32","0F BD /r","V","V","","operand32","w,r","Y","32"
+"BSR r64, r/m64","BSRQ r/m64, r64","bsrq r/m64, r64","REX.W 0F BD /r","N.E.","V","","","w,r","Y","64"
+"BSWAP r16op","BSWAPW r16op","bswap r16op","0F C8+rd","V","V","","operand16","rw","Y","16"
+"BSWAP r32op","BSWAPL r32op","bswap r32op","0F C8+rd","V","V","","operand32","rw","Y","32"
+"BSWAP r64op","BSWAPQ r64op","bswap r64op","REX.W 0F C8+rd","N.E.","V","","","rw","Y","64"
+"BT r/m16, imm8","BTW imm8, r/m16","btw imm8, r/m16","0F BA /4 ib","V","V","","operand16","r,r","Y","16"
+"BT r/m16, r16","BTW r16, r/m16","btw r16, r/m16","0F A3 /r","V","V","","operand16","r,r","Y","16"
+"BT r/m32, imm8","BTL imm8, r/m32","btl imm8, r/m32","0F BA /4 ib","V","V","","operand32","r,r","Y","32"
+"BT r/m32, r32","BTL r32, r/m32","btl r32, r/m32","0F A3 /r","V","V","","operand32","r,r","Y","32"
+"BT r/m64, imm8","BTQ imm8, r/m64","btq imm8, r/m64","REX.W 0F BA /4 ib","N.E.","V","","","r,r","Y","64"
+"BT r/m64, r64","BTQ r64, r/m64","btq r64, r/m64","REX.W 0F A3 /r","N.E.","V","","","r,r","Y","64"
+"BTC r/m16, imm8","BTCW imm8, r/m16","btcw imm8, r/m16","0F BA /7 ib","V","V","","operand16","rw,r","Y","16"
+"BTC r/m16, r16","BTCW r16, r/m16","btcw r16, r/m16","0F BB /r","V","V","","operand16","rw,r","Y","16"
+"BTC r/m32, imm8","BTCL imm8, r/m32","btcl imm8, r/m32","0F BA /7 ib","V","V","","operand32","rw,r","Y","32"
+"BTC r/m32, r32","BTCL r32, r/m32","btcl r32, r/m32","0F BB /r","V","V","","operand32","rw,r","Y","32"
+"BTC r/m64, imm8","BTCQ imm8, r/m64","btcq imm8, r/m64","REX.W 0F BA /7 ib","N.E.","V","","","rw,r","Y","64"
+"BTC r/m64, r64","BTCQ r64, r/m64","btcq r64, r/m64","REX.W 0F BB /r","N.E.","V","","","rw,r","Y","64"
+"BTR r/m16, imm8","BTRW imm8, r/m16","btrw imm8, r/m16","0F BA /6 ib","V","V","","operand16","rw,r","Y","16"
+"BTR r/m16, r16","BTRW r16, r/m16","btrw r16, r/m16","0F B3 /r","V","V","","operand16","rw,r","Y","16"
+"BTR r/m32, imm8","BTRL imm8, r/m32","btrl imm8, r/m32","0F BA /6 ib","V","V","","operand32","rw,r","Y","32"
+"BTR r/m32, r32","BTRL r32, r/m32","btrl r32, r/m32","0F B3 /r","V","V","","operand32","rw,r","Y","32"
+"BTR r/m64, imm8","BTRQ imm8, r/m64","btrq imm8, r/m64","REX.W 0F BA /6 ib","N.E.","V","","","rw,r","Y","64"
+"BTR r/m64, r64","BTRQ r64, r/m64","btrq r64, r/m64","REX.W 0F B3 /r","N.E.","V","","","rw,r","Y","64"
+"BTS r/m16, imm8","BTSW imm8, r/m16","btsw imm8, r/m16","0F BA /5 ib","V","V","","operand16","rw,r","Y","16"
+"BTS r/m16, r16","BTSW r16, r/m16","btsw r16, r/m16","0F AB /r","V","V","","operand16","rw,r","Y","16"
+"BTS r/m32, imm8","BTSL imm8, r/m32","btsl imm8, r/m32","0F BA /5 ib","V","V","","operand32","rw,r","Y","32"
+"BTS r/m32, r32","BTSL r32, r/m32","btsl r32, r/m32","0F AB /r","V","V","","operand32","rw,r","Y","32"
+"BTS r/m64, imm8","BTSQ imm8, r/m64","btsq imm8, r/m64","REX.W 0F BA /5 ib","N.E.","V","","","rw,r","Y","64"
+"BTS r/m64, r64","BTSQ r64, r/m64","btsq r64, r/m64","REX.W 0F AB /r","N.E.","V","","","rw,r","Y","64"
+"BZHI r32, r/m32, r32V","BZHIL r32V, r/m32, r32","bzhil r32V, r/m32, r32","VEX.NDS.LZ.0F38.W0 F5 /r","V","V","BMI2","","w,r,r","Y","32"
+"BZHI r64, r/m64, r64V","BZHIQ r64V, r/m64, r64","bzhiq r64V, r/m64, r64","VEX.NDS.LZ.0F38.W1 F5 /r","N.E.","V","BMI2","","w,r,r","Y","64"
+"CALL r/m16","CALLW* r/m16","callw* r/m16","FF /2","V","N.E.","","operand16","r","Y","16"
+"CALL r/m32","CALLL* r/m32","calll* r/m32","FF /2","V","N.E.","","operand32","r","Y","32"
+"CALL r/m64","CALLQ* r/m64","callq* r/m64","FF /2","N.E.","V","","","r","Y","64"
+"CALL rel16","CALL rel16","call rel16","E8 cw","V","N.S.","","operand16","r","Y",""
+"CALL rel32","CALL rel32","call rel32","E8 cd","V","V","","operand32","r","Y",""
+"CALL rel32","CALL rel32","call rel32","E8 cd","N.S.","V","","operand16,operand64","r","Y",""
+"CALL_FAR m16:16","LCALLW* m16:16","lcallw* m16:16","FF /3","V","V","","operand16","r","Y",""
+"CALL_FAR m16:32","LCALLL* m16:32","lcalll* m16:32","FF /3","V","V","","operand32","r","Y",""
+"CALL_FAR m16:64","LCALLQ* m16:64","lcallq* m16:64","REX.W FF /3","N.E.","V","","","r","Y",""
+"CALL_FAR ptr16:16","LCALLW ptr16:16","lcallw ptr16:16","9A cd","V","I","","operand16","r","Y",""
+"CALL_FAR ptr16:32","LCALLL ptr16:32","lcalll ptr16:32","9A cp","V","I","","operand32","r","Y",""
+"CDQE","CDQE","cltq","REX.W 98","N.E.","V","","","","",""
+"CLAC","CLAC","clac","0F 01 CA","V","V","","","","",""
+"CLFLUSH m8","CLFLUSH m8","clflush m8","0F AE /7","V","V","","modrm_memonly","w","",""
+"CLFLUSHOPT m8","CLFLUSHOPT m8","clflushopt m8","66 0F AE /7","V","V","","modrm_memonly","w","",""
+"CLTS","CLTS","clts","0F 06","V","V","","","","",""
+"CMOVA r16, r/m16","CMOVWHI r/m16, r16","cmovaw r/m16, r16","0F 47 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVA r32, r/m32","CMOVLHI r/m32, r32","cmoval r/m32, r32","0F 47 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVA r64, r/m64","CMOVQHI r/m64, r64","cmovaq r/m64, r64","REX.W 0F 47 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVAE r16, r/m16","CMOVWCC r/m16, r16","cmovaew r/m16, r16","0F 43 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVAE r32, r/m32","CMOVLCC r/m32, r32","cmovael r/m32, r32","0F 43 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVAE r64, r/m64","CMOVQCC r/m64, r64","cmovaeq r/m64, r64","REX.W 0F 43 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVB r16, r/m16","CMOVWCS r/m16, r16","cmovbw r/m16, r16","0F 42 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVB r32, r/m32","CMOVLCS r/m32, r32","cmovbl r/m32, r32","0F 42 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVB r64, r/m64","CMOVQCS r/m64, r64","cmovbq r/m64, r64","REX.W 0F 42 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVBE r16, r/m16","CMOVWLS r/m16, r16","cmovbew r/m16, r16","0F 46 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVBE r32, r/m32","CMOVLLS r/m32, r32","cmovbel r/m32, r32","0F 46 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVBE r64, r/m64","CMOVQLS r/m64, r64","cmovbeq r/m64, r64","REX.W 0F 46 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVC r16, r/m16","CMOVC r/m16, r16","cmovc r/m16, r16","0F 42 /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVC r32, r/m32","CMOVC r/m32, r32","cmovc r/m32, r32","0F 42 /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVC r64, r/m64","CMOVC r/m64, r64","cmovc r/m64, r64","REX.W 0F 42 /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVE r16, r/m16","CMOVWEQ r/m16, r16","cmovew r/m16, r16","0F 44 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVE r32, r/m32","CMOVLEQ r/m32, r32","cmovel r/m32, r32","0F 44 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVE r64, r/m64","CMOVQEQ r/m64, r64","cmoveq r/m64, r64","REX.W 0F 44 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVG r16, r/m16","CMOVWGT r/m16, r16","cmovgw r/m16, r16","0F 4F /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVG r32, r/m32","CMOVLGT r/m32, r32","cmovgl r/m32, r32","0F 4F /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVG r64, r/m64","CMOVQGT r/m64, r64","cmovgq r/m64, r64","REX.W 0F 4F /r","N.E.","V","","","rw,r","Y","64"
+"CMOVGE r16, r/m16","CMOVWGE r/m16, r16","cmovgew r/m16, r16","0F 4D /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVGE r32, r/m32","CMOVLGE r/m32, r32","cmovgel r/m32, r32","0F 4D /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVGE r64, r/m64","CMOVQGE r/m64, r64","cmovgeq r/m64, r64","REX.W 0F 4D /r","N.E.","V","","","rw,r","Y","64"
+"CMOVL r16, r/m16","CMOVWLT r/m16, r16","cmovlw r/m16, r16","0F 4C /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVL r32, r/m32","CMOVLLT r/m32, r32","cmovll r/m32, r32","0F 4C /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVL r64, r/m64","CMOVQLT r/m64, r64","cmovlq r/m64, r64","REX.W 0F 4C /r","N.E.","V","","","rw,r","Y","64"
+"CMOVLE r16, r/m16","CMOVWLE r/m16, r16","cmovlew r/m16, r16","0F 4E /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVLE r32, r/m32","CMOVLLE r/m32, r32","cmovlel r/m32, r32","0F 4E /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVLE r64, r/m64","CMOVQLE r/m64, r64","cmovleq r/m64, r64","REX.W 0F 4E /r","N.E.","V","","","rw,r","Y","64"
+"CMOVNA r16, r/m16","CMOVNA r/m16, r16","cmovna r/m16, r16","0F 46 /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNA r32, r/m32","CMOVNA r/m32, r32","cmovna r/m32, r32","0F 46 /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNA r64, r/m64","CMOVNA r/m64, r64","cmovna r/m64, r64","REX.W 0F 46 /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVNAE r16, r/m16","CMOVNAE r/m16, r16","cmovnae r/m16, r16","0F 42 /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNAE r32, r/m32","CMOVNAE r/m32, r32","cmovnae r/m32, r32","0F 42 /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNAE r64, r/m64","CMOVNAE r/m64, r64","cmovnae r/m64, r64","REX.W 0F 42 /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVNB r16, r/m16","CMOVNB r/m16, r16","cmovnb r/m16, r16","0F 43 /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNB r32, r/m32","CMOVNB r/m32, r32","cmovnb r/m32, r32","0F 43 /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNB r64, r/m64","CMOVNB r/m64, r64","cmovnb r/m64, r64","REX.W 0F 43 /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVNBE r16, r/m16","CMOVNBE r/m16, r16","cmovnbe r/m16, r16","0F 47 /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNBE r32, r/m32","CMOVNBE r/m32, r32","cmovnbe r/m32, r32","0F 47 /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNBE r64, r/m64","CMOVNBE r/m64, r64","cmovnbe r/m64, r64","REX.W 0F 47 /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVNC r16, r/m16","CMOVNC r/m16, r16","cmovnc r/m16, r16","0F 43 /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNC r32, r/m32","CMOVNC r/m32, r32","cmovnc r/m32, r32","0F 43 /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNC r64, r/m64","CMOVNC r/m64, r64","cmovnc r/m64, r64","REX.W 0F 43 /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVNE r16, r/m16","CMOVWNE r/m16, r16","cmovnew r/m16, r16","0F 45 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVNE r32, r/m32","CMOVLNE r/m32, r32","cmovnel r/m32, r32","0F 45 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVNE r64, r/m64","CMOVQNE r/m64, r64","cmovneq r/m64, r64","REX.W 0F 45 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVNG r16, r/m16","CMOVNG r/m16, r16","cmovng r/m16, r16","0F 4E /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNG r32, r/m32","CMOVNG r/m32, r32","cmovng r/m32, r32","0F 4E /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNG r64, r/m64","CMOVNG r/m64, r64","cmovng r/m64, r64","REX.W 0F 4E /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVNGE r16, r/m16","CMOVNGE r/m16, r16","cmovnge r/m16, r16","0F 4C /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNGE r32, r/m32","CMOVNGE r/m32, r32","cmovnge r/m32, r32","0F 4C /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNGE r64, r/m64","CMOVNGE r/m64, r64","cmovnge r/m64, r64","REX.W 0F 4C /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVNL r16, r/m16","CMOVNL r/m16, r16","cmovnl r/m16, r16","0F 4D /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNL r32, r/m32","CMOVNL r/m32, r32","cmovnl r/m32, r32","0F 4D /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNL r64, r/m64","CMOVNL r/m64, r64","cmovnl r/m64, r64","REX.W 0F 4D /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVNLE r16, r/m16","CMOVNLE r/m16, r16","cmovnle r/m16, r16","0F 4F /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNLE r32, r/m32","CMOVNLE r/m32, r32","cmovnle r/m32, r32","0F 4F /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNLE r64, r/m64","CMOVNLE r/m64, r64","cmovnle r/m64, r64","REX.W 0F 4F /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVNO r16, r/m16","CMOVWOC r/m16, r16","cmovnow r/m16, r16","0F 41 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVNO r32, r/m32","CMOVLOC r/m32, r32","cmovnol r/m32, r32","0F 41 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVNO r64, r/m64","CMOVQOC r/m64, r64","cmovnoq r/m64, r64","REX.W 0F 41 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVNP r16, r/m16","CMOVWPC r/m16, r16","cmovnpw r/m16, r16","0F 4B /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVNP r32, r/m32","CMOVLPC r/m32, r32","cmovnpl r/m32, r32","0F 4B /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVNP r64, r/m64","CMOVQPC r/m64, r64","cmovnpq r/m64, r64","REX.W 0F 4B /r","N.E.","V","","","rw,r","Y","64"
+"CMOVNS r16, r/m16","CMOVWPL r/m16, r16","cmovnsw r/m16, r16","0F 49 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVNS r32, r/m32","CMOVLPL r/m32, r32","cmovnsl r/m32, r32","0F 49 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVNS r64, r/m64","CMOVQPL r/m64, r64","cmovnsq r/m64, r64","REX.W 0F 49 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVNZ r16, r/m16","CMOVNZ r/m16, r16","cmovnz r/m16, r16","0F 45 /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVNZ r32, r/m32","CMOVNZ r/m32, r32","cmovnz r/m32, r32","0F 45 /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVNZ r64, r/m64","CMOVNZ r/m64, r64","cmovnz r/m64, r64","REX.W 0F 45 /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVO r16, r/m16","CMOVWOS r/m16, r16","cmovow r/m16, r16","0F 40 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVO r32, r/m32","CMOVLOS r/m32, r32","cmovol r/m32, r32","0F 40 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVO r64, r/m64","CMOVQOS r/m64, r64","cmovoq r/m64, r64","REX.W 0F 40 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVP r16, r/m16","CMOVWPS r/m16, r16","cmovpw r/m16, r16","0F 4A /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVP r32, r/m32","CMOVLPS r/m32, r32","cmovpl r/m32, r32","0F 4A /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVP r64, r/m64","CMOVQPS r/m64, r64","cmovpq r/m64, r64","REX.W 0F 4A /r","N.E.","V","","","rw,r","Y","64"
+"CMOVPE r16, r/m16","CMOVPE r/m16, r16","cmovpe r/m16, r16","0F 4A /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVPE r32, r/m32","CMOVPE r/m32, r32","cmovpe r/m32, r32","0F 4A /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVPE r64, r/m64","CMOVPE r/m64, r64","cmovpe r/m64, r64","REX.W 0F 4A /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVPO r16, r/m16","CMOVPO r/m16, r16","cmovpo r/m16, r16","0F 4B /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVPO r32, r/m32","CMOVPO r/m32, r32","cmovpo r/m32, r32","0F 4B /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVPO r64, r/m64","CMOVPO r/m64, r64","cmovpo r/m64, r64","REX.W 0F 4B /r","N.E.","V","","pseudo","rw,r","",""
+"CMOVS r16, r/m16","CMOVWMI r/m16, r16","cmovsw r/m16, r16","0F 48 /r","V","V","","P6,operand16","rw,r","Y","16"
+"CMOVS r32, r/m32","CMOVLMI r/m32, r32","cmovsl r/m32, r32","0F 48 /r","V","V","","P6,operand32","rw,r","Y","32"
+"CMOVS r64, r/m64","CMOVQMI r/m64, r64","cmovsq r/m64, r64","REX.W 0F 48 /r","N.E.","V","","","rw,r","Y","64"
+"CMOVZ r16, r/m16","CMOVZ r/m16, r16","cmovz r/m16, r16","0F 44 /r","V","V","","P6,operand16,pseudo","rw,r","",""
+"CMOVZ r32, r/m32","CMOVZ r/m32, r32","cmovz r/m32, r32","0F 44 /r","V","V","","P6,operand32,pseudo","rw,r","",""
+"CMOVZ r64, r/m64","CMOVZ r/m64, r64","cmovz r/m64, r64","REX.W 0F 44 /r","N.E.","V","","pseudo","rw,r","",""
+"CMP AL, imm8","CMPB AL, imm8","cmpb imm8, AL","3C ib","V","V","","","r,r","Y","8"
+"CMP AX, imm16","CMPW AX, imm16","cmpw imm16, AX","3D iw","V","V","","operand16","r,r","Y","16"
+"CMP EAX, imm32","CMPL EAX, imm32","cmpl imm32, EAX","3D id","V","V","","operand32","r,r","Y","32"
+"CMP RAX, imm32","CMPQ RAX, imm32","cmpq imm32, RAX","REX.W 3D id","N.E.","V","","","r,r","Y","64"
+"CMP r/m16, imm16","CMPW r/m16, imm16","cmpw imm16, r/m16","81 /7 iw","V","V","","operand16","r,r","Y","16"
+"CMP r/m16, imm8","CMPW r/m16, imm8","cmpw imm8, r/m16","83 /7 ib","V","V","","operand16","r,r","Y","16"
+"CMP r/m16, r16","CMPW r/m16, r16","cmpw r16, r/m16","39 /r","V","V","","operand16","r,r","Y","16"
+"CMP r/m32, imm32","CMPL r/m32, imm32","cmpl imm32, r/m32","81 /7 id","V","V","","operand32","r,r","Y","32"
+"CMP r/m32, imm8","CMPL r/m32, imm8","cmpl imm8, r/m32","83 /7 ib","V","V","","operand32","r,r","Y","32"
+"CMP r/m32, r32","CMPL r/m32, r32","cmpl r32, r/m32","39 /r","V","V","","operand32","r,r","Y","32"
+"CMP r/m64, imm32","CMPQ r/m64, imm32","cmpq imm32, r/m64","REX.W 81 /7 id","N.E.","V","","","r,r","Y","64"
+"CMP r/m64, imm8","CMPQ r/m64, imm8","cmpq imm8, r/m64","REX.W 83 /7 ib","N.E.","V","","","r,r","Y","64"
+"CMP r/m64, r64","CMPQ r/m64, r64","cmpq r64, r/m64","REX.W 39 /r","N.E.","V","","","r,r","Y","64"
+"CMP r/m8, imm8","CMPB r/m8, imm8","cmpb imm8, r/m8","80 /7 ib","V","V","","","r,r","Y","8"
+"CMP r/m8, imm8","CMPB r/m8, imm8","cmpb imm8, r/m8","REX 80 /7 ib","N.E.","V","","pseudo64","r,r","Y","8"
+"CMP r/m8, r8","CMPB r/m8, r8","cmpb r8, r/m8","38 /r","V","V","","","r,r","Y","8"
+"CMP r/m8, r8","CMPB r/m8, r8","cmpb r8, r/m8","REX 38 /r","N.E.","V","","pseudo64","r,r","Y","8"
+"CMP r16, r/m16","CMPW r16, r/m16","cmpw r/m16, r16","3B /r","V","V","","operand16","r,r","Y","16"
+"CMP r32, r/m32","CMPL r32, r/m32","cmpl r/m32, r32","3B /r","V","V","","operand32","r,r","Y","32"
+"CMP r64, r/m64","CMPQ r64, r/m64","cmpq r/m64, r64","REX.W 3B /r","N.E.","V","","","r,r","Y","64"
+"CMP r8, r/m8","CMPB r8, r/m8","cmpb r/m8, r8","3A /r","V","V","","","r,r","Y","8"
+"CMP r8, r/m8","CMPB r8, r/m8","cmpb r/m8, r8","REX 3A /r","N.E.","V","","pseudo64","r,r","Y","8"
+"CMPPD xmm1, xmm2/m128, imm8","CMPPD imm8, xmm1, xmm2/m128","cmppd imm8, xmm2/m128, xmm1","66 0F C2 /r ib","V","V","SSE2","","rw,r,r","",""
+"CMPPS xmm1, xmm2/m128, imm8","CMPPS imm8, xmm1, xmm2/m128","cmpps imm8, xmm2/m128, xmm1","0F C2 /r ib","V","V","SSE","","rw,r,r","",""
+"CMPSD xmm1, xmm2/m64, imm8","CMPSD imm8, xmm1, xmm2/m64","cmpsd imm8, xmm2/m64, xmm1","F2 0F C2 /r ib","V","V","SSE2","","rw,r,r","",""
+"CMPSQ","CMPSQ","cmpsq","REX.W A7","N.E.","V","","","","",""
+"CMPSS xmm1, xmm2/m32, imm8","CMPSS imm8, xmm1, xmm2/m32","cmpss imm8, xmm2/m32, xmm1","F3 0F C2 /r ib","V","V","SSE","","rw,r,r","",""
+"CMPXCHG r/m16, r16","CMPXCHGW r16, r/m16","cmpxchgw r16, r/m16","0F B1 /r","V","V","486","operand16","rw,r","Y","16"
+"CMPXCHG r/m32, r32","CMPXCHGL r32, r/m32","cmpxchgl r32, r/m32","0F B1 /r","V","V","486","operand32","rw,r","Y","32"
+"CMPXCHG r/m64, r64","CMPXCHGQ r64, r/m64","cmpxchgq r64, r/m64","REX.W 0F B1 /r","N.E.","V","","","rw,r","Y","64"
+"CMPXCHG r/m8, r8","CMPXCHGB r8, r/m8","cmpxchgb r8, r/m8","0F B0 /r","V","V","486","","rw,r","Y","8"
+"CMPXCHG r/m8, r8","CMPXCHGB r8, r/m8","cmpxchgb r8, r/m8","REX 0F B0 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"CMPXCHG16B m128","CMPXCHG16B m128","cmpxchg16b m128","REX.W 0F C7 /1","N.E.","V","","modrm_memonly","rw","",""
+"CMPXCHG8B m64","CMPXCHG8B m64","cmpxchg8b m64","0F C7 /1","V","V","Pentium","modrm_memonly,operand16,operand32","rw","",""
+"COMISD xmm1, xmm2/m64","COMISD xmm2/m64, xmm1","comisd xmm2/m64, xmm1","66 0F 2F /r","V","V","SSE2","","r,r","",""
+"COMISS xmm1, xmm2/m32","COMISS xmm2/m32, xmm1","comiss xmm2/m32, xmm1","0F 2F /r","V","V","SSE","","r,r","",""
+"CPUID","CPUID","cpuid","0F A2","V","V","486","","","",""
+"CQO","CQO","cqto","REX.W 99","N.E.","V","","","","",""
+"CRC32 r32, r/m16","CRC32W r/m16, r32","crc32w r/m16, r32","F2 0F 38 F1 /r","V","V","","operand16","rw,r","Y","16"
+"CRC32 r32, r/m32","CRC32L r/m32, r32","crc32l r/m32, r32","F2 0F 38 F1 /r","V","V","","operand32","rw,r","Y","32"
+"CRC32 r32, r/m8","CRC32B r/m8, r32","crc32b r/m8, r32","F2 0F 38 F0 /r","V","V","","operand16,operand32","rw,r","Y","8"
+"CRC32 r32, r/m8","CRC32B r/m8, r32","crc32b r/m8, r32","F2 REX 0F 38 F0 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"CRC32 r64, r/m64","CRC32Q r/m64, r64","crc32q r/m64, r64","F2 REX.W 0F 38 F1 /r","N.E.","V","","","rw,r","Y","64"
+"CRC32 r64, r/m8","CRC32B r/m8, r64","crc32b r/m8, r64","F2 REX.W 0F 38 F0 /r","N.E.","V","","","rw,r","Y","8"
+"CVTDQ2PD xmm1, xmm2/m64","CVTPL2PD xmm2/m64, xmm1","cvtdq2pd xmm2/m64, xmm1","F3 0F E6 /r","V","V","SSE2","","w,r","",""
+"CVTDQ2PS xmm1, xmm2/m128","CVTPL2PS xmm2/m128, xmm1","cvtdq2ps xmm2/m128, xmm1","0F 5B /r","V","V","SSE2","","w,r","",""
+"CVTPD2DQ xmm1, xmm2/m128","CVTPD2PL xmm2/m128, xmm1","cvtpd2dq xmm2/m128, xmm1","F2 0F E6 /r","V","V","SSE2","","w,r","",""
+"CVTPD2PI mm1, xmm2/m128","CVTPD2PI xmm2/m128, mm1","cvtpd2pi xmm2/m128, mm1","66 0F 2D /r","V","V","","","w,r","",""
+"CVTPD2PS xmm1, xmm2/m128","CVTPD2PS xmm2/m128, xmm1","cvtpd2ps xmm2/m128, xmm1","66 0F 5A /r","V","V","SSE2","","w,r","",""
+"CVTPI2PD xmm1, mm2/m64","CVTPI2PD mm2/m64, xmm1","cvtpi2pd mm2/m64, xmm1","66 0F 2A /r","V","V","","","w,r","",""
+"CVTPI2PS xmm1, mm2/m64","CVTPI2PS mm2/m64, xmm1","cvtpi2ps mm2/m64, xmm1","0F 2A /r","V","V","","","w,r","",""
+"CVTPS2DQ xmm1, xmm2/m128","CVTPS2PL xmm2/m128, xmm1","cvtps2dq xmm2/m128, xmm1","66 0F 5B /r","V","V","SSE2","","w,r","",""
+"CVTPS2PD xmm1, xmm2/m64","CVTPS2PD xmm2/m64, xmm1","cvtps2pd xmm2/m64, xmm1","0F 5A /r","V","V","SSE2","","w,r","",""
+"CVTPS2PI mm1, xmm2/m64","CVTPS2PI xmm2/m64, mm1","cvtps2pi xmm2/m64, mm1","0F 2D /r","V","V","","","w,r","",""
+"CVTSD2SI r32, xmm2/m64","CVTSD2SL xmm2/m64, r32","cvtsd2si xmm2/m64, r32","F2 0F 2D /r","V","V","SSE2","operand16,operand32","w,r","Y","32"
+"CVTSD2SI r64, xmm2/m64","CVTSD2SL xmm2/m64, r64","cvtsd2siq xmm2/m64, r64","F2 REX.W 0F 2D /r","N.E.","V","SSE2","","w,r","Y","64"
+"CVTSD2SS xmm1, xmm2/m64","CVTSD2SS xmm2/m64, xmm1","cvtsd2ss xmm2/m64, xmm1","F2 0F 5A /r","V","V","SSE2","","w,r","",""
+"CVTSI2SD xmm1, r/m32","CVTSL2SD r/m32, xmm1","cvtsi2sdl r/m32, xmm1","F2 0F 2A /r","V","V","SSE2","operand16,operand32","w,r","Y","32"
+"CVTSI2SD xmm1, r/m64","CVTSQ2SD r/m64, xmm1","cvtsi2sdq r/m64, xmm1","F2 REX.W 0F 2A /r","N.E.","V","SSE2","","w,r","Y","64"
+"CVTSI2SS xmm1, r/m32","CVTSL2SS r/m32, xmm1","cvtsi2ssl r/m32, xmm1","F3 0F 2A /r","V","V","SSE","operand16,operand32","w,r","Y","32"
+"CVTSI2SS xmm1, r/m64","CVTSQ2SS r/m64, xmm1","cvtsi2ssq r/m64, xmm1","F3 REX.W 0F 2A /r","N.E.","V","SSE","","w,r","Y","64"
+"CVTSS2SD xmm1, xmm2/m32","CVTSS2SD xmm2/m32, xmm1","cvtss2sd xmm2/m32, xmm1","F3 0F 5A /r","V","V","SSE2","","w,r","",""
+"CVTSS2SI r32, xmm2/m32","CVTSS2SL xmm2/m32, r32","cvtss2si xmm2/m32, r32","F3 0F 2D /r","V","V","SSE","operand16,operand32","w,r","Y","32"
+"CVTSS2SI r64, xmm2/m32","CVTSS2SL xmm2/m32, r64","cvtss2siq xmm2/m32, r64","F3 REX.W 0F 2D /r","N.E.","V","SSE","","w,r","Y","64"
+"CVTTPD2DQ xmm1, xmm2/m128","CVTTPD2PL xmm2/m128, xmm1","cvttpd2dq xmm2/m128, xmm1","66 0F E6 /r","V","V","SSE2","","w,r","",""
+"CVTTPD2PI mm1, xmm2/m128","CVTTPD2PI xmm2/m128, mm1","cvttpd2pi xmm2/m128, mm1","66 0F 2C /r","V","V","","","w,r","",""
+"CVTTPS2DQ xmm1, xmm2/m128","CVTTPS2PL xmm2/m128, xmm1","cvttps2dq xmm2/m128, xmm1","F3 0F 5B /r","V","V","SSE2","","w,r","",""
+"CVTTPS2PI mm1, xmm2/m64","CVTTPS2PI xmm2/m64, mm1","cvttps2pi xmm2/m64, mm1","0F 2C /r","V","V","","","w,r","",""
+"CVTTSD2SI r32, xmm2/m64","CVTTSD2SL xmm2/m64, r32","cvttsd2si xmm2/m64, r32","F2 0F 2C /r","V","V","SSE2","operand16,operand32","w,r","Y","32"
+"CVTTSD2SI r64, xmm2/m64","CVTTSD2SL xmm2/m64, r64","cvttsd2siq xmm2/m64, r64","F2 REX.W 0F 2C /r","N.E.","V","SSE2","","w,r","Y","64"
+"CVTTSS2SI r32, xmm2/m32","CVTTSS2SL xmm2/m32, r32","cvttss2si xmm2/m32, r32","F3 0F 2C /r","V","V","SSE","operand16,operand32","w,r","Y","32"
+"CVTTSS2SI r64, xmm2/m32","CVTTSS2SL xmm2/m32, r64","cvttss2siq xmm2/m32, r64","F3 REX.W 0F 2C /r","N.E.","V","SSE","","w,r","Y","64"
+"DEC r/m16","DECW r/m16","decw r/m16","FF /1","V","V","","operand16","rw","Y","16"
+"DEC r/m32","DECL r/m32","decl r/m32","FF /1","V","V","","operand32","rw","Y","32"
+"DEC r/m64","DECQ r/m64","decq r/m64","REX.W FF /1","N.E.","V","","","rw","Y","64"
+"DEC r/m8","DECB r/m8","decb r/m8","FE /1","V","V","","","rw","Y","8"
+"DEC r/m8","DECB r/m8","decb r/m8","REX FE /1","N.E.","V","","pseudo64","rw","Y","8"
+"DEC r16op","DECW r16op","decw r16op","48+rw","V","N.E.","","operand16","rw","Y","16"
+"DEC r32op","DECL r32op","decl r32op","48+rd","V","N.E.","","operand32","rw","Y","32"
+"DIV r/m16","DIVW r/m16","divw r/m16","F7 /6","V","V","","operand16","w","Y","16"
+"DIV r/m32","DIVL r/m32","divl r/m32","F7 /6","V","V","","operand32","w","Y","32"
+"DIV r/m64","DIVQ r/m64","divq r/m64","REX.W F7 /6","N.E.","V","","","w","Y","64"
+"DIV r/m8","DIVB r/m8","divb r/m8","F6 /6","V","V","","","w","Y","8"
+"DIV r/m8","DIVB r/m8","divb r/m8","REX F6 /6","N.E.","V","","pseudo64","w","Y","8"
+"DIVPD xmm1, xmm2/m128","DIVPD xmm2/m128, xmm1","divpd xmm2/m128, xmm1","66 0F 5E /r","V","V","SSE2","","rw,r","",""
+"DIVPS xmm1, xmm2/m128","DIVPS xmm2/m128, xmm1","divps xmm2/m128, xmm1","0F 5E /r","V","V","SSE","","rw,r","",""
+"DIVSD xmm1, xmm2/m64","DIVSD xmm2/m64, xmm1","divsd xmm2/m64, xmm1","F2 0F 5E /r","V","V","SSE2","","rw,r","",""
+"DIVSS xmm1, xmm2/m32","DIVSS xmm2/m32, xmm1","divss xmm2/m32, xmm1","F3 0F 5E /r","V","V","SSE","","rw,r","",""
+"DPPD xmm1, xmm2/m128, imm8","DPPD imm8, xmm2/m128, xmm1","dppd imm8, xmm2/m128, xmm1","66 0F 3A 41 /r ib","V","V","SSE4_1","","rw,r,r","",""
+"DPPS xmm1, xmm2/m128, imm8","DPPS imm8, xmm2/m128, xmm1","dpps imm8, xmm2/m128, xmm1","66 0F 3A 40 /r ib","V","V","SSE4_1","","rw,r,r","",""
+"EMMS","EMMS","emms","0F 77","V","V","","","","",""
+"ENTER imm16, 0","ENTER 0, imm16","enter imm16, 0","C8 iw 00","V","V","","pseudo","r,r","",""
+"ENTER imm16, 1","ENTER 1, imm16","enter imm16, 1","C8 iw 01","V","V","","pseudo","r,r","",""
+"ENTER imm16, imm8b","ENTERW/ENTERL/ENTERQ imm8b, imm16","enterw/enterl/enterq imm16, imm8b","C8 iw ib","V","V","","","r,r","",""
+"EXTRACTPS r/m32, xmm1, imm8","EXTRACTPS imm8, xmm1, r/m32","extractps imm8, xmm1, r/m32","66 0F 3A 17 /r ib","V","V","SSE4_1","","w,r,r","",""
+"F2XM1","F2XM1","f2xm1","D9 F0","V","V","","","","",""
+"FABS","FABS","fabs","D9 E1","V","V","","","","",""
+"FADD ST(0), ST(i)","FADDD ST(i), ST(0)","fadd ST(i), ST(0)","D8 C0+i","V","V","","","rw,r","Y",""
+"FADD ST(i), ST(0)","FADDD ST(0), ST(i)","fadd ST(0), ST(i)","DC C0+i","V","V","","","rw,r","Y",""
+"FADD m32fp","FADDD m32fp","fadds m32fp","D8 /0","V","V","","","r","Y","32"
+"FADD m64fp","FADDD m64fp","faddl m64fp","DC /0","V","V","","","r","Y","64"
+"FADDP","FADDDP","faddp","DE C1","V","V","","pseudo","","",""
+"FADDP ST(i), ST(0)","FADDDP ST(0), ST(i)","faddp ST(0), ST(i)","DE C0+i","V","V","","","rw,r","",""
+"FBLD m80dec","FBLD m80dec","fbld m80dec","DF /4","V","V","","","r","",""
+"FBSTP m80bcd","FBSTP m80bcd","fbstp m80bcd","DF /6","V","V","","","w","",""
+"FCHS","FCHS","fchs","D9 E0","V","V","","","","",""
+"FCLEX","FCLEX","fclex","9B DB E2","V","V","","pseudo","","",""
+"FCMOVB ST(0), ST(i)","FCMOVB ST(i), ST(0)","fcmovb ST(i), ST(0)","DA C0+i","V","V","","P6","rw,r","",""
+"FCMOVBE ST(0), ST(i)","FCMOVBE ST(i), ST(0)","fcmovbe ST(i), ST(0)","DA D0+i","V","V","","P6","rw,r","",""
+"FCMOVE ST(0), ST(i)","FCMOVE ST(i), ST(0)","fcmove ST(i), ST(0)","DA C8+i","V","V","","P6","rw,r","",""
+"FCMOVNB ST(0), ST(i)","FCMOVNB ST(i), ST(0)","fcmovnb ST(i), ST(0)","DB C0+i","V","V","","P6","rw,r","",""
+"FCMOVNBE ST(0), ST(i)","FCMOVNBE ST(i), ST(0)","fcmovnbe ST(i), ST(0)","DB D0+i","V","V","","P6","rw,r","",""
+"FCMOVNE ST(0), ST(i)","FCMOVNE ST(i), ST(0)","fcmovne ST(i), ST(0)","DB C8+i","V","V","","P6","rw,r","",""
+"FCMOVNU ST(0), ST(i)","FCMOVNU ST(i), ST(0)","fcmovnu ST(i), ST(0)","DB D8+i","V","V","","P6","rw,r","",""
+"FCMOVU ST(0), ST(i)","FCMOVU ST(i), ST(0)","fcmovu ST(i), ST(0)","DA D8+i","V","V","","P6","rw,r","",""
+"FCOM","FCOMD","fcom","D8 D1","V","V","","pseudo","","Y",""
+"FCOM ST(i)","FCOMD ST(i)","fcom ST(i)","D8 D0+i","V","V","","","r","Y",""
+"FCOM m32fp","FCOMD m32fp","fcoms m32fp","D8 /2","V","V","","","r","Y","32"
+"FCOM m64fp","FCOMD m64fp","fcoml m64fp","DC /2","V","V","","","r","Y","64"
+"FCOMI ST(0), ST(i)","FCOMI ST(i), ST(0)","fcomi ST(i), ST(0)","DB F0+i","V","V","","P6","r,r","",""
+"FCOMIP ST(0), ST(i)","FCOMIP ST(i), ST(0)","fcomip ST(i), ST(0)","DF F0+i","V","V","","P6","r,r","",""
+"FCOMP","FCOMP","fcomp","D8 D9","V","V","","pseudo","","Y",""
+"FCOMP ST(i)","FCOMP ST(i)","fcomp ST(i)","D8 D8+i","V","V","","","r","Y",""
+"FCOMP m32fp","FCOMFP m32fp","fcomps m32fp","D8 /3","V","V","","","r","Y","32"
+"FCOMP m64fp","FCOMPL m64fp","fcompl m64fp","DC /3","V","V","","","r","Y","64"
+"FCOMPP","FCOMPP","fcompp","DE D9","V","V","","","","",""
+"FCOS","FCOS","fcos","D9 FF","V","V","","","","",""
+"FDECSTP","FDECSTP","fdecstp","D9 F6","V","V","","","","",""
+"FDIV ST(0), ST(i)","FDIVD ST(i), ST(0)","fdiv ST(i), ST(0)","D8 F0+i","V","V","","","rw,r","Y",""
+"FDIV ST(i), ST(0)","FDIVD ST(0), ST(i)","fdivr ST(0), ST(i)","DC F8+i","V","V","","","rw,r","Y",""
+"FDIV m32fp","FDIVD m32fp","fdivs m32fp","D8 /6","V","V","","","r","Y","32"
+"FDIV m64fp","FDIVD m64fp","fdivl m64fp","DC /6","V","V","","","r","Y","64"
+"FDIVP","FDIVP","fdivp","DE F9","V","V","","pseudo","","",""
+"FDIVP ST(i), ST(0)","FDIVRP ST(0), ST(i)","fdivrp ST(0), ST(i)","DE F8+i","V","V","","","rw,r","",""
+"FDIVR ST(0), ST(i)","FDIVR ST(i), ST(0)","fdivr ST(i), ST(0)","D8 F8+i","V","V","","","rw,r","Y",""
+"FDIVR ST(i), ST(0)","FDIVD ST(0), ST(i)","fdiv ST(0), ST(i)","DC F0+i","V","V","","","rw,r","Y",""
+"FDIVR m32fp","FDIVFR m32fp","fdivrs m32fp","D8 /7","V","V","","","r","Y","32"
+"FDIVR m64fp","FDIVRL m64fp","fdivrl m64fp","DC /7","V","V","","","r","Y","64"
+"FDIVRP","FDIVRP","fdivrp","DE F1","V","V","","pseudo","","",""
+"FDIVRP ST(i), ST(0)","FDIVP ST(0), ST(i)","fdivp ST(0), ST(i)","DE F0+i","V","V","","","rw,r","",""
+"FFREE ST(i)","FFREE ST(i)","ffree ST(i)","DD C0+i","V","V","","","w","",""
+"FFREEP ST(i)","FFREEP ST(i)","ffreep ST(i)","DF C0+i","V","V","","","w","",""
+"FIADD m16int","FIADD m16int","fiadd m16int","DE /0","V","V","","","r","Y",""
+"FIADD m32int","FIADDL m32int","fiaddl m32int","DA /0","V","V","","","r","Y","32"
+"FICOM m16int","FICOM m16int","ficom m16int","DE /2","V","V","","","r","Y",""
+"FICOM m32int","FICOML m32int","ficoml m32int","DA /2","V","V","","","r","Y","32"
+"FICOMP m16int","FICOMP m16int","ficomp m16int","DE /3","V","V","","","r","Y",""
+"FICOMP m32int","FICOMPL m32int","ficompl m32int","DA /3","V","V","","","r","Y","32"
+"FIDIV m16int","FIDIV m16int","fidiv m16int","DE /6","V","V","","","r","Y",""
+"FIDIV m32int","FIDIVL m32int","fidivl m32int","DA /6","V","V","","","r","Y","32"
+"FIDIVR m16int","FIDIVR m16int","fidivr m16int","DE /7","V","V","","","r","Y",""
+"FIDIVR m32int","FIDIVRL m32int","fidivrl m32int","DA /7","V","V","","","r","Y","32"
+"FILD m16int","FILD m16int","fild m16int","DF /0","V","V","","","r","Y",""
+"FILD m32int","FILDL m32int","fildl m32int","DB /0","V","V","","","r","Y","32"
+"FILD m64int","FILDLL m64int","fildll m64int","DF /5","V","V","","","r","Y","64"
+"FIMUL m16int","FIMUL m16int","fimul m16int","DE /1","V","V","","","r","Y",""
+"FIMUL m32int","FIMULL m32int","fimull m32int","DA /1","V","V","","","r","Y","32"
+"FINCSTP","FINCSTP","fincstp","D9 F7","V","V","","","","",""
+"FINIT","FINIT","finit","9B DB E3","V","V","","pseudo","","",""
+"FIST m16int","FIST m16int","fist m16int","DF /2","V","V","","","w","Y",""
+"FIST m32int","FISTL m32int","fistl m32int","DB /2","V","V","","","w","Y","32"
+"FISTP m16int","FISTP m16int","fistp m16int","DF /3","V","V","","","w","Y",""
+"FISTP m32int","FISTPL m32int","fistpl m32int","DB /3","V","V","","","w","Y","32"
+"FISTP m64int","FISTPLL m64int","fistpll m64int","DF /7","V","V","","","w","Y","64"
+"FISTTP m16int","FISTTP m16int","fisttp m16int","DF /1","V","V","","","w","Y",""
+"FISTTP m32int","FISTTPL m32int","fisttpl m32int","DB /1","V","V","","","w","Y","32"
+"FISTTP m64int","FISTTPLL m64int","fisttpll m64int","DD /1","V","V","","","w","Y","64"
+"FISUB m16int","FISUB m16int","fisub m16int","DE /4","V","V","","","r","Y",""
+"FISUB m32int","FISUBL m32int","fisubl m32int","DA /4","V","V","","","r","Y","32"
+"FISUBR m16int","FISUBR m16int","fisubr m16int","DE /5","V","V","","","r","Y",""
+"FISUBR m32int","FISUBRL m32int","fisubrl m32int","DA /5","V","V","","","r","Y","32"
+"FLD ST(i)","FLD ST(i)","fld ST(i)","D9 C0+i","V","V","","","r","Y",""
+"FLD m32fp","FLDS m32fp","flds m32fp","D9 /0","V","V","","","r","Y","32"
+"FLD m64fp","FLDL m64fp","fldl m64fp","DD /0","V","V","","","r","Y","64"
+"FLD m80fp","FLDT m80fp","fldt m80fp","DB /5","V","V","","","r","Y","80"
+"FLD1","FLD1","fld1","D9 E8","V","V","","","","",""
+"FLDCW m2byte","FLDCW m2byte","fldcw m2byte","D9 /5","V","V","","","r","",""
+"FLDENV m14/28byte","FLDENVS/FLDENVL m14/28byte","fldenvs/fldenvl m14/28byte","D9 /4","V","V","","","r","",""
+"FLDL2E","FLDL2E","fldl2e","D9 EA","V","V","","","","",""
+"FLDL2T","FLDL2T","fldl2t","D9 E9","V","V","","","","",""
+"FLDLG2","FLDLG2","fldlg2","D9 EC","V","V","","","","",""
+"FLDPI","FLDPI","fldpi","D9 EB","V","V","","","","",""
+"FMUL ST(0), ST(i)","FMUL ST(i), ST(0)","fmul ST(i), ST(0)","D8 C8+i","V","V","","","rw,r","Y",""
+"FMUL ST(i), ST(0)","FMUL ST(0), ST(i)","fmul ST(0), ST(i)","DC C8+i","V","V","","","rw,r","Y",""
+"FMUL m32fp","FMULS m32fp","fmuls m32fp","D8 /1","V","V","","","r","Y","32"
+"FMUL m64fp","FMULL m64fp","fmull m64fp","DC /1","V","V","","","r","Y","64"
+"FMULP","FMULP","fmulp","DE C9","V","V","","pseudo","","",""
+"FMULP ST(i), ST(0)","FMULP ST(0), ST(i)","fmulp ST(0), ST(i)","DE C8+i","V","V","","","rw,r","",""
+"FNCLEX","FNCLEX","fnclex","DB E2","V","V","","","","",""
+"FNINIT","FNINIT","fninit","DB E3","V","V","","","","",""
+"FNOP","FNOP","fnop","D9 D0","V","V","","","","",""
+"FNSAVE m94/108byte","FNSAVES/FNSAVEL m94/108byte","fnsaves/fnsavel m94/108byte","DD /6","V","V","","","w","",""
+"FNSTCW m2byte","FNSTCW m2byte","fnstcw m2byte","D9 /7","V","V","","","w","",""
+"FNSTENV m14/28byte","FNSTENVS/FNSTENVL m14/28byte","fnstenvs/fnstenvl m14/28byte","D9 /6","V","V","","","w","",""
+"FNSTSW AX","FNSTSW AX","fnstsw AX","DF E0","V","V","","","w","",""
+"FNSTSW m2byte","FNSTSW m2byte","fnstsw m2byte","DD /7","V","V","","","w","",""
+"FPATAN","FPATAN","fpatan","D9 F3","V","V","","","","",""
+"FPREM","FPREM","fprem","D9 F8","V","V","","","","",""
+"FPREM1","FPREM1","fprem1","D9 F5","V","V","","","","",""
+"FPTAN","FPTAN","fptan","D9 F2","V","V","","","","",""
+"FRNDINT","FRNDINT","frndint","D9 FC","V","V","","","","",""
+"FRSTOR m94/108byte","FRSTORS/FRSTORL m94/108byte","frstors/frstorl m94/108byte","DD /4","V","V","","","r","",""
+"FSAVE m94/108byte","FSAVE m94/108byte","fsave m94/108byte","9B DD /6","V","V","","pseudo","w","",""
+"FSCALE","FSCALE","fscale","D9 FD","V","V","","","","",""
+"FSIN","FSIN","fsin","D9 FE","V","V","","","","",""
+"FSINCOS","FSINCOS","fsincos","D9 FB","V","V","","","","",""
+"FSQRT","FSQRT","fsqrt","D9 FA","V","V","","","","",""
+"FST ST(i)","FST ST(i)","fst ST(i)","DD D0+i","V","V","","","w","Y",""
+"FST m32fp","FSTS m32fp","fsts m32fp","D9 /2","V","V","","","w","Y","32"
+"FST m64fp","FSTL m64fp","fstl m64fp","DD /2","V","V","","","w","Y","64"
+"FSTCW m2byte","FSTCW m2byte","fstcw m2byte","9B D9 /7","V","V","","pseudo","w","",""
+"FSTENV m14/28byte","FSTENV m14/28byte","fstenv m14/28byte","9B D9 /6","V","V","","pseudo","w","",""
+"FSTP ST(i)","FSTP ST(i)","fstp ST(i)","DD D8+i","V","V","","","w","Y",""
+"FSTP m32fp","FSTPS m32fp","fstps m32fp","D9 /3","V","V","","","w","Y","32"
+"FSTP m64fp","FSTPL m64fp","fstpl m64fp","DD /3","V","V","","","w","Y","64"
+"FSTP m80fp","FSTPT m80fp","fstpt m80fp","DB /7","V","V","","","w","Y","80"
+"FSTSW AX","FSTSW AX","fstsw AX","9B DF E0","V","V","","pseudo","w","",""
+"FSTSW m2byte","FSTSW m2byte","fstsw m2byte","9B DD /7","V","V","","pseudo","w","",""
+"FSUB ST(0), ST(i)","FSUB ST(i), ST(0)","fsub ST(i), ST(0)","D8 E0+i","V","V","","","rw,r","Y",""
+"FSUB ST(i), ST(0)","FSUBR ST(0), ST(i)","fsubr ST(0), ST(i)","DC E8+i","V","V","","","rw,r","Y",""
+"FSUB m32fp","FSUBS m32fp","fsubs m32fp","D8 /4","V","V","","","r","Y","32"
+"FSUB m64fp","FSUBL m64fp","fsubl m64fp","DC /4","V","V","","","r","Y","64"
+"FSUBP","FSUBP","fsubp","DE E9","V","V","","pseudo","","",""
+"FSUBP ST(i), ST(0)","FSUBRP ST(0), ST(i)","fsubrp ST(0), ST(i)","DE E8+i","V","V","","","rw,r","",""
+"FSUBR ST(0), ST(i)","FSUBR ST(i), ST(0)","fsubr ST(i), ST(0)","D8 E8+i","V","V","","","rw,r","Y",""
+"FSUBR ST(i), ST(0)","FSUB ST(0), ST(i)","fsub ST(0), ST(i)","DC E0+i","V","V","","","rw,r","Y",""
+"FSUBR m32fp","FSUBRS m32fp","fsubrs m32fp","D8 /5","V","V","","","r","Y","32"
+"FSUBR m64fp","FSUBRL m64fp","fsubrl m64fp","DC /5","V","V","","","r","Y","64"
+"FSUBRP","FSUBRP","fsubrp","DE E1","V","V","","pseudo","","",""
+"FSUBRP ST(i), ST(0)","FSUBP ST(0), ST(i)","fsubp ST(0), ST(i)","DE E0+i","V","V","","","rw,r","",""
+"FTST","FTST","ftst","D9 E4","V","V","","","","",""
+"FUCOM","FUCOM","fucom","DD E1","V","V","","pseudo","","",""
+"FUCOM ST(i)","FUCOM ST(i)","fucom ST(i)","DD E0+i","V","V","","","r","",""
+"FUCOMI ST(0), ST(i)","FUCOMI ST(i), ST(0)","fucomi ST(i), ST(0)","DB E8+i","V","V","","P6","r,r","",""
+"FUCOMIP ST(0), ST(i)","FUCOMIP ST(i), ST(0)","fucomip ST(i), ST(0)","DF E8+i","V","V","","P6","r,r","",""
+"FUCOMP","FUCOMP","fucomp","DD E9","V","V","","pseudo","","",""
+"FUCOMP ST(i)","FUCOMP ST(i)","fucomp ST(i)","DD E8+i","V","V","","","r","",""
+"FUCOMPP","FUCOMPP","fucompp","DA E9","V","V","","","","",""
+"FXAM","FXAM","fxam","D9 E5","V","V","","","","",""
+"FXCH","FXCH","fxch","D9 C9","V","V","","pseudo","","",""
+"FXCH ST(i)","FXCH ST(i)","fxch ST(i)","D9 C8+i","V","V","","","rw","",""
+"FXRSTOR m512byte","FXRSTOR m512byte","fxrstor m512byte","0F AE /1","V","V","","operand16,operand32","r","",""
+"FXRSTOR64 m512byte","FXRSTOR64 m512byte","fxrstor64 m512byte","REX.W 0F AE /1","N.E.","V","","","r","",""
+"FXSAVE m512byte","FXSAVE m512byte","fxsave m512byte","0F AE /0","V","V","","operand16,operand32","w","",""
+"FXSAVE64 m512byte","FXSAVE64 m512byte","fxsave64 m512byte","REX.W 0F AE /0","N.E.","V","","","w","",""
+"FXTRACT","FXTRACT","fxtract","D9 F4","V","V","","","","",""
+"FYL2X","FYL2X","fyl2x","D9 F1","V","V","","","","",""
+"FYL2XP1","FYL2XP1","fyl2xp1","D9 F9","V","V","","","","",""
+"HADDPD xmm1, xmm2/m128","HADDPD xmm2/m128, xmm1","haddpd xmm2/m128, xmm1","66 0F 7C /r","V","V","SSE3","","rw,r","",""
+"HADDPS xmm1, xmm2/m128","HADDPS xmm2/m128, xmm1","haddps xmm2/m128, xmm1","F2 0F 7C /r","V","V","SSE3","","rw,r","",""
+"HSUBPD xmm1, xmm2/m128","HSUBPD xmm2/m128, xmm1","hsubpd xmm2/m128, xmm1","66 0F 7D /r","V","V","SSE3","","rw,r","",""
+"HSUBPS xmm1, xmm2/m128","HSUBPS xmm2/m128, xmm1","hsubps xmm2/m128, xmm1","F2 0F 7D /r","V","V","SSE3","","rw,r","",""
+"IDIV r/m16","IDIVW r/m16","idivw r/m16","F7 /7","V","V","","operand16","r","Y","16"
+"IDIV r/m32","IDIVL r/m32","idivl r/m32","F7 /7","V","V","","operand32","r","Y","32"
+"IDIV r/m64","IDIVQ r/m64","idivq r/m64","REX.W F7 /7","N.E.","V","","","r","Y","64"
+"IDIV r/m8","IDIVB r/m8","idivb r/m8","F6 /7","V","V","","","r","Y","8"
+"IDIV r/m8","IDIVB r/m8","idivb r/m8","REX F6 /7","N.E.","V","","pseudo64","r","Y","8"
+"IMUL r/m16","IMULW r/m16","imulw r/m16","F7 /5","V","V","","operand16","rw","Y","16"
+"IMUL r/m32","IMULL r/m32","imull r/m32","F7 /5","V","V","","operand32","rw","Y","32"
+"IMUL r/m64","IMULQ r/m64","imulq r/m64","REX.W F7 /5","N.E.","V","","","rw","Y","64"
+"IMUL r/m8","IMULB r/m8","imulb r/m8","F6 /5","V","V","","","rw","Y","8"
+"IMUL r16, r/m16","IMULW r/m16, r16","imulw r/m16, r16","0F AF /r","V","V","","operand16","rw,r","Y","16"
+"IMUL r16, r/m16, imm16","IMULW imm16, r/m16, r16","imulw imm16, r/m16, r16","69 /r iw","V","V","","operand16","rw,r,r","Y","16"
+"IMUL r16, r/m16, imm8","IMULW imm8, r/m16, r16","imulw imm8, r/m16, r16","6B /r ib","V","V","","operand16","rw,r,r","Y","16"
+"IMUL r32, r/m32","IMULL r/m32, r32","imull r/m32, r32","0F AF /r","V","V","","operand32","rw,r","Y","32"
+"IMUL r32, r/m32, imm32","IMULL imm32, r/m32, r32","imull imm32, r/m32, r32","69 /r id","V","V","","operand32","rw,r,r","Y","32"
+"IMUL r32, r/m32, imm8","IMULL imm8, r/m32, r32","imull imm8, r/m32, r32","6B /r ib","V","V","","operand32","rw,r,r","Y","32"
+"IMUL r64, r/m64","IMULQ r/m64, r64","imulq r/m64, r64","REX.W 0F AF /r","N.E.","V","","","rw,r","Y","64"
+"IMUL r64, r/m64, imm32","IMULQ imm32, r/m64, r64","imulq imm32, r/m64, r64","REX.W 69 /r id","N.E.","V","","","rw,r,r","Y","64"
+"IMUL r64, r/m64, imm8","IMULQ imm8, r/m64, r64","imulq imm8, r/m64, r64","REX.W 6B /r ib","N.E.","V","","","rw,r,r","Y","64"
+"IN AL, DX","INB DX, AL","inb DX, AL","EC","V","V","","","w,r","Y","8"
+"IN AL, imm8u","INB imm8u, AL","inb imm8u, AL","E4 ib","V","V","","","w,r","Y","8"
+"IN AX, DX","INW DX, AX","inw DX, AX","ED","V","V","","operand16","w,r","Y","16"
+"IN AX, imm8u","INW imm8u, AX","inw imm8u, AX","E5 ib","V","V","","operand16","w,r","Y","16"
+"IN EAX, DX","INL DX, EAX","inl DX, EAX","ED","V","V","","operand32,operand64","w,r","Y","32"
+"IN EAX, imm8u","INL imm8u, EAX","inl imm8u, EAX","E5 ib","V","V","","operand32,operand64","w,r","Y","32"
+"INC r/m16","INCW r/m16","incw r/m16","FF /0","V","V","","operand16","rw","Y","16"
+"INC r/m32","INCL r/m32","incl r/m32","FF /0","V","V","","operand32","rw","Y","32"
+"INC r/m64","INCQ r/m64","incq r/m64","REX.W FF /0","N.E.","V","","","rw","Y","64"
+"INC r/m8","INCB r/m8","incb r/m8","FE /0","V","V","","","rw","Y","8"
+"INC r/m8","INCB r/m8","incb r/m8","REX FE /0","N.E.","V","","pseudo64","rw","Y","8"
+"INC r16op","INCW r16op","incw r16op","40+rw","V","N.E.","","operand16","rw","Y","16"
+"INC r32op","INCL r32op","incl r32op","40+rd","V","N.E.","","operand32","rw","Y","32"
+"INSERTPS xmm1, xmm2/m32, imm8","INSERTPS imm8, xmm2/m32, xmm1","insertps imm8, xmm2/m32, xmm1","66 0F 3A 21 /r ib","V","V","SSE4_1","","w,r,r","",""
+"INT 3","INT 3","int 3","CC","V","V","","","r","",""
+"INT imm8","INT imm8","int imm8","CD ib","V","V","","","r","",""
+"INVD","INVD","invd","0F 08","V","V","486","","","",""
+"INVLPG m","INVLPG m","invlpg m","0F 01 /7","V","V","486","","r","",""
+"INVPCID r32, m128","INVPCID m128, r32","invpcid m128, r32","66 0F 38 82 /r","V","N.E.","INVPCID","modrm_memonly","r,r","",""
+"INVPCID r64, m128","INVPCID m128, r64","invpcid m128, r64","66 0F 38 82 /r","N.E.","V","INVPCID","modrm_memonly","r,r","",""
+"IRETQ","IRETQ","iretq","REX.W CF","N.E.","V","","","","",""
+"JA rel16","JA rel16","ja rel16","0F 87 cw","V","N.S.","","operand16","r","Y",""
+"JA rel32","JA rel32","ja rel32","0F 87 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JA rel32","JA rel32","ja rel32","0F 87 cd","V","V","","operand32","r","Y",""
+"JA rel8","JA rel8","ja rel8","77 cb","V","V","","","r","Y",""
+"JAE rel16","JAE rel16","jae rel16","0F 83 cw","V","N.S.","","operand16","r","Y",""
+"JAE rel32","JAE rel32","jae rel32","0F 83 cd","V","V","","operand32","r","Y",""
+"JAE rel32","JAE rel32","jae rel32","0F 83 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JAE rel8","JAE rel8","jae rel8","73 cb","V","V","","","r","Y",""
+"JB rel16","JB rel16","jb rel16","0F 82 cw","V","N.S.","","operand16","r","Y",""
+"JB rel32","JB rel32","jb rel32","0F 82 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JB rel32","JB rel32","jb rel32","0F 82 cd","V","V","","operand32","r","Y",""
+"JB rel8","JB rel8","jb rel8","72 cb","V","V","","","r","Y",""
+"JBE rel16","JBE rel16","jbe rel16","0F 86 cw","V","N.S.","","operand16","r","Y",""
+"JBE rel32","JBE rel32","jbe rel32","0F 86 cd","V","V","","operand32","r","Y",""
+"JBE rel32","JBE rel32","jbe rel32","0F 86 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JBE rel8","JBE rel8","jbe rel8","76 cb","V","V","","","r","Y",""
+"JC rel16","JC rel16","jc rel16","0F 82 cw","V","N.S.","","pseudo","r","",""
+"JC rel32","JC rel32","jc rel32","0F 82 cd","V","V","","pseudo","r","",""
+"JC rel8","JC rel8","jc rel8","72 cb","V","V","","pseudo","r","",""
+"JCXZ rel8","JCXZ rel8","jcxz rel8","E3 cb","V","N.E.","","address16","r","",""
+"JE rel16","JE rel16","je rel16","0F 84 cw","V","N.S.","","operand16","r","Y",""
+"JE rel32","JE rel32","je rel32","0F 84 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JE rel32","JE rel32","je rel32","0F 84 cd","V","V","","operand32","r","Y",""
+"JE rel8","JE rel8","je rel8","74 cb","V","V","","","r","Y",""
+"JECXZ rel8","JECXZ rel8","jecxz rel8","E3 cb","V","V","","address32","r","",""
+"JG rel16","JG rel16","jg rel16","0F 8F cw","V","N.S.","","operand16","r","Y",""
+"JG rel32","JG rel32","jg rel32","0F 8F cd","V","V","","operand32","r","Y",""
+"JG rel32","JG rel32","jg rel32","0F 8F cd","N.S.","V","","operand16,operand64","r","Y",""
+"JG rel8","JG rel8","jg rel8","7F cb","V","V","","","r","Y",""
+"JGE rel16","JGE rel16","jge rel16","0F 8D cw","V","N.S.","","operand16","r","Y",""
+"JGE rel32","JGE rel32","jge rel32","0F 8D cd","N.S.","V","","operand16,operand64","r","Y",""
+"JGE rel32","JGE rel32","jge rel32","0F 8D cd","V","V","","operand32","r","Y",""
+"JGE rel8","JGE rel8","jge rel8","7D cb","V","V","","","r","Y",""
+"JL rel16","JL rel16","jl rel16","0F 8C cw","V","N.S.","","operand16","r","Y",""
+"JL rel32","JL rel32","jl rel32","0F 8C cd","V","V","","operand32","r","Y",""
+"JL rel32","JL rel32","jl rel32","0F 8C cd","N.S.","V","","operand16,operand64","r","Y",""
+"JL rel8","JL rel8","jl rel8","7C cb","V","V","","","r","Y",""
+"JLE rel16","JLE rel16","jle rel16","0F 8E cw","V","N.S.","","operand16","r","Y",""
+"JLE rel32","JLE rel32","jle rel32","0F 8E cd","V","V","","operand32","r","Y",""
+"JLE rel32","JLE rel32","jle rel32","0F 8E cd","N.S.","V","","operand16,operand64","r","Y",""
+"JLE rel8","JLE rel8","jle rel8","7E cb","V","V","","","r","Y",""
+"JMP r/m16","JMPW* r/m16","jmpw* r/m16","FF /4","V","N.S.","","operand16","r","Y","16"
+"JMP r/m32","JMPL* r/m32","jmpl* r/m32","FF /4","V","N.S.","","operand32","r","Y","32"
+"JMP r/m64","JMPQ* r/m64","jmpq* r/m64","FF /4","N.E.","V","","","r","Y","64"
+"JMP rel16","JMP rel16","jmp rel16","E9 cw","V","N.S.","","operand16","r","Y",""
+"JMP rel32","JMP rel32","jmp rel32","E9 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JMP rel32","JMP rel32","jmp rel32","E9 cd","V","V","","operand32","r","Y",""
+"JMP rel8","JMP rel8","jmp rel8","EB cb","V","V","","","r","Y",""
+"JMP_FAR m16:16","LJMPW* m16:16","ljmpw* m16:16","FF /5","V","V","","operand16","r","Y",""
+"JMP_FAR m16:32","LJMPL* m16:32","ljmpl* m16:32","FF /5","V","V","","operand32","r","Y",""
+"JMP_FAR m16:64","LJMPQ* m16:64","ljmpq* m16:64","REX.W FF /5","N.E.","V","","","r","Y",""
+"JMP_FAR ptr16:16","LJMPW ptr16:16","ljmpw ptr16:16","EA cd","V","I","","operand16","r","Y",""
+"JMP_FAR ptr16:32","LJMPL ptr16:32","ljmpl ptr16:32","EA cp","V","I","","operand32","r","Y",""
+"JNA rel16","JNA rel16","jna rel16","0F 86 cw","V","N.S.","","pseudo","r","",""
+"JNA rel32","JNA rel32","jna rel32","0F 86 cd","V","V","","pseudo","r","",""
+"JNA rel8","JNA rel8","jna rel8","76 cb","V","V","","pseudo","r","",""
+"JNAE rel16","JNAE rel16","jnae rel16","0F 82 cw","V","N.S.","","pseudo","r","",""
+"JNAE rel32","JNAE rel32","jnae rel32","0F 82 cd","V","V","","pseudo","r","",""
+"JNAE rel8","JNAE rel8","jnae rel8","72 cb","V","V","","pseudo","r","",""
+"JNB rel16","JNB rel16","jnb rel16","0F 83 cw","V","N.S.","","pseudo","r","",""
+"JNB rel32","JNB rel32","jnb rel32","0F 83 cd","V","V","","pseudo","r","",""
+"JNB rel8","JNB rel8","jnb rel8","73 cb","V","V","","pseudo","r","",""
+"JNBE rel16","JNBE rel16","jnbe rel16","0F 87 cw","V","N.S.","","pseudo","r","",""
+"JNBE rel32","JNBE rel32","jnbe rel32","0F 87 cd","V","V","","pseudo","r","",""
+"JNBE rel8","JNBE rel8","jnbe rel8","77 cb","V","V","","pseudo","r","",""
+"JNC rel16","JNC rel16","jnc rel16","0F 83 cw","V","N.S.","","pseudo","r","",""
+"JNC rel32","JNC rel32","jnc rel32","0F 83 cd","V","V","","pseudo","r","",""
+"JNC rel8","JNC rel8","jnc rel8","73 cb","V","V","","pseudo","r","",""
+"JNE rel16","JNE rel16","jne rel16","0F 85 cw","V","N.S.","","operand16","r","Y",""
+"JNE rel32","JNE rel32","jne rel32","0F 85 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JNE rel32","JNE rel32","jne rel32","0F 85 cd","V","V","","operand32","r","Y",""
+"JNE rel8","JNE rel8","jne rel8","75 cb","V","V","","","r","Y",""
+"JNG rel16","JNG rel16","jng rel16","0F 8E cw","V","N.S.","","pseudo","r","",""
+"JNG rel32","JNG rel32","jng rel32","0F 8E cd","V","V","","pseudo","r","",""
+"JNG rel8","JNG rel8","jng rel8","7E cb","V","V","","pseudo","r","",""
+"JNGE rel16","JNGE rel16","jnge rel16","0F 8C cw","V","N.S.","","pseudo","r","",""
+"JNGE rel32","JNGE rel32","jnge rel32","0F 8C cd","V","V","","pseudo","r","",""
+"JNGE rel8","JNGE rel8","jnge rel8","7C cb","V","V","","pseudo","r","",""
+"JNL rel16","JNL rel16","jnl rel16","0F 8D cw","V","N.S.","","pseudo","r","",""
+"JNL rel32","JNL rel32","jnl rel32","0F 8D cd","V","V","","pseudo","r","",""
+"JNL rel8","JNL rel8","jnl rel8","7D cb","V","V","","pseudo","r","",""
+"JNLE rel16","JNLE rel16","jnle rel16","0F 8F cw","V","N.S.","","pseudo","r","",""
+"JNLE rel32","JNLE rel32","jnle rel32","0F 8F cd","V","V","","pseudo","r","",""
+"JNLE rel8","JNLE rel8","jnle rel8","7F cb","V","V","","pseudo","r","",""
+"JNO rel16","JNO rel16","jno rel16","0F 81 cw","V","N.S.","","operand16","r","Y",""
+"JNO rel32","JNO rel32","jno rel32","0F 81 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JNO rel32","JNO rel32","jno rel32","0F 81 cd","V","V","","operand32","r","Y",""
+"JNO rel8","JNO rel8","jno rel8","71 cb","V","V","","","r","Y",""
+"JNP rel16","JNP rel16","jnp rel16","0F 8B cw","V","N.S.","","operand16","r","Y",""
+"JNP rel32","JNP rel32","jnp rel32","0F 8B cd","N.S.","V","","operand16,operand64","r","Y",""
+"JNP rel32","JNP rel32","jnp rel32","0F 8B cd","V","V","","operand32","r","Y",""
+"JNP rel8","JNP rel8","jnp rel8","7B cb","V","V","","","r","Y",""
+"JNS rel16","JNS rel16","jns rel16","0F 89 cw","V","N.S.","","operand16","r","Y",""
+"JNS rel32","JNS rel32","jns rel32","0F 89 cd","V","V","","operand32","r","Y",""
+"JNS rel32","JNS rel32","jns rel32","0F 89 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JNS rel8","JNS rel8","jns rel8","79 cb","V","V","","","r","Y",""
+"JNZ rel16","JNZ rel16","jnz rel16","0F 85 cw","V","N.S.","","pseudo","r","",""
+"JNZ rel32","JNZ rel32","jnz rel32","0F 85 cd","V","V","","pseudo","r","",""
+"JNZ rel8","JNZ rel8","jnz rel8","75 cb","V","V","","pseudo","r","",""
+"JO rel16","JO rel16","jo rel16","0F 80 cw","V","N.S.","","operand16","r","Y",""
+"JO rel32","JO rel32","jo rel32","0F 80 cd","V","V","","operand32","r","Y",""
+"JO rel32","JO rel32","jo rel32","0F 80 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JO rel8","JO rel8","jo rel8","70 cb","V","V","","","r","Y",""
+"JP rel16","JP rel16","jp rel16","0F 8A cw","V","N.S.","","operand16","r","Y",""
+"JP rel32","JP rel32","jp rel32","0F 8A cd","N.S.","V","","operand16,operand64","r","Y",""
+"JP rel32","JP rel32","jp rel32","0F 8A cd","V","V","","operand32","r","Y",""
+"JP rel8","JP rel8","jp rel8","7A cb","V","V","","","r","Y",""
+"JPE rel16","JPE rel16","jpe rel16","0F 8A cw","V","N.S.","","pseudo","r","",""
+"JPE rel32","JPE rel32","jpe rel32","0F 8A cd","V","V","","pseudo","r","",""
+"JPE rel8","JPE rel8","jpe rel8","7A cb","V","V","","pseudo","r","",""
+"JPO rel16","JPO rel16","jpo rel16","0F 8B cw","V","N.S.","","pseudo","r","",""
+"JPO rel32","JPO rel32","jpo rel32","0F 8B cd","V","V","","pseudo","r","",""
+"JPO rel8","JPO rel8","jpo rel8","7B cb","V","V","","pseudo","r","",""
+"JRCXZ rel8","JRCXZ rel8","jrcxz rel8","E3 cb","N.E.","V","","address64","r","",""
+"JS rel16","JS rel16","js rel16","0F 88 cw","V","N.S.","","operand16","r","Y",""
+"JS rel32","JS rel32","js rel32","0F 88 cd","N.S.","V","","operand16,operand64","r","Y",""
+"JS rel32","JS rel32","js rel32","0F 88 cd","V","V","","operand32","r","Y",""
+"JS rel8","JS rel8","js rel8","78 cb","V","V","","","r","Y",""
+"JZ rel16","JZ rel16","jz rel16","0F 84 cw","V","N.S.","","operand16,pseudo","r","",""
+"JZ rel32","JZ rel32","jz rel32","0F 84 cd","V","V","","operand32,pseudo","r","",""
+"JZ rel8","JZ rel8","jz rel8","74 cb","V","V","","pseudo","r","",""
+"LAR r16, r/m16","LARW r/m16, r16","larw r/m16, r16","0F 02 /r","V","V","","operand16","w,r","Y","16"
+"LAR r32, r32/m16","LARL r32/m16, r32","larl r32/m16, r32","0F 02 /r","V","V","","operand32","w,r","Y","32"
+"LAR r64, r/m16","LARQ r/m16, r64","larq r/m16, r64","REX.W 0F 02 /r","N.E.","V","","","w,r","Y","64"
+"LDDQU xmm1, m128","LDDQU m128, xmm1","lddqu m128, xmm1","F2 0F F0 /r","V","V","SSE3","modrm_memonly","w,r","",""
+"LDMXCSR m32","LDMXCSR m32","ldmxcsr m32","0F AE /2","V","V","SSE","modrm_memonly","r","",""
+"LDS r16, m16:16","LDSW m16:16, r16","ldsw m16:16, r16","C5 /r","V","I","","operand16","w,r","Y","16"
+"LDS r32, m16:32","LDSL m16:32, r32","ldsl m16:32, r32","C5 /r","V","I","","operand32","w,r","Y","32"
+"LEA r16, m","LEAW m, r16","leaw m, r16","8D /r","V","V","","operand16","w,r","Y","16"
+"LEA r32, m","LEAL m, r32","leal m, r32","8D /r","V","V","","operand32","w,r","Y","32"
+"LEA r64, m","LEAQ m, r64","leaq m, r64","REX.W 8D /r","N.E.","V","","","w,r","Y","64"
+"LES r16, m16:16","LESW m16:16, r16","lesw m16:16, r16","C4 /r","V","I","","operand16","w,r","Y","16"
+"LES r32, m16:32","LESL m16:32, r32","lesl m16:32, r32","C4 /r","V","I","","operand32","w,r","Y","32"
+"LFENCE","LFENCE","lfence","0F AE E8","V","V","","","","",""
+"LFS r16, m16:16","LFSW m16:16, r16","lfsw m16:16, r16","0F B4 /r","V","V","","operand16","w,r","Y","16"
+"LFS r32, m16:32","LFSL m16:32, r32","lfsl m16:32, r32","0F B4 /r","V","V","","operand32","w,r","Y","32"
+"LFS r64, m16:64","LFSQ m16:64, r64","lfsq m16:64, r64","REX.W 0F B4 /r","N.E.","V","","","w,r","Y","64"
+"LGDT m16&32","LGDTW/LGDTL m16&32","lgdtw/lgdtl m16&32","0F 01 /2","V","N.E.","","","r","",""
+"LGDT m16&64","LGDT m16&64","lgdt m16&64","0F 01 /2","N.E.","V","","","r","",""
+"LGS r16, m16:16","LGSW m16:16, r16","lgsw m16:16, r16","0F B5 /r","V","V","","operand16","w,r","Y","16"
+"LGS r32, m16:32","LGSL m16:32, r32","lgsl m16:32, r32","0F B5 /r","V","V","","operand32","w,r","Y","32"
+"LGS r64, m16:64","LGSQ m16:64, r64","lgsq m16:64, r64","REX.W 0F B5 /r","N.E.","V","","","w,r","Y","64"
+"LIDT m16&32","LIDTW/LIDTL m16&32","lidtw/lidtl m16&32","0F 01 /3","V","N.E.","","","r","",""
+"LIDT m16&64","LIDT m16&64","lidt m16&64","0F 01 /3","N.E.","V","","","r","",""
+"LLDT r/m16","LLDT r/m16","lldt r/m16","0F 00 /2","V","V","","","r","",""
+"LMSW r/m16","LMSW r/m16","lmsw r/m16","0F 01 /6","V","V","","","r","",""
+"LODSQ","LODSQ","lodsq","REX.W AD","N.E.","V","","","","",""
+"LOOP rel8","LOOP rel8","loop rel8","E2 cb","V","V","","","r","",""
+"LOOPE rel8","LOOPEQ rel8","loope rel8","E1 cb","V","V","","","r","",""
+"LOOPNE rel8","LOOPNE rel8","loopne rel8","E0 cb","V","V","","","r","",""
+"LSL r16, r/m16","LSLW r/m16, r16","lslw r/m16, r16","0F 03 /r","V","V","","operand16","w,r","Y","16"
+"LSL r32, r32/m16","LSLL r32/m16, r32","lsll r32/m16, r32","0F 03 /r","V","V","","operand32","w,r","Y","32"
+"LSL r64, r32/m16","LSLQ r32/m16, r64","lslq r32/m16, r64","REX.W 0F 03 /r","N.E.","V","","","w,r","Y","64"
+"LSS r16, m16:16","LSSW m16:16, r16","lssw m16:16, r16","0F B2 /r","V","V","","operand16","w,r","Y","16"
+"LSS r32, m16:32","LSSL m16:32, r32","lssl m16:32, r32","0F B2 /r","V","V","","operand32","w,r","Y","32"
+"LSS r64, m16:64","LSSQ m16:64, r64","lssq m16:64, r64","REX.W 0F B2 /r","N.E.","V","","","w,r","Y","64"
+"LTR r/m16","LTR r/m16","ltr r/m16","0F 00 /3","V","V","","","r","",""
+"LZCNT r16, r/m16","LZCNTW r/m16, r16","lzcntw r/m16, r16","F3 0F BD /r","V","V","LZCNT","operand16","w,r","Y","16"
+"LZCNT r32, r/m32","LZCNTL r/m32, r32","lzcntl r/m32, r32","F3 0F BD /r","V","V","LZCNT","operand32","w,r","Y","32"
+"LZCNT r64, r/m64","LZCNTQ r/m64, r64","lzcntq r/m64, r64","F3 REX.W 0F BD /r","N.E.","V","LZCNT","","w,r","Y","64"
+"MASKMOVDQU xmm1, xmm2","MASKMOVOU xmm2, xmm1","maskmovdqu xmm2, xmm1","66 0F F7 /r","V","V","SSE2","modrm_regonly","r,r","",""
+"MASKMOVQ mm1, mm2","MASKMOVQ mm2, mm1","maskmovq mm2, mm1","0F F7 /r","V","V","","","r,r","",""
+"MAXPD xmm1, xmm2/m128","MAXPD xmm2/m128, xmm1","maxpd xmm2/m128, xmm1","66 0F 5F /r","V","V","SSE2","","rw,r","",""
+"MAXPS xmm1, xmm2/m128","MAXPS xmm2/m128, xmm1","maxps xmm2/m128, xmm1","0F 5F /r","V","V","SSE","","rw,r","",""
+"MAXSD xmm1, xmm2/m64","MAXSD xmm2/m64, xmm1","maxsd xmm2/m64, xmm1","F2 0F 5F /r","V","V","SSE2","","rw,r","",""
+"MAXSS xmm1, xmm2/m32","MAXSS xmm2/m32, xmm1","maxss xmm2/m32, xmm1","F3 0F 5F /r","V","V","SSE","","rw,r","",""
+"MFENCE","MFENCE","mfence","0F AE F0","V","V","","","","",""
+"MINPD xmm1, xmm2/m128","MINPD xmm2/m128, xmm1","minpd xmm2/m128, xmm1","66 0F 5D /r","V","V","SSE2","","rw,r","",""
+"MINPS xmm1, xmm2/m128","MINPS xmm2/m128, xmm1","minps xmm2/m128, xmm1","0F 5D /r","V","V","SSE","","rw,r","",""
+"MINSD xmm1, xmm2/m64","MINSD xmm2/m64, xmm1","minsd xmm2/m64, xmm1","F2 0F 5D /r","V","V","SSE2","","rw,r","",""
+"MINSS xmm1, xmm2/m32","MINSS xmm2/m32, xmm1","minss xmm2/m32, xmm1","F3 0F 5D /r","V","V","SSE","","rw,r","",""
+"MONITOR","MONITOR","monitor","0F 01 C8","V","V","","","","",""
+"MOV AL, moffs8","MOVB/MOVB/MOVABSB moffs8, AL","movb/movb/movabsb moffs8, AL","A0 cm","V","V","","ignoreREXW","w,r","Y","8"
+"MOV AL, moffs8","MOVB/MOVB/MOVABSB moffs8, AL","movb/movb/movabsb moffs8, AL","REX.W A0 cm","N.E.","V","","pseudo","w,r","Y","8"
+"MOV AX, moffs16","MOVW moffs16, AX","movw moffs16, AX","A1 cm","V","V","","operand16","w,r","Y","16"
+"MOV CR0-CR7, rmr32","MOVL rmr32, CR0-CR7","movl rmr32, CR0-CR7","0F 22 /r","V","N.E.","","modrm_regonly","w,r","Y","32"
+"MOV CR0-CR7, rmr64","MOVQ rmr64, CR0-CR7","movq rmr64, CR0-CR7","0F 22 /r","N.E.","V","","modrm_regonly","w,r","Y","64"
+"MOV CR8, rmr64","MOVQ rmr64, CR8","movq rmr64, CR8","REX.R + 0F 22 /0","N.E.","V","","modrm_regonly,pseudo","w,r","Y","64"
+"MOV DR0-DR7, rmr32","MOVL rmr32, DR0-DR7","movl rmr32, DR0-DR7","0F 23 /r","V","N.E.","","modrm_regonly","w,r","Y","32"
+"MOV DR0-DR7, rmr64","MOVQ rmr64, DR0-DR7","movq rmr64, DR0-DR7","0F 23 /r","N.E.","V","","modrm_regonly","w,r","Y","64"
+"MOV EAX, moffs32","MOVL moffs32, EAX","movl moffs32, EAX","A1 cm","V","V","","operand32","w,r","Y","32"
+"MOV RAX, moffs64","MOVQ moffs64, RAX","movabsq moffs64, RAX","REX.W A1 cm","N.E.","V","","","w,r","Y","64"
+"MOV Sreg, r/m16","MOVW r/m16, Sreg","movw r/m16, Sreg","8E /r","V","V","","operand16","w,r","Y","16"
+"MOV Sreg, r/m16","MOVW r/m16, Sreg","movw r/m16, Sreg","REX.W 8E /r","N.E.","V","","","w,r","Y","16"
+"MOV Sreg, r32/m16","MOV{L/W} r32/m16, Sreg","mov{l/w} r32/m16, Sreg","8E /r","V","V","","operand32","w,r","Y",""
+"MOV moffs16, AX","MOVW AX, moffs16","movw AX, moffs16","A3 cm","V","V","","operand16","w,r","Y","16"
+"MOV moffs32, EAX","MOVL EAX, moffs32","movl EAX, moffs32","A3 cm","V","V","","operand32","w,r","Y","32"
+"MOV moffs64, RAX","MOVQ RAX, moffs64","movabsq RAX, moffs64","REX.W A3 cm","N.E.","V","","","w,r","Y","64"
+"MOV moffs8, AL","MOVB/MOVB/MOVABSB AL, moffs8","movb/movb/movabsb AL, moffs8","A2 cm","V","V","","ignoreREXW","w,r","Y","8"
+"MOV moffs8, AL","MOVB/MOVB/MOVABSB AL, moffs8","movb/movb/movabsb AL, moffs8","REX.W A2 cm","N.E.","V","","pseudo","w,r","Y","8"
+"MOV r/m16, Sreg","MOVW Sreg, r/m16","movw Sreg, r/m16","8C /r","V","V","","operand16","w,r","Y","16"
+"MOV r/m16, Sreg","MOVW Sreg, r/m16","movw Sreg, r/m16","REX.W 8C /r","N.E.","V","","","w,r","Y","16"
+"MOV r/m16, imm16","MOVW imm16, r/m16","movw imm16, r/m16","C7 /0 iw","V","V","","operand16","w,r","Y","16"
+"MOV r/m16, r16","MOVW r16, r/m16","movw r16, r/m16","89 /r","V","V","","operand16","w,r","Y","16"
+"MOV r/m32, Sreg","MOVL Sreg, r/m32","movl Sreg, r/m32","8C /r","V","V","","operand32","w,r","Y","32"
+"MOV r/m32, imm32","MOVL imm32, r/m32","movl imm32, r/m32","C7 /0 id","V","V","","operand32","w,r","Y","32"
+"MOV r/m32, r32","MOVL r32, r/m32","movl r32, r/m32","89 /r","V","V","","operand32","w,r","Y","32"
+"MOV r/m64, imm32","MOVQ imm32, r/m64","movq imm32, r/m64","REX.W C7 /0 id","N.E.","V","","","w,r","Y","64"
+"MOV r/m64, r64","MOVQ r64, r/m64","movq r64, r/m64","REX.W 89 /r","N.E.","V","","","w,r","Y","64"
+"MOV r/m8, imm8u","MOVB imm8u, r/m8","movb imm8u, r/m8","C6 /0 ib","V","V","","","w,r","Y","8"
+"MOV r/m8, imm8u","MOVB imm8u, r/m8","movb imm8u, r/m8","REX C6 /0 ib","N.E.","V","","pseudo64","w,r","Y","8"
+"MOV r/m8, r8","MOVB r8, r/m8","movb r8, r/m8","88 /r","V","V","","","w,r","Y","8"
+"MOV r/m8, r8","MOVB r8, r/m8","movb r8, r/m8","REX 88 /r","N.E.","V","","pseudo64","w,r","Y","8"
+"MOV r16, r/m16","MOVW r/m16, r16","movw r/m16, r16","8B /r","V","V","","operand16","w,r","Y","16"
+"MOV r16op, imm16","MOVW imm16, r16op","movw imm16, r16op","B8+rw iw","V","V","","operand16","w,r","Y","16"
+"MOV r32, r/m32","MOVL r/m32, r32","movl r/m32, r32","8B /r","V","V","","operand32","w,r","Y","32"
+"MOV r32op, imm32","MOVL imm32, r32op","movl imm32, r32op","B8+rd id","V","V","","operand32","w,r","Y","32"
+"MOV r64, r/m64","MOVQ r/m64, r64","movq r/m64, r64","REX.W 8B /r","N.E.","V","","","w,r","Y","64"
+"MOV r64op, imm64","MOVQ imm64, r64op","movabsq imm64, r64op","REX.W B8+rd io","N.E.","V","","","w,r","Y","64"
+"MOV r8, r/m8","MOVB r/m8, r8","movb r/m8, r8","8A /r","V","V","","","w,r","Y","8"
+"MOV r8, r/m8","MOVB r/m8, r8","movb r/m8, r8","REX 8A /r","N.E.","V","","pseudo64","w,r","Y","8"
+"MOV r8op, imm8u","MOVB imm8u, r8op","movb imm8u, r8op","B0+rb ib","V","V","","","w,r","Y","8"
+"MOV r8op, imm8u","MOVB imm8u, r8op","movb imm8u, r8op","REX B0+rb ib","N.E.","V","","pseudo64","w,r","Y","8"
+"MOV rmr32, CR0-CR7","MOVL CR0-CR7, rmr32","movl CR0-CR7, rmr32","0F 20 /r","V","N.E.","","modrm_regonly","w,r","Y","32"
+"MOV rmr32, DR0-DR7","MOVL DR0-DR7, rmr32","movl DR0-DR7, rmr32","0F 21 /r","V","N.E.","","modrm_regonly","w,r","Y","32"
+"MOV rmr64, CR0-CR7","MOVQ CR0-CR7, rmr64","movq CR0-CR7, rmr64","0F 20 /r","N.E.","V","","modrm_regonly","w,r","Y","64"
+"MOV rmr64, CR8","MOVQ CR8, rmr64","movq CR8, rmr64","REX.R + 0F 20 /0","N.E.","V","","modrm_regonly,pseudo","w,r","Y","64"
+"MOV rmr64, DR0-DR7","MOVQ DR0-DR7, rmr64","movq DR0-DR7, rmr64","0F 21 /r","N.E.","V","","modrm_regonly","w,r","Y","64"
+"MOVAPD xmm1, xmm2/m128","MOVAPD xmm2/m128, xmm1","movapd xmm2/m128, xmm1","66 0F 28 /r","V","V","SSE2","","w,r","",""
+"MOVAPD xmm2/m128, xmm1","MOVAPD xmm1, xmm2/m128","movapd xmm1, xmm2/m128","66 0F 29 /r","V","V","SSE2","","w,r","",""
+"MOVAPS xmm1, xmm2/m128","MOVAPS xmm2/m128, xmm1","movaps xmm2/m128, xmm1","0F 28 /r","V","V","SSE","","w,r","",""
+"MOVAPS xmm2/m128, xmm1","MOVAPS xmm1, xmm2/m128","movaps xmm1, xmm2/m128","0F 29 /r","V","V","SSE","","w,r","",""
+"MOVBE m16, r16","MOVBEWW r16, m16","movbeww r16, m16","0F 38 F1 /r","V","V","","modrm_memonly,operand16","w,r","Y","16"
+"MOVBE m32, r32","MOVBELL r32, m32","movbell r32, m32","0F 38 F1 /r","V","V","","modrm_memonly,operand32","w,r","Y","32"
+"MOVBE m64, r64","MOVBEQQ r64, m64","movbeqq r64, m64","REX.W 0F 38 F1 /r","N.E.","V","","modrm_memonly","w,r","Y","64"
+"MOVBE r16, m16","MOVBEWW m16, r16","movbeww m16, r16","0F 38 F0 /r","V","V","","modrm_memonly,operand16","w,r","Y","16"
+"MOVBE r32, m32","MOVBELL m32, r32","movbell m32, r32","0F 38 F0 /r","V","V","","modrm_memonly,operand32","w,r","Y","32"
+"MOVBE r64, m64","MOVBEQQ m64, r64","movbeqq m64, r64","REX.W 0F 38 F0 /r","N.E.","V","","modrm_memonly","w,r","Y","64"
+"MOVD mm1, r/m32","MOVD r/m32, mm1","movd r/m32, mm1","0F 6E /r","V","V","MMX","operand16,operand32","w,r","",""
+"MOVD r/m32, mm1","MOVD mm1, r/m32","movd mm1, r/m32","0F 7E /r","V","V","MMX","operand16,operand32","w,r","",""
+"MOVD r/m32, xmm1","MOVD xmm1, r/m32","movd xmm1, r/m32","66 0F 7E /r","V","V","SSE2","operand16,operand32","w,r","",""
+"MOVD xmm1, r/m32","MOVD r/m32, xmm1","movd r/m32, xmm1","66 0F 6E /r","V","V","SSE2","operand16,operand32","w,r","",""
+"MOVDDUP xmm1, xmm2/m64","MOVDDUP xmm2/m64, xmm1","movddup xmm2/m64, xmm1","F2 0F 12 /r","V","V","SSE3","","w,r","",""
+"MOVDQ2Q mm1, xmm2","MOVQ xmm2, mm1","movdq2q xmm2, mm1","F2 0F D6 /r","V","V","","modrm_regonly","w,r","",""
+"MOVDQA xmm1, xmm2/m128","MOVO xmm2/m128, xmm1","movdqa xmm2/m128, xmm1","66 0F 6F /r","V","V","SSE2","","w,r","",""
+"MOVDQA xmm2/m128, xmm1","MOVO xmm1, xmm2/m128","movdqa xmm1, xmm2/m128","66 0F 7F /r","V","V","SSE2","","w,r","",""
+"MOVDQU xmm1, xmm2/m128","MOVOU xmm2/m128, xmm1","movdqu xmm2/m128, xmm1","F3 0F 6F /r","V","V","SSE2","","w,r","",""
+"MOVDQU xmm2/m128, xmm1","MOVOU xmm1, xmm2/m128","movdqu xmm1, xmm2/m128","F3 0F 7F /r","V","V","SSE2","","w,r","",""
+"MOVHLPS xmm1, xmm2","MOVHLPS xmm2, xmm1","movhlps xmm2, xmm1","0F 12 /r","V","V","SSE","modrm_regonly","w,r","",""
+"MOVHPD m64, xmm1","MOVHPD xmm1, m64","movhpd xmm1, m64","66 0F 17 /r","V","V","SSE2","modrm_memonly","w,r","",""
+"MOVHPD xmm1, m64","MOVHPD m64, xmm1","movhpd m64, xmm1","66 0F 16 /r","V","V","SSE2","modrm_memonly","rw,r","",""
+"MOVHPS m64, xmm1","MOVHPS xmm1, m64","movhps xmm1, m64","0F 17 /r","V","V","SSE","modrm_memonly","w,r","",""
+"MOVHPS xmm1, m64","MOVHPS m64, xmm1","movhps m64, xmm1","0F 16 /r","V","V","SSE","modrm_memonly","rw,r","",""
+"MOVLHPS xmm1, xmm2","MOVLHPS xmm2, xmm1","movlhps xmm2, xmm1","0F 16 /r","V","V","SSE","modrm_regonly","w,r","",""
+"MOVLPD m64, xmm1","MOVLPD xmm1, m64","movlpd xmm1, m64","66 0F 13 /r","V","V","SSE2","modrm_memonly","w,r","",""
+"MOVLPD xmm1, m64","MOVLPD m64, xmm1","movlpd m64, xmm1","66 0F 12 /r","V","V","SSE2","modrm_memonly","rw,r","",""
+"MOVLPS m64, xmm1","MOVLPS xmm1, m64","movlps xmm1, m64","0F 13 /r","V","V","SSE","modrm_memonly","w,r","",""
+"MOVLPS xmm1, m64","MOVLPS m64, xmm1","movlps m64, xmm1","0F 12 /r","V","V","SSE","modrm_memonly","rw,r","",""
+"MOVMSKPD r32, xmm2","MOVMSKPD xmm2, r32","movmskpd xmm2, r32","66 0F 50 /r","V","V","SSE2","modrm_regonly","w,r","",""
+"MOVMSKPS r32, xmm2","MOVMSKPS xmm2, r32","movmskps xmm2, r32","0F 50 /r","V","V","SSE","modrm_regonly","w,r","",""
+"MOVNTDQ m128, xmm1","MOVNTO xmm1, m128","movntdq xmm1, m128","66 0F E7 /r","V","V","SSE2","modrm_memonly","w,r","",""
+"MOVNTDQA xmm1, m128","MOVNTDQA m128, xmm1","movntdqa m128, xmm1","66 0F 38 2A /r","V","V","SSE4_1","modrm_memonly","w,r","",""
+"MOVNTI m32, r32","MOVNTIL r32, m32","movntil r32, m32","0F C3 /r","V","V","","modrm_memonly,operand16,operand32","w,r","Y","32"
+"MOVNTI m64, r64","MOVNTIQ r64, m64","movntiq r64, m64","REX.W 0F C3 /r","N.E.","V","","modrm_memonly","w,r","Y","64"
+"MOVNTPD m128, xmm1","MOVNTPD xmm1, m128","movntpd xmm1, m128","66 0F 2B /r","V","V","SSE2","modrm_memonly","w,r","",""
+"MOVNTPS m128, xmm1","MOVNTPS xmm1, m128","movntps xmm1, m128","0F 2B /r","V","V","SSE","modrm_memonly","w,r","",""
+"MOVNTQ m64, mm1","MOVNTQ mm1, m64","movntq mm1, m64","0F E7 /r","V","V","","modrm_memonly","w,r","",""
+"MOVNTSD m64, xmm1","MOVNTSD xmm1, m64","movntsd xmm1, m64","F2 0F 2B /r","V","V","SSE","","w,r","",""
+"MOVNTSS m32, xmm1","MOVNTSS xmm1, m32","movntss xmm1, m32","F3 0F 2B /r","V","V","SSE","","w,r","",""
+"MOVQ mm1, mm2/m64","MOVQ mm2/m64, mm1","movq mm2/m64, mm1","0F 6F /r","V","V","MMX","","w,r","",""
+"MOVQ mm1, r/m64","MOVQ r/m64, mm1","movq r/m64, mm1","REX.W 0F 6E /r","N.E.","V","MMX","","w,r","",""
+"MOVQ mm2/m64, mm1","MOVQ mm1, mm2/m64","movq mm1, mm2/m64","0F 7F /r","V","V","MMX","","w,r","",""
+"MOVQ r/m64, mm1","MOVQ mm1, r/m64","movq mm1, r/m64","REX.W 0F 7E /r","N.E.","V","MMX","","w,r","",""
+"MOVQ r/m64, xmm1","MOVQ xmm1, r/m64","movq xmm1, r/m64","66 REX.W 0F 7E /r","N.E.","V","SSE2","","w,r","",""
+"MOVQ xmm1, r/m64","MOVQ r/m64, xmm1","movq r/m64, xmm1","66 REX.W 0F 6E /r","N.E.","V","SSE2","","w,r","",""
+"MOVQ xmm1, xmm2/m64","MOVQ xmm2/m64, xmm1","movq xmm2/m64, xmm1","F3 0F 7E /r","V","V","SSE2","","w,r","",""
+"MOVQ xmm2/m64, xmm1","MOVQ xmm1, xmm2/m64","movq xmm1, xmm2/m64","66 0F D6 /r","V","V","SSE2","","w,r","",""
+"MOVQ2DQ xmm1, mm2","MOVQOZX mm2, xmm1","movq2dq mm2, xmm1","F3 0F D6 /r","V","V","","","w,r","",""
+"MOVSD xmm1, xmm2/m64","MOVSD xmm2/m64, xmm1","movsd xmm2/m64, xmm1","F2 0F 10 /r","V","V","SSE2","","w,r","",""
+"MOVSD xmm2/m64, xmm1","MOVSD xmm1, xmm2/m64","movsd xmm1, xmm2/m64","F2 0F 11 /r","V","V","SSE2","","w,r","",""
+"MOVSHDUP xmm1, xmm2/m128","MOVSHDUP xmm2/m128, xmm1","movshdup xmm2/m128, xmm1","F3 0F 16 /r","V","V","SSE3","","w,r","",""
+"MOVSLDUP xmm1, xmm2/m128","MOVSLDUP xmm2/m128, xmm1","movsldup xmm2/m128, xmm1","F3 0F 12 /r","V","V","SSE3","","w,r","",""
+"MOVSQ","MOVSQ","movsq","REX.W A5","N.E.","V","","","","",""
+"MOVSS xmm1, xmm2/m32","MOVSS xmm2/m32, xmm1","movss xmm2/m32, xmm1","F3 0F 10 /r","V","V","SSE","","w,r","",""
+"MOVSS xmm2/m32, xmm1","MOVSS xmm1, xmm2/m32","movss xmm1, xmm2/m32","F3 0F 11 /r","V","V","SSE","","w,r","",""
+"MOVSX r16, r/m16","MOVSWW r/m16, r16","movsww r/m16, r16","0F BF /r","V","V","","operand16","w,r","Y","16"
+"MOVSX r16, r/m8","MOVBWSX r/m8, r16","movsbw r/m8, r16","0F BE /r","V","V","","operand16","w,r","Y","16"
+"MOVSX r32, r/m16","MOVWLSX r/m16, r32","movswl r/m16, r32","0F BF /r","V","V","","operand32","w,r","Y","32"
+"MOVSX r32, r/m8","MOVBLSX r/m8, r32","movsbl r/m8, r32","0F BE /r","V","V","","operand32","w,r","Y","32"
+"MOVSX r64, r/m16","MOVWQSX r/m16, r64","movswq r/m16, r64","REX.W 0F BF /r","N.E.","V","","","w,r","Y","64"
+"MOVSX r64, r/m8","MOVBQSX r/m8, r64","movsbq r/m8, r64","REX.W 0F BE /r","N.E.","V","","","w,r","Y","64"
+"MOVSXD r16, r/m32","MOVWQSX r/m32, r16","movsxdw r/m32, r16","63 /r","N.E.","V","","operand16","w,r","Y","16"
+"MOVSXD r32, r/m32","MOVLQSX r/m32, r32","movsxdl r/m32, r32","63 /r","N.E.","V","","operand32","w,r","Y","32"
+"MOVSXD r64, r/m32","MOVLQSX r/m32, r64","movslq r/m32, r64","REX.W 63 /r","N.E.","V","","","w,r","Y","64"
+"MOVUPD xmm1, xmm2/m128","MOVUPD xmm2/m128, xmm1","movupd xmm2/m128, xmm1","66 0F 10 /r","V","V","SSE2","","w,r","",""
+"MOVUPD xmm2/m128, xmm1","MOVUPD xmm1, xmm2/m128","movupd xmm1, xmm2/m128","66 0F 11 /r","V","V","SSE2","","w,r","",""
+"MOVUPS xmm1, xmm2/m128","MOVUPS xmm2/m128, xmm1","movups xmm2/m128, xmm1","0F 10 /r","V","V","SSE","","w,r","",""
+"MOVUPS xmm2/m128, xmm1","MOVUPS xmm1, xmm2/m128","movups xmm1, xmm2/m128","0F 11 /r","V","V","SSE","","w,r","",""
+"MOVZX r16, r/m16","MOVZWW r/m16, r16","movzww r/m16, r16","0F B7 /r","V","V","","operand16","w,r","Y","16"
+"MOVZX r16, r/m8","MOVBWZX r/m8, r16","movzbw r/m8, r16","0F B6 /r","V","V","","operand16","w,r","Y","16"
+"MOVZX r32, r/m16","MOVWLZX r/m16, r32","movzwl r/m16, r32","0F B7 /r","V","V","","operand32","w,r","Y","32"
+"MOVZX r32, r/m8","MOVBLZX r/m8, r32","movzbl r/m8, r32","0F B6 /r","V","V","","operand32","w,r","Y","32"
+"MOVZX r64, r/m16","MOVWQZX r/m16, r64","movzwq r/m16, r64","REX.W 0F B7 /r","N.E.","V","","","w,r","Y","64"
+"MOVZX r64, r/m8","MOVBQZX r/m8, r64","movzbq r/m8, r64","REX.W 0F B6 /r","N.E.","V","","","w,r","Y","64"
+"MPSADBW xmm1, xmm2/m128, imm8","MPSADBW imm8, xmm2/m128, xmm1","mpsadbw imm8, xmm2/m128, xmm1","66 0F 3A 42 /r ib","V","V","SSE4_1","","rw,r,r","",""
+"MUL r/m16","MULW r/m16","mulw r/m16","F7 /4","V","V","","operand16","r","Y","16"
+"MUL r/m32","MULL r/m32","mull r/m32","F7 /4","V","V","","operand32","r","Y","32"
+"MUL r/m64","MULQ r/m64","mulq r/m64","REX.W F7 /4","N.E.","V","","","r","Y","64"
+"MUL r/m8","MULB r/m8","mulb r/m8","F6 /4","V","V","","","r","Y","8"
+"MUL r/m8","MULB r/m8","mulb r/m8","REX F6 /4","N.E.","V","","pseudo64","r","Y","8"
+"MULPD xmm1, xmm2/m128","MULPD xmm2/m128, xmm1","mulpd xmm2/m128, xmm1","66 0F 59 /r","V","V","SSE2","","rw,r","",""
+"MULPS xmm1, xmm2/m128","MULPS xmm2/m128, xmm1","mulps xmm2/m128, xmm1","0F 59 /r","V","V","SSE","","rw,r","",""
+"MULSD xmm1, xmm2/m64","MULSD xmm2/m64, xmm1","mulsd xmm2/m64, xmm1","F2 0F 59 /r","V","V","SSE2","","rw,r","",""
+"MULSS xmm1, xmm2/m32","MULSS xmm2/m32, xmm1","mulss xmm2/m32, xmm1","F3 0F 59 /r","V","V","SSE","","rw,r","",""
+"MULX r32, r32V, r/m32","MULXL r/m32, r32V, r32","mulxl r/m32, r32V, r32","VEX.NDD.LZ.F2.0F38.W0 F6 /r","V","V","BMI2","","w,w,r","Y","32"
+"MULX r64, r64V, r/m64","MULXQ r/m64, r64V, r64","mulxq r/m64, r64V, r64","VEX.NDD.LZ.F2.0F38.W1 F6 /r","N.E.","V","BMI2","","w,w,r","Y","64"
+"MWAIT","MWAIT","mwait","0F 01 C9","V","V","","","","",""
+"NEG r/m16","NEGW r/m16","negw r/m16","F7 /3","V","V","","operand16","rw","Y","16"
+"NEG r/m32","NEGL r/m32","negl r/m32","F7 /3","V","V","","operand32","rw","Y","32"
+"NEG r/m64","NEGQ r/m64","negq r/m64","REX.W F7 /3","N.E.","V","","","rw","Y","64"
+"NEG r/m8","NEGB r/m8","negb r/m8","F6 /3","V","V","","","rw","Y","8"
+"NEG r/m8","NEGB r/m8","negb r/m8","REX F6 /3","N.E.","V","","pseudo64","rw","Y","8"
+"NOP r/m16","NOPW r/m16","nopw r/m16","0F 1F /0","V","V","","operand16","r","Y","16"
+"NOP r/m32","NOPL r/m32","nopl r/m32","0F 1F /0","V","V","","operand32","r","Y","32"
+"NOT r/m16","NOTW r/m16","notw r/m16","F7 /2","V","V","","operand16","rw","Y","16"
+"NOT r/m32","NOTL r/m32","notl r/m32","F7 /2","V","V","","operand32","rw","Y","32"
+"NOT r/m64","NOTQ r/m64","notq r/m64","REX.W F7 /2","N.E.","V","","","rw","Y","64"
+"NOT r/m8","NOTB r/m8","notb r/m8","F6 /2","V","V","","","rw","Y","8"
+"NOT r/m8","NOTB r/m8","notb r/m8","REX F6 /2","N.E.","V","","pseudo64","rw","Y","8"
+"OR AL, imm8","ORB imm8, AL","orb imm8, AL","0C ib","V","V","","","rw,r","Y","8"
+"OR AX, imm16","ORW imm16, AX","orw imm16, AX","0D iw","V","V","","operand16","rw,r","Y","16"
+"OR EAX, imm32","ORL imm32, EAX","orl imm32, EAX","0D id","V","V","","operand32","rw,r","Y","32"
+"OR RAX, imm32","ORQ imm32, RAX","orq imm32, RAX","REX.W 0D id","N.E.","V","","","rw,r","Y","64"
+"OR r/m16, imm16","ORW imm16, r/m16","orw imm16, r/m16","81 /1 iw","V","V","","operand16","rw,r","Y","16"
+"OR r/m16, imm8","ORW imm8, r/m16","orw imm8, r/m16","83 /1 ib","V","V","","operand16","rw,r","Y","16"
+"OR r/m16, r16","ORW r16, r/m16","orw r16, r/m16","09 /r","V","V","","operand16","rw,r","Y","16"
+"OR r/m32, imm32","ORL imm32, r/m32","orl imm32, r/m32","81 /1 id","V","V","","operand32","rw,r","Y","32"
+"OR r/m32, imm8","ORL imm8, r/m32","orl imm8, r/m32","83 /1 ib","V","V","","operand32","rw,r","Y","32"
+"OR r/m32, r32","ORL r32, r/m32","orl r32, r/m32","09 /r","V","V","","operand32","rw,r","Y","32"
+"OR r/m64, imm32","ORQ imm32, r/m64","orq imm32, r/m64","REX.W 81 /1 id","N.E.","V","","","rw,r","Y","64"
+"OR r/m64, imm8","ORQ imm8, r/m64","orq imm8, r/m64","REX.W 83 /1 ib","N.E.","V","","","rw,r","Y","64"
+"OR r/m64, r64","ORQ r64, r/m64","orq r64, r/m64","REX.W 09 /r","N.E.","V","","","rw,r","Y","64"
+"OR r/m8, imm8","ORB imm8, r/m8","orb imm8, r/m8","80 /1 ib","V","V","","","rw,r","Y","8"
+"OR r/m8, imm8","ORB imm8, r/m8","orb imm8, r/m8","REX 80 /1 ib","N.E.","V","","pseudo64","rw,r","Y","8"
+"OR r/m8, r8","ORB r8, r/m8","orb r8, r/m8","08 /r","V","V","","","rw,r","Y","8"
+"OR r/m8, r8","ORB r8, r/m8","orb r8, r/m8","REX 08 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"OR r16, r/m16","ORW r/m16, r16","orw r/m16, r16","0B /r","V","V","","operand16","rw,r","Y","16"
+"OR r32, r/m32","ORL r/m32, r32","orl r/m32, r32","0B /r","V","V","","operand32","rw,r","Y","32"
+"OR r64, r/m64","ORQ r/m64, r64","orq r/m64, r64","REX.W 0B /r","N.E.","V","","","rw,r","Y","64"
+"OR r8, r/m8","ORB r/m8, r8","orb r/m8, r8","0A /r","V","V","","","rw,r","Y","8"
+"OR r8, r/m8","ORB r/m8, r8","orb r/m8, r8","REX 0A /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"ORPD xmm1, xmm2/m128","ORPD xmm2/m128, xmm1","orpd xmm2/m128, xmm1","66 0F 56 /r","V","V","SSE2","","rw,r","",""
+"ORPS xmm1, xmm2/m128","ORPS xmm2/m128, xmm1","orps xmm2/m128, xmm1","0F 56 /r","V","V","SSE","","rw,r","",""
+"OUT DX, AL","OUTB AL, DX","outb AL, DX","EE","V","V","","","r,r","Y","8"
+"OUT DX, AX","OUTW AX, DX","outw AX, DX","EF","V","V","","operand16","r,r","Y","16"
+"OUT DX, EAX","OUTL EAX, DX","outl EAX, DX","EF","V","V","","operand32,operand64","r,r","Y","32"
+"OUT imm8u, AL","OUTB AL, imm8u","outb AL, imm8u","E6 ib","V","V","","","r,r","Y","8"
+"OUT imm8u, AX","OUTW AX, imm8u","outw AX, imm8u","E7 ib","V","V","","operand16","r,r","Y","16"
+"OUT imm8u, EAX","OUTL EAX, imm8u","outl EAX, imm8u","E7 ib","V","V","","operand32,operand64","r,r","Y","32"
+"PABSB mm1, mm2/m64","PABSB mm2/m64, mm1","pabsb mm2/m64, mm1","0F 38 1C /r","V","V","SSSE3","","w,r","",""
+"PABSB xmm1, xmm2/m128","PABSB xmm2/m128, xmm1","pabsb xmm2/m128, xmm1","66 0F 38 1C /r","V","V","SSSE3","","w,r","",""
+"PABSD mm1, mm2/m64","PABSD mm2/m64, mm1","pabsd mm2/m64, mm1","0F 38 1E /r","V","V","SSSE3","","w,r","",""
+"PABSD xmm1, xmm2/m128","PABSD xmm2/m128, xmm1","pabsd xmm2/m128, xmm1","66 0F 38 1E /r","V","V","SSSE3","","w,r","",""
+"PABSW mm1, mm2/m64","PABSW mm2/m64, mm1","pabsw mm2/m64, mm1","0F 38 1D /r","V","V","SSSE3","","w,r","",""
+"PABSW xmm1, xmm2/m128","PABSW xmm2/m128, xmm1","pabsw xmm2/m128, xmm1","66 0F 38 1D /r","V","V","SSSE3","","w,r","",""
+"PACKSSDW mm1, mm2/m64","PACKSSLW mm2/m64, mm1","packssdw mm2/m64, mm1","0F 6B /r","V","V","MMX","","rw,r","",""
+"PACKSSDW xmm1, xmm2/m128","PACKSSLW xmm2/m128, xmm1","packssdw xmm2/m128, xmm1","66 0F 6B /r","V","V","SSE2","","rw,r","",""
+"PACKSSWB mm1, mm2/m64","PACKSSWB mm2/m64, mm1","packsswb mm2/m64, mm1","0F 63 /r","V","V","MMX","","rw,r","",""
+"PACKSSWB xmm1, xmm2/m128","PACKSSWB xmm2/m128, xmm1","packsswb xmm2/m128, xmm1","66 0F 63 /r","V","V","SSE2","","rw,r","",""
+"PACKUSDW xmm1, xmm2/m128","PACKUSDW xmm2/m128, xmm1","packusdw xmm2/m128, xmm1","66 0F 38 2B /r","V","V","SSE4_1","","rw,r","",""
+"PACKUSWB mm1, mm2/m64","PACKUSWB mm2/m64, mm1","packuswb mm2/m64, mm1","0F 67 /r","V","V","MMX","","rw,r","",""
+"PACKUSWB xmm1, xmm2/m128","PACKUSWB xmm2/m128, xmm1","packuswb xmm2/m128, xmm1","66 0F 67 /r","V","V","SSE2","","rw,r","",""
+"PADDB mm1, mm2/m64","PADDB mm2/m64, mm1","paddb mm2/m64, mm1","0F FC /r","V","V","MMX","","rw,r","",""
+"PADDB xmm1, xmm2/m128","PADDB xmm2/m128, xmm1","paddb xmm2/m128, xmm1","66 0F FC /r","V","V","SSE2","","rw,r","",""
+"PADDD mm1, mm2/m64","PADDL mm2/m64, mm1","paddd mm2/m64, mm1","0F FE /r","V","V","MMX","","rw,r","",""
+"PADDD xmm1, xmm2/m128","PADDL xmm2/m128, xmm1","paddd xmm2/m128, xmm1","66 0F FE /r","V","V","SSE2","","rw,r","",""
+"PADDQ mm1, mm2/m64","PADDQ mm2/m64, mm1","paddq mm2/m64, mm1","0F D4 /r","V","V","SSE2","","rw,r","",""
+"PADDQ xmm1, xmm2/m128","PADDQ xmm2/m128, xmm1","paddq xmm2/m128, xmm1","66 0F D4 /r","V","V","SSE2","","rw,r","",""
+"PADDSB mm1, mm2/m64","PADDSB mm2/m64, mm1","paddsb mm2/m64, mm1","0F EC /r","V","V","MMX","","rw,r","",""
+"PADDSB xmm1, xmm2/m128","PADDSB xmm2/m128, xmm1","paddsb xmm2/m128, xmm1","66 0F EC /r","V","V","SSE2","","rw,r","",""
+"PADDSW mm1, mm2/m64","PADDSW mm2/m64, mm1","paddsw mm2/m64, mm1","0F ED /r","V","V","MMX","","rw,r","",""
+"PADDSW xmm1, xmm2/m128","PADDSW xmm2/m128, xmm1","paddsw xmm2/m128, xmm1","66 0F ED /r","V","V","SSE2","","rw,r","",""
+"PADDUSB mm1, mm2/m64","PADDUSB mm2/m64, mm1","paddusb mm2/m64, mm1","0F DC /r","V","V","MMX","","rw,r","",""
+"PADDUSB xmm1, xmm2/m128","PADDUSB xmm2/m128, xmm1","paddusb xmm2/m128, xmm1","66 0F DC /r","V","V","SSE2","","rw,r","",""
+"PADDUSW mm1, mm2/m64","PADDUSW mm2/m64, mm1","paddusw mm2/m64, mm1","0F DD /r","V","V","MMX","","rw,r","",""
+"PADDUSW xmm1, xmm2/m128","PADDUSW xmm2/m128, xmm1","paddusw xmm2/m128, xmm1","66 0F DD /r","V","V","SSE2","","rw,r","",""
+"PADDW mm1, mm2/m64","PADDW mm2/m64, mm1","paddw mm2/m64, mm1","0F FD /r","V","V","MMX","","rw,r","",""
+"PADDW xmm1, xmm2/m128","PADDW xmm2/m128, xmm1","paddw xmm2/m128, xmm1","66 0F FD /r","V","V","SSE2","","rw,r","",""
+"PALIGNR mm1, mm2/m64, imm8","PALIGNR imm8, mm2/m64, mm1","palignr imm8, mm2/m64, mm1","0F 3A 0F /r ib","V","V","SSSE3","","rw,r,r","",""
+"PALIGNR xmm1, xmm2/m128, imm8","PALIGNR imm8, xmm2/m128, xmm1","palignr imm8, xmm2/m128, xmm1","66 0F 3A 0F /r ib","V","V","SSSE3","","rw,r,r","",""
+"PAND mm1, mm2/m64","PAND mm2/m64, mm1","pand mm2/m64, mm1","0F DB /r","V","V","MMX","","rw,r","",""
+"PAND xmm1, xmm2/m128","PAND xmm2/m128, xmm1","pand xmm2/m128, xmm1","66 0F DB /r","V","V","SSE2","","rw,r","",""
+"PANDN mm1, mm2/m64","PANDN mm2/m64, mm1","pandn mm2/m64, mm1","0F DF /r","V","V","MMX","","rw,r","",""
+"PANDN xmm1, xmm2/m128","PANDN xmm2/m128, xmm1","pandn xmm2/m128, xmm1","66 0F DF /r","V","V","SSE2","","rw,r","",""
+"PAUSE","PAUSE","pause","F3 90","V","V","","pseudo","","",""
+"PAVGB mm1, mm2/m64","PAVGB mm2/m64, mm1","pavgb mm2/m64, mm1","0F E0 /r","V","V","SSE","","rw,r","",""
+"PAVGB xmm1, xmm2/m128","PAVGB xmm2/m128, xmm1","pavgb xmm2/m128, xmm1","66 0F E0 /r","V","V","SSE2","","rw,r","",""
+"PAVGW mm1, mm2/m64","PAVGW mm2/m64, mm1","pavgw mm2/m64, mm1","0F E3 /r","V","V","SSE","","rw,r","",""
+"PAVGW xmm1, xmm2/m128","PAVGW xmm2/m128, xmm1","pavgw xmm2/m128, xmm1","66 0F E3 /r","V","V","SSE2","","rw,r","",""
+"PBLENDVB xmm1, xmm2/m128, <XMM0>","PBLENDVB <XMM0>, xmm2/m128, xmm1","pblendvb <XMM0>, xmm2/m128, xmm1","66 0F 38 10 /r","V","V","SSE4_1","","rw,r,r","",""
+"PBLENDW xmm1, xmm2/m128, imm8","PBLENDW imm8, xmm2/m128, xmm1","pblendw imm8, xmm2/m128, xmm1","66 0F 3A 0E /r ib","V","V","SSE4_1","","rw,r,r","",""
+"PCLMULQDQ xmm1, xmm2/m128, imm8","PCLMULQDQ imm8, xmm2/m128, xmm1","pclmulqdq imm8, xmm2/m128, xmm1","66 0F 3A 44 /r ib","V","V","PCLMULQDQ","","rw,r,r","",""
+"PCMPEQB mm1, mm2/m64","PCMPEQB mm2/m64, mm1","pcmpeqb mm2/m64, mm1","0F 74 /r","V","V","MMX","","rw,r","",""
+"PCMPEQB xmm1, xmm2/m128","PCMPEQB xmm2/m128, xmm1","pcmpeqb xmm2/m128, xmm1","66 0F 74 /r","V","V","SSE2","","rw,r","",""
+"PCMPEQD mm1, mm2/m64","PCMPEQL mm2/m64, mm1","pcmpeqd mm2/m64, mm1","0F 76 /r","V","V","MMX","","rw,r","",""
+"PCMPEQD xmm1, xmm2/m128","PCMPEQL xmm2/m128, xmm1","pcmpeqd xmm2/m128, xmm1","66 0F 76 /r","V","V","SSE2","","rw,r","",""
+"PCMPEQQ xmm1, xmm2/m128","PCMPEQQ xmm2/m128, xmm1","pcmpeqq xmm2/m128, xmm1","66 0F 38 29 /r","V","V","SSE4_1","","rw,r","",""
+"PCMPEQW mm1, mm2/m64","PCMPEQW mm2/m64, mm1","pcmpeqw mm2/m64, mm1","0F 75 /r","V","V","MMX","","rw,r","",""
+"PCMPEQW xmm1, xmm2/m128","PCMPEQW xmm2/m128, xmm1","pcmpeqw xmm2/m128, xmm1","66 0F 75 /r","V","V","SSE2","","rw,r","",""
+"PCMPESTRI xmm1, xmm2/m128, imm8","PCMPESTRI imm8, xmm2/m128, xmm1","pcmpestri imm8, xmm2/m128, xmm1","66 0F 3A 61 /r ib","V","V","SSE4_2","","r,r,r","",""
+"PCMPESTRM xmm1, xmm2/m128, imm8","PCMPESTRM imm8, xmm2/m128, xmm1","pcmpestrm imm8, xmm2/m128, xmm1","66 0F 3A 60 /r ib","V","V","SSE4_2","","r,r,r","",""
+"PCMPGTB mm1, mm2/m64","PCMPGTB mm2/m64, mm1","pcmpgtb mm2/m64, mm1","0F 64 /r","V","V","MMX","","rw,r","",""
+"PCMPGTB xmm1, xmm2/m128","PCMPGTB xmm2/m128, xmm1","pcmpgtb xmm2/m128, xmm1","66 0F 64 /r","V","V","SSE2","","rw,r","",""
+"PCMPGTD mm1, mm2/m64","PCMPGTL mm2/m64, mm1","pcmpgtd mm2/m64, mm1","0F 66 /r","V","V","MMX","","rw,r","",""
+"PCMPGTD xmm1, xmm2/m128","PCMPGTL xmm2/m128, xmm1","pcmpgtd xmm2/m128, xmm1","66 0F 66 /r","V","V","SSE2","","rw,r","",""
+"PCMPGTQ xmm1, xmm2/m128","PCMPGTQ xmm2/m128, xmm1","pcmpgtq xmm2/m128, xmm1","66 0F 38 37 /r","V","V","SSE4_2","","rw,r","",""
+"PCMPGTW mm1, mm2/m64","PCMPGTW mm2/m64, mm1","pcmpgtw mm2/m64, mm1","0F 65 /r","V","V","MMX","","rw,r","",""
+"PCMPGTW xmm1, xmm2/m128","PCMPGTW xmm2/m128, xmm1","pcmpgtw xmm2/m128, xmm1","66 0F 65 /r","V","V","SSE2","","rw,r","",""
+"PCMPISTRI xmm1, xmm2/m128, imm8","PCMPISTRI imm8, xmm2/m128, xmm1","pcmpistri imm8, xmm2/m128, xmm1","66 0F 3A 63 /r ib","V","V","SSE4_2","","r,r,r","",""
+"PCMPISTRM xmm1, xmm2/m128, imm8","PCMPISTRM imm8, xmm2/m128, xmm1","pcmpistrm imm8, xmm2/m128, xmm1","66 0F 3A 62 /r ib","V","V","SSE4_2","","r,r,r","",""
+"PDEP r32, r32V, r/m32","PDEPL r/m32, r32V, r32","pdepl r/m32, r32V, r32","VEX.NDS.LZ.F2.0F38.W0 F5 /r","V","V","BMI2","","w,r,r","Y","32"
+"PDEP r64, r64V, r/m64","PDEPQ r/m64, r64V, r64","pdepq r/m64, r64V, r64","VEX.NDS.LZ.F2.0F38.W1 F5 /r","N.E.","V","BMI2","","w,r,r","Y","64"
+"PEXT r32, r32V, r/m32","PEXTL r/m32, r32V, r32","pextl r/m32, r32V, r32","VEX.NDS.LZ.F3.0F38.W0 F5 /r","V","V","BMI2","","w,r,r","Y","32"
+"PEXT r64, r64V, r/m64","PEXTQ r/m64, r64V, r64","pextq r/m64, r64V, r64","VEX.NDS.LZ.F3.0F38.W1 F5 /r","N.E.","V","BMI2","","w,r,r","Y","64"
+"PEXTRB r32/m8, xmm1, imm8","PEXTRB imm8, xmm1, r32/m8","pextrb imm8, xmm1, r32/m8","66 0F 3A 14 /r ib","V","V","SSE4_1","","w,r,r","",""
+"PEXTRD r/m32, xmm1, imm8","PEXTRD imm8, xmm1, r/m32","pextrd imm8, xmm1, r/m32","66 0F 3A 16 /r ib","V","V","SSE4_1","operand16,operand32","w,r,r","",""
+"PEXTRQ r/m64, xmm1, imm8","PEXTRQ imm8, xmm1, r/m64","pextrq imm8, xmm1, r/m64","66 REX.W 0F 3A 16 /r ib","N.E.","V","SSE4_1","","w,r,r","",""
+"PEXTRW r32, mm2, imm8","PEXTRW imm8, mm2, r32","pextrw imm8, mm2, r32","0F C5 /r ib","V","V","SSE","","w,r,r","",""
+"PEXTRW r32, xmm2, imm8","PEXTRW imm8, xmm2, r32","pextrw imm8, xmm2, r32","66 0F C5 /r ib","V","V","SSE2","modrm_regonly","w,r,r","",""
+"PEXTRW r32/m16, xmm1, imm8","PEXTRW imm8, xmm1, r32/m16","pextrw imm8, xmm1, r32/m16","66 0F 3A 15 /r ib","V","V","SSE4_1","","w,r,r","",""
+"PHADDD mm1, mm2/m64","PHADDD mm2/m64, mm1","phaddd mm2/m64, mm1","0F 38 02 /r","V","V","SSSE3","","rw,r","",""
+"PHADDD xmm1, xmm2/m128","PHADDD xmm2/m128, xmm1","phaddd xmm2/m128, xmm1","66 0F 38 02 /r","V","V","SSSE3","","rw,r","",""
+"PHADDSW mm1, mm2/m64","PHADDSW mm2/m64, mm1","phaddsw mm2/m64, mm1","0F 38 03 /r","V","V","SSSE3","","rw,r","",""
+"PHADDSW xmm1, xmm2/m128","PHADDSW xmm2/m128, xmm1","phaddsw xmm2/m128, xmm1","66 0F 38 03 /r","V","V","SSSE3","","rw,r","",""
+"PHADDW mm1, mm2/m64","PHADDW mm2/m64, mm1","phaddw mm2/m64, mm1","0F 38 01 /r","V","V","SSSE3","","rw,r","",""
+"PHADDW xmm1, xmm2/m128","PHADDW xmm2/m128, xmm1","phaddw xmm2/m128, xmm1","66 0F 38 01 /r","V","V","SSSE3","","rw,r","",""
+"PHMINPOSUW xmm1, xmm2/m128","PHMINPOSUW xmm2/m128, xmm1","phminposuw xmm2/m128, xmm1","66 0F 38 41 /r","V","V","SSE4_1","","w,r","",""
+"PHSUBD mm1, mm2/m64","PHSUBD mm2/m64, mm1","phsubd mm2/m64, mm1","0F 38 06 /r","V","V","SSSE3","","rw,r","",""
+"PHSUBD xmm1, xmm2/m128","PHSUBD xmm2/m128, xmm1","phsubd xmm2/m128, xmm1","66 0F 38 06 /r","V","V","SSSE3","","rw,r","",""
+"PHSUBSW mm1, mm2/m64","PHSUBSW mm2/m64, mm1","phsubsw mm2/m64, mm1","0F 38 07 /r","V","V","SSSE3","","rw,r","",""
+"PHSUBSW xmm1, xmm2/m128","PHSUBSW xmm2/m128, xmm1","phsubsw xmm2/m128, xmm1","66 0F 38 07 /r","V","V","SSSE3","","rw,r","",""
+"PHSUBW mm1, mm2/m64","PHSUBW mm2/m64, mm1","phsubw mm2/m64, mm1","0F 38 05 /r","V","V","SSSE3","","rw,r","",""
+"PHSUBW xmm1, xmm2/m128","PHSUBW xmm2/m128, xmm1","phsubw xmm2/m128, xmm1","66 0F 38 05 /r","V","V","SSSE3","","rw,r","",""
+"PINSRB xmm1, r32/m8, imm8","PINSRB imm8, r32/m8, xmm1","pinsrb imm8, r32/m8, xmm1","66 0F 3A 20 /r ib","V","V","SSE4_1","","w,r,r","",""
+"PINSRD xmm1, r/m32, imm8","PINSRD imm8, r/m32, xmm1","pinsrd imm8, r/m32, xmm1","66 0F 3A 22 /r ib","V","V","SSE4_1","operand16,operand32","w,r,r","",""
+"PINSRQ xmm1, r/m64, imm8","PINSRQ imm8, r/m64, xmm1","pinsrq imm8, r/m64, xmm1","66 REX.W 0F 3A 22 /r ib","N.E.","V","SSE4_1","","w,r,r","",""
+"PINSRW mm1, r32/m16, imm8","PINSRW imm8, r32/m16, mm1","pinsrw imm8, r32/m16, mm1","0F C4 /r ib","V","V","SSE","","w,r,r","",""
+"PINSRW xmm1, r32/m16, imm8","PINSRW imm8, r32/m16, xmm1","pinsrw imm8, r32/m16, xmm1","66 0F C4 /r ib","V","V","SSE2","","w,r,r","",""
+"PMADDUBSW mm1, mm2/m64","PMADDUBSW mm2/m64, mm1","pmaddubsw mm2/m64, mm1","0F 38 04 /r","V","V","SSSE3","","rw,r","",""
+"PMADDUBSW xmm1, xmm2/m128","PMADDUBSW xmm2/m128, xmm1","pmaddubsw xmm2/m128, xmm1","66 0F 38 04 /r","V","V","SSSE3","","rw,r","",""
+"PMADDWD mm1, mm2/m64","PMADDWL mm2/m64, mm1","pmaddwd mm2/m64, mm1","0F F5 /r","V","V","MMX","","rw,r","",""
+"PMADDWD xmm1, xmm2/m128","PMADDWL xmm2/m128, xmm1","pmaddwd xmm2/m128, xmm1","66 0F F5 /r","V","V","SSE2","","rw,r","",""
+"PMAXSB xmm1, xmm2/m128","PMAXSB xmm2/m128, xmm1","pmaxsb xmm2/m128, xmm1","66 0F 38 3C /r","V","V","SSE4_1","","rw,r","",""
+"PMAXSD xmm1, xmm2/m128","PMAXSD xmm2/m128, xmm1","pmaxsd xmm2/m128, xmm1","66 0F 38 3D /r","V","V","SSE4_1","","rw,r","",""
+"PMAXSW mm1, mm2/m64","PMAXSW mm2/m64, mm1","pmaxsw mm2/m64, mm1","0F EE /r","V","V","SSE","","rw,r","",""
+"PMAXSW xmm1, xmm2/m128","PMAXSW xmm2/m128, xmm1","pmaxsw xmm2/m128, xmm1","66 0F EE /r","V","V","SSE2","","rw,r","",""
+"PMAXUB mm1, mm2/m64","PMAXUB mm2/m64, mm1","pmaxub mm2/m64, mm1","0F DE /r","V","V","SSE","","rw,r","",""
+"PMAXUB xmm1, xmm2/m128","PMAXUB xmm2/m128, xmm1","pmaxub xmm2/m128, xmm1","66 0F DE /r","V","V","SSE2","","rw,r","",""
+"PMAXUD xmm1, xmm2/m128","PMAXUD xmm2/m128, xmm1","pmaxud xmm2/m128, xmm1","66 0F 38 3F /r","V","V","SSE4_1","","rw,r","",""
+"PMAXUW xmm1, xmm2/m128","PMAXUW xmm2/m128, xmm1","pmaxuw xmm2/m128, xmm1","66 0F 38 3E /r","V","V","SSE4_1","","rw,r","",""
+"PMINSB xmm1, xmm2/m128","PMINSB xmm2/m128, xmm1","pminsb xmm2/m128, xmm1","66 0F 38 38 /r","V","V","SSE4_1","","rw,r","",""
+"PMINSD xmm1, xmm2/m128","PMINSD xmm2/m128, xmm1","pminsd xmm2/m128, xmm1","66 0F 38 39 /r","V","V","SSE4_1","","rw,r","",""
+"PMINSW mm1, mm2/m64","PMINSW mm2/m64, mm1","pminsw mm2/m64, mm1","0F EA /r","V","V","SSE","","rw,r","",""
+"PMINSW xmm1, xmm2/m128","PMINSW xmm2/m128, xmm1","pminsw xmm2/m128, xmm1","66 0F EA /r","V","V","SSE2","","rw,r","",""
+"PMINUB mm1, mm2/m64","PMINUB mm2/m64, mm1","pminub mm2/m64, mm1","0F DA /r","V","V","SSE","","rw,r","",""
+"PMINUB xmm1, xmm2/m128","PMINUB xmm2/m128, xmm1","pminub xmm2/m128, xmm1","66 0F DA /r","V","V","SSE2","","rw,r","",""
+"PMINUD xmm1, xmm2/m128","PMINUD xmm2/m128, xmm1","pminud xmm2/m128, xmm1","66 0F 38 3B /r","V","V","SSE4_1","","rw,r","",""
+"PMINUW xmm1, xmm2/m128","PMINUW xmm2/m128, xmm1","pminuw xmm2/m128, xmm1","66 0F 38 3A /r","V","V","SSE4_1","","rw,r","",""
+"PMOVMSKB r32, mm2","PMOVMSKB mm2, r32","pmovmskb mm2, r32","0F D7 /r","V","V","SSE","","w,r","",""
+"PMOVMSKB r32, xmm2","PMOVMSKB xmm2, r32","pmovmskb xmm2, r32","66 0F D7 /r","V","V","SSE2","modrm_regonly","w,r","",""
+"PMOVSXBD xmm1, xmm2/m32","PMOVSXBD xmm2/m32, xmm1","pmovsxbd xmm2/m32, xmm1","66 0F 38 21 /r","V","V","SSE4_1","","w,r","",""
+"PMOVSXBQ xmm1, xmm2/m16","PMOVSXBQ xmm2/m16, xmm1","pmovsxbq xmm2/m16, xmm1","66 0F 38 22 /r","V","V","SSE4_1","","w,r","",""
+"PMOVSXBW xmm1, xmm2/m64","PMOVSXBW xmm2/m64, xmm1","pmovsxbw xmm2/m64, xmm1","66 0F 38 20 /r","V","V","SSE4_1","","w,r","",""
+"PMOVSXDQ xmm1, xmm2/m64","PMOVSXDQ xmm2/m64, xmm1","pmovsxdq xmm2/m64, xmm1","66 0F 38 25 /r","V","V","SSE4_1","","w,r","",""
+"PMOVSXWD xmm1, xmm2/m64","PMOVSXWD xmm2/m64, xmm1","pmovsxwd xmm2/m64, xmm1","66 0F 38 23 /r","V","V","SSE4_1","","w,r","",""
+"PMOVSXWQ xmm1, xmm2/m32","PMOVSXWQ xmm2/m32, xmm1","pmovsxwq xmm2/m32, xmm1","66 0F 38 24 /r","V","V","SSE4_1","","w,r","",""
+"PMOVZXBD xmm1, xmm2/m32","PMOVZXBD xmm2/m32, xmm1","pmovzxbd xmm2/m32, xmm1","66 0F 38 31 /r","V","V","SSE4_1","","w,r","",""
+"PMOVZXBQ xmm1, xmm2/m16","PMOVZXBQ xmm2/m16, xmm1","pmovzxbq xmm2/m16, xmm1","66 0F 38 32 /r","V","V","SSE4_1","","w,r","",""
+"PMOVZXBW xmm1, xmm2/m64","PMOVZXBW xmm2/m64, xmm1","pmovzxbw xmm2/m64, xmm1","66 0F 38 30 /r","V","V","SSE4_1","","w,r","",""
+"PMOVZXDQ xmm1, xmm2/m64","PMOVZXDQ xmm2/m64, xmm1","pmovzxdq xmm2/m64, xmm1","66 0F 38 35 /r","V","V","SSE4_1","","w,r","",""
+"PMOVZXWD xmm1, xmm2/m64","PMOVZXWD xmm2/m64, xmm1","pmovzxwd xmm2/m64, xmm1","66 0F 38 33 /r","V","V","SSE4_1","","w,r","",""
+"PMOVZXWQ xmm1, xmm2/m32","PMOVZXWQ xmm2/m32, xmm1","pmovzxwq xmm2/m32, xmm1","66 0F 38 34 /r","V","V","SSE4_1","","w,r","",""
+"PMULDQ xmm1, xmm2/m128","PMULDQ xmm2/m128, xmm1","pmuldq xmm2/m128, xmm1","66 0F 38 28 /r","V","V","SSE4_1","","rw,r","",""
+"PMULHRSW mm1, mm2/m64","PMULHRSW mm2/m64, mm1","pmulhrsw mm2/m64, mm1","0F 38 0B /r","V","V","SSSE3","","rw,r","",""
+"PMULHRSW xmm1, xmm2/m128","PMULHRSW xmm2/m128, xmm1","pmulhrsw xmm2/m128, xmm1","66 0F 38 0B /r","V","V","SSSE3","","rw,r","",""
+"PMULHUW mm1, mm2/m64","PMULHUW mm2/m64, mm1","pmulhuw mm2/m64, mm1","0F E4 /r","V","V","SSE","","rw,r","",""
+"PMULHUW xmm1, xmm2/m128","PMULHUW xmm2/m128, xmm1","pmulhuw xmm2/m128, xmm1","66 0F E4 /r","V","V","SSE2","","rw,r","",""
+"PMULHW mm1, mm2/m64","PMULHW mm2/m64, mm1","pmulhw mm2/m64, mm1","0F E5 /r","V","V","MMX","","rw,r","",""
+"PMULHW xmm1, xmm2/m128","PMULHW xmm2/m128, xmm1","pmulhw xmm2/m128, xmm1","66 0F E5 /r","V","V","SSE2","","rw,r","",""
+"PMULLD xmm1, xmm2/m128","PMULLD xmm2/m128, xmm1","pmulld xmm2/m128, xmm1","66 0F 38 40 /r","V","V","SSE4_1","","rw,r","",""
+"PMULLW mm1, mm2/m64","PMULLW mm2/m64, mm1","pmullw mm2/m64, mm1","0F D5 /r","V","V","MMX","","rw,r","",""
+"PMULLW xmm1, xmm2/m128","PMULLW xmm2/m128, xmm1","pmullw xmm2/m128, xmm1","66 0F D5 /r","V","V","SSE2","","rw,r","",""
+"PMULUDQ mm1, mm2/m64","PMULULQ mm2/m64, mm1","pmuludq mm2/m64, mm1","0F F4 /r","V","V","SSE2","","rw,r","",""
+"PMULUDQ xmm1, xmm2/m128","PMULULQ xmm2/m128, xmm1","pmuludq xmm2/m128, xmm1","66 0F F4 /r","V","V","SSE2","","rw,r","",""
+"POP DS","POPW/POPL/POPQ DS","popw/popl/popq DS","1F","V","I","","","w","Y",""
+"POP ES","POPW/POPL/POPQ ES","popw/popl/popq ES","07","V","I","","","w","Y",""
+"POP FS","POPW/POPL/POPQ FS","popw/popl/popq FS","0F A1","V","N.E.","","operand32","w","Y",""
+"POP FS","POPW/POPL/POPQ FS","popw/popl/popq FS","0F A1","V","V","","operand16","w","Y",""
+"POP FS","POPW/POPL/POPQ FS","popw/popl/popq FS","0F A1","N.E.","V","","operand32,operand64","w","Y",""
+"POP GS","POPW/POPL/POPQ GS","popw/popl/popq GS","0F A9","V","N.E.","","operand32","w","Y",""
+"POP GS","POPW/POPL/POPQ GS","popw/popl/popq GS","0F A9","V","V","","operand16","w","Y",""
+"POP GS","POPW/POPL/POPQ GS","popw/popl/popq GS","0F A9","N.E.","V","","operand32,operand64","w","Y",""
+"POP SS","POPW/POPL/POPQ SS","popw/popl/popq SS","17","V","I","","","w","Y",""
+"POP r/m16","POPW r/m16","popw r/m16","8F /0","V","V","","operand16","w","Y","16"
+"POP r/m32","POPL r/m32","popl r/m32","8F /0","V","N.E.","","operand32","w","Y","32"
+"POP r/m64","POPQ r/m64","popq r/m64","8F /0","N.E.","V","","operand32,operand64","w","Y","64"
+"POP r16op","POPW r16op","popw r16op","58+rw","V","V","","operand16","w","Y","16"
+"POP r32op","POPL r32op","popl r32op","58+rd","V","N.E.","","operand32","w","Y","32"
+"POP r64op","POPQ r64op","popq r64op","58+rd","N.E.","V","","operand32,operand64","w","Y","64"
+"POPCNT r16, r/m16","POPCNTW r/m16, r16","popcntw r/m16, r16","F3 0F B8 /r","V","V","","operand16","w,r","Y","16"
+"POPCNT r32, r/m32","POPCNTL r/m32, r32","popcntl r/m32, r32","F3 0F B8 /r","V","V","","operand32","w,r","Y","32"
+"POPCNT r64, r/m64","POPCNTQ r/m64, r64","popcntq r/m64, r64","F3 REX.W 0F B8 /r","N.E.","V","","","w,r","Y","64"
+"POR mm1, mm2/m64","POR mm2/m64, mm1","por mm2/m64, mm1","0F EB /r","V","V","MMX","","rw,r","",""
+"POR xmm1, xmm2/m128","POR xmm2/m128, xmm1","por xmm2/m128, xmm1","66 0F EB /r","V","V","SSE2","","rw,r","",""
+"PREFETCHNTA m8","PREFETCHNTA m8","prefetchnta m8","0F 18 /0","V","V","","modrm_memonly","r","",""
+"PREFETCHT0 m8","PREFETCHT0 m8","prefetcht0 m8","0F 18 /1","V","V","","modrm_memonly","r","",""
+"PREFETCHT1 m8","PREFETCHT1 m8","prefetcht1 m8","0F 18 /2","V","V","","modrm_memonly","r","",""
+"PREFETCHT2 m8","PREFETCHT2 m8","prefetcht2 m8","0F 18 /3","V","V","","modrm_memonly","r","",""
+"PREFETCHW m8","PREFETCHW m8","prefetchw m8","0F 0D /1","V","V","PRFCHW","modrm_memonly","r","",""
+"PREFETCHWT1 m8","PREFETCHWT1 m8","prefetchwt1 m8","0F 0D /2","V","V","PREFETCHWT1","modrm_memonly","r","",""
+"PSADBW mm1, mm2/m64","PSADBW mm2/m64, mm1","psadbw mm2/m64, mm1","0F F6 /r","V","V","SSE","","rw,r","",""
+"PSADBW xmm1, xmm2/m128","PSADBW xmm2/m128, xmm1","psadbw xmm2/m128, xmm1","66 0F F6 /r","V","V","SSE2","","rw,r","",""
+"PSHUFB mm1, mm2/m64","PSHUFB mm2/m64, mm1","pshufb mm2/m64, mm1","0F 38 00 /r","V","V","SSSE3","","rw,r","",""
+"PSHUFB xmm1, xmm2/m128","PSHUFB xmm2/m128, xmm1","pshufb xmm2/m128, xmm1","66 0F 38 00 /r","V","V","SSSE3","","rw,r","",""
+"PSHUFD xmm1, xmm2/m128, imm8","PSHUFD imm8, xmm2/m128, xmm1","pshufd imm8, xmm2/m128, xmm1","66 0F 70 /r ib","V","V","SSE2","","w,r,r","",""
+"PSHUFHW xmm1, xmm2/m128, imm8","PSHUFHW imm8, xmm2/m128, xmm1","pshufhw imm8, xmm2/m128, xmm1","F3 0F 70 /r ib","V","V","SSE2","","w,r,r","",""
+"PSHUFLW xmm1, xmm2/m128, imm8","PSHUFLW imm8, xmm2/m128, xmm1","pshuflw imm8, xmm2/m128, xmm1","F2 0F 70 /r ib","V","V","SSE2","","w,r,r","",""
+"PSHUFW mm1, mm2/m64, imm8","PSHUFW imm8, mm2/m64, mm1","pshufw imm8, mm2/m64, mm1","0F 70 /r ib","V","V","","","w,r,r","",""
+"PSIGNB mm1, mm2/m64","PSIGNB mm2/m64, mm1","psignb mm2/m64, mm1","0F 38 08 /r","V","V","SSSE3","","rw,r","",""
+"PSIGNB xmm1, xmm2/m128","PSIGNB xmm2/m128, xmm1","psignb xmm2/m128, xmm1","66 0F 38 08 /r","V","V","SSSE3","","rw,r","",""
+"PSIGND mm1, mm2/m64","PSIGND mm2/m64, mm1","psignd mm2/m64, mm1","0F 38 0A /r","V","V","SSSE3","","rw,r","",""
+"PSIGND xmm1, xmm2/m128","PSIGND xmm2/m128, xmm1","psignd xmm2/m128, xmm1","66 0F 38 0A /r","V","V","SSSE3","","rw,r","",""
+"PSIGNW mm1, mm2/m64","PSIGNW mm2/m64, mm1","psignw mm2/m64, mm1","0F 38 09 /r","V","V","SSSE3","","rw,r","",""
+"PSIGNW xmm1, xmm2/m128","PSIGNW xmm2/m128, xmm1","psignw xmm2/m128, xmm1","66 0F 38 09 /r","V","V","SSSE3","","rw,r","",""
+"PSLLD mm1, mm2/m64","PSLLL mm2/m64, mm1","pslld mm2/m64, mm1","0F F2 /r","V","V","MMX","","rw,r","",""
+"PSLLD mm2, imm8","PSLLL imm8, mm2","pslld imm8, mm2","0F 72 /6 ib","V","V","MMX","","rw,r","",""
+"PSLLD xmm1, xmm2/m128","PSLLL xmm2/m128, xmm1","pslld xmm2/m128, xmm1","66 0F F2 /r","V","V","SSE2","","rw,r","",""
+"PSLLD xmm2, imm8","PSLLL imm8, xmm2","pslld imm8, xmm2","66 0F 72 /6 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSLLDQ xmm2, imm8","PSLLO imm8, xmm2","pslldq imm8, xmm2","66 0F 73 /7 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSLLQ mm1, mm2/m64","PSLLQ mm2/m64, mm1","psllq mm2/m64, mm1","0F F3 /r","V","V","MMX","","rw,r","",""
+"PSLLQ mm2, imm8","PSLLQ imm8, mm2","psllq imm8, mm2","0F 73 /6 ib","V","V","MMX","","rw,r","",""
+"PSLLQ xmm1, xmm2/m128","PSLLQ xmm2/m128, xmm1","psllq xmm2/m128, xmm1","66 0F F3 /r","V","V","SSE2","","rw,r","",""
+"PSLLQ xmm2, imm8","PSLLQ imm8, xmm2","psllq imm8, xmm2","66 0F 73 /6 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSLLW mm1, mm2/m64","PSLLW mm2/m64, mm1","psllw mm2/m64, mm1","0F F1 /r","V","V","MMX","","rw,r","",""
+"PSLLW mm2, imm8","PSLLW imm8, mm2","psllw imm8, mm2","0F 71 /6 ib","V","V","MMX","","rw,r","",""
+"PSLLW xmm1, xmm2/m128","PSLLW xmm2/m128, xmm1","psllw xmm2/m128, xmm1","66 0F F1 /r","V","V","SSE2","","rw,r","",""
+"PSLLW xmm2, imm8","PSLLW imm8, xmm2","psllw imm8, xmm2","66 0F 71 /6 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSRAD mm1, mm2/m64","PSRAL mm2/m64, mm1","psrad mm2/m64, mm1","0F E2 /r","V","V","MMX","","rw,r","",""
+"PSRAD mm2, imm8","PSRAL imm8, mm2","psrad imm8, mm2","0F 72 /4 ib","V","V","MMX","","rw,r","",""
+"PSRAD xmm1, xmm2/m128","PSRAL xmm2/m128, xmm1","psrad xmm2/m128, xmm1","66 0F E2 /r","V","V","SSE2","","rw,r","",""
+"PSRAD xmm2, imm8","PSRAL imm8, xmm2","psrad imm8, xmm2","66 0F 72 /4 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSRAW mm1, mm2/m64","PSRAW mm2/m64, mm1","psraw mm2/m64, mm1","0F E1 /r","V","V","MMX","","rw,r","",""
+"PSRAW mm2, imm8","PSRAW imm8, mm2","psraw imm8, mm2","0F 71 /4 ib","V","V","MMX","","rw,r","",""
+"PSRAW xmm1, xmm2/m128","PSRAW xmm2/m128, xmm1","psraw xmm2/m128, xmm1","66 0F E1 /r","V","V","SSE2","","rw,r","",""
+"PSRAW xmm2, imm8","PSRAW imm8, xmm2","psraw imm8, xmm2","66 0F 71 /4 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSRLD mm1, mm2/m64","PSRLL mm2/m64, mm1","psrld mm2/m64, mm1","0F D2 /r","V","V","MMX","","rw,r","",""
+"PSRLD mm2, imm8","PSRLL imm8, mm2","psrld imm8, mm2","0F 72 /2 ib","V","V","MMX","","rw,r","",""
+"PSRLD xmm1, xmm2/m128","PSRLL xmm2/m128, xmm1","psrld xmm2/m128, xmm1","66 0F D2 /r","V","V","SSE2","","rw,r","",""
+"PSRLD xmm2, imm8","PSRLL imm8, xmm2","psrld imm8, xmm2","66 0F 72 /2 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSRLDQ xmm2, imm8","PSRLO imm8, xmm2","psrldq imm8, xmm2","66 0F 73 /3 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSRLQ mm1, mm2/m64","PSRLQ mm2/m64, mm1","psrlq mm2/m64, mm1","0F D3 /r","V","V","MMX","","rw,r","",""
+"PSRLQ mm2, imm8","PSRLQ imm8, mm2","psrlq imm8, mm2","0F 73 /2 ib","V","V","MMX","","rw,r","",""
+"PSRLQ xmm1, xmm2/m128","PSRLQ xmm2/m128, xmm1","psrlq xmm2/m128, xmm1","66 0F D3 /r","V","V","SSE2","","rw,r","",""
+"PSRLQ xmm2, imm8","PSRLQ imm8, xmm2","psrlq imm8, xmm2","66 0F 73 /2 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSRLW mm1, mm2/m64","PSRLW mm2/m64, mm1","psrlw mm2/m64, mm1","0F D1 /r","V","V","MMX","","rw,r","",""
+"PSRLW mm2, imm8","PSRLW imm8, mm2","psrlw imm8, mm2","0F 71 /2 ib","V","V","MMX","","rw,r","",""
+"PSRLW xmm1, xmm2/m128","PSRLW xmm2/m128, xmm1","psrlw xmm2/m128, xmm1","66 0F D1 /r","V","V","SSE2","","rw,r","",""
+"PSRLW xmm2, imm8","PSRLW imm8, xmm2","psrlw imm8, xmm2","66 0F 71 /2 ib","V","V","SSE2","modrm_regonly","rw,r","",""
+"PSUBB mm1, mm2/m64","PSUBB mm2/m64, mm1","psubb mm2/m64, mm1","0F F8 /r","V","V","MMX","","rw,r","",""
+"PSUBB xmm1, xmm2/m128","PSUBB xmm2/m128, xmm1","psubb xmm2/m128, xmm1","66 0F F8 /r","V","V","SSE2","","rw,r","",""
+"PSUBD mm1, mm2/m64","PSUBL mm2/m64, mm1","psubd mm2/m64, mm1","0F FA /r","V","V","MMX","","rw,r","",""
+"PSUBD xmm1, xmm2/m128","PSUBL xmm2/m128, xmm1","psubd xmm2/m128, xmm1","66 0F FA /r","V","V","SSE2","","rw,r","",""
+"PSUBQ mm1, mm2/m64","PSUBQ mm2/m64, mm1","psubq mm2/m64, mm1","0F FB /r","V","V","SSE2","","rw,r","",""
+"PSUBQ xmm1, xmm2/m128","PSUBQ xmm2/m128, xmm1","psubq xmm2/m128, xmm1","66 0F FB /r","V","V","SSE2","","rw,r","",""
+"PSUBSB mm1, mm2/m64","PSUBSB mm2/m64, mm1","psubsb mm2/m64, mm1","0F E8 /r","V","V","MMX","","rw,r","",""
+"PSUBSB xmm1, xmm2/m128","PSUBSB xmm2/m128, xmm1","psubsb xmm2/m128, xmm1","66 0F E8 /r","V","V","SSE2","","rw,r","",""
+"PSUBSW mm1, mm2/m64","PSUBSW mm2/m64, mm1","psubsw mm2/m64, mm1","0F E9 /r","V","V","MMX","","rw,r","",""
+"PSUBSW xmm1, xmm2/m128","PSUBSW xmm2/m128, xmm1","psubsw xmm2/m128, xmm1","66 0F E9 /r","V","V","SSE2","","rw,r","",""
+"PSUBUSB mm1, mm2/m64","PSUBUSB mm2/m64, mm1","psubusb mm2/m64, mm1","0F D8 /r","V","V","MMX","","rw,r","",""
+"PSUBUSB xmm1, xmm2/m128","PSUBUSB xmm2/m128, xmm1","psubusb xmm2/m128, xmm1","66 0F D8 /r","V","V","SSE2","","rw,r","",""
+"PSUBUSW mm1, mm2/m64","PSUBUSW mm2/m64, mm1","psubusw mm2/m64, mm1","0F D9 /r","V","V","MMX","","rw,r","",""
+"PSUBUSW xmm1, xmm2/m128","PSUBUSW xmm2/m128, xmm1","psubusw xmm2/m128, xmm1","66 0F D9 /r","V","V","SSE2","","rw,r","",""
+"PSUBW mm1, mm2/m64","PSUBW mm2/m64, mm1","psubw mm2/m64, mm1","0F F9 /r","V","V","MMX","","rw,r","",""
+"PSUBW xmm1, xmm2/m128","PSUBW xmm2/m128, xmm1","psubw xmm2/m128, xmm1","66 0F F9 /r","V","V","SSE2","","rw,r","",""
+"PTEST xmm1, xmm2/m128","PTEST xmm2/m128, xmm1","ptest xmm2/m128, xmm1","66 0F 38 17 /r","V","V","SSE4_1","","r,r","",""
+"PUNPCKHBW mm1, mm2/m64","PUNPCKHBW mm2/m64, mm1","punpckhbw mm2/m64, mm1","0F 68 /r","V","V","MMX","","rw,r","",""
+"PUNPCKHBW xmm1, xmm2/m128","PUNPCKHBW xmm2/m128, xmm1","punpckhbw xmm2/m128, xmm1","66 0F 68 /r","V","V","SSE2","","rw,r","",""
+"PUNPCKHDQ mm1, mm2/m64","PUNPCKHLQ mm2/m64, mm1","punpckhdq mm2/m64, mm1","0F 6A /r","V","V","MMX","","rw,r","",""
+"PUNPCKHDQ xmm1, xmm2/m128","PUNPCKHLQ xmm2/m128, xmm1","punpckhdq xmm2/m128, xmm1","66 0F 6A /r","V","V","SSE2","","rw,r","",""
+"PUNPCKHQDQ xmm1, xmm2/m128","PUNPCKHQDQ xmm2/m128, xmm1","punpckhqdq xmm2/m128, xmm1","66 0F 6D /r","V","V","SSE2","","rw,r","",""
+"PUNPCKHWD mm1, mm2/m64","PUNPCKHWL mm2/m64, mm1","punpckhwd mm2/m64, mm1","0F 69 /r","V","V","MMX","","rw,r","",""
+"PUNPCKHWD xmm1, xmm2/m128","PUNPCKHWL xmm2/m128, xmm1","punpckhwd xmm2/m128, xmm1","66 0F 69 /r","V","V","SSE2","","rw,r","",""
+"PUNPCKLBW mm1, mm2/m32","PUNPCKLBW mm2/m32, mm1","punpcklbw mm2/m32, mm1","0F 60 /r","V","V","MMX","","rw,r","",""
+"PUNPCKLBW xmm1, xmm2/m128","PUNPCKLBW xmm2/m128, xmm1","punpcklbw xmm2/m128, xmm1","66 0F 60 /r","V","V","SSE2","","rw,r","",""
+"PUNPCKLDQ mm1, mm2/m32","PUNPCKLLQ mm2/m32, mm1","punpckldq mm2/m32, mm1","0F 62 /r","V","V","MMX","","rw,r","",""
+"PUNPCKLDQ xmm1, xmm2/m128","PUNPCKLLQ xmm2/m128, xmm1","punpckldq xmm2/m128, xmm1","66 0F 62 /r","V","V","SSE2","","rw,r","",""
+"PUNPCKLQDQ xmm1, xmm2/m128","PUNPCKLQDQ xmm2/m128, xmm1","punpcklqdq xmm2/m128, xmm1","66 0F 6C /r","V","V","SSE2","","rw,r","",""
+"PUNPCKLWD mm1, mm2/m32","PUNPCKLWL mm2/m32, mm1","punpcklwd mm2/m32, mm1","0F 61 /r","V","V","MMX","","rw,r","",""
+"PUNPCKLWD xmm1, xmm2/m128","PUNPCKLWL xmm2/m128, xmm1","punpcklwd xmm2/m128, xmm1","66 0F 61 /r","V","V","SSE2","","rw,r","",""
+"PUSH CS","PUSHW/PUSHL/PUSHQ CS","pushw/pushl/pushq CS","0E","V","I","","","r","Y",""
+"PUSH DS","PUSHW/PUSHL/PUSHQ DS","pushw/pushl/pushq DS","1E","V","I","","","r","Y",""
+"PUSH ES","PUSHW/PUSHL/PUSHQ ES","pushw/pushl/pushq ES","06","V","I","","","r","Y",""
+"PUSH FS","PUSHW/PUSHL/PUSHQ FS","pushw/pushl/pushq FS","0F A0","V","V","","","r","Y",""
+"PUSH GS","PUSHW/PUSHL/PUSHQ GS","pushw/pushl/pushq GS","0F A8","V","V","","","r","Y",""
+"PUSH SS","PUSHW/PUSHL/PUSHQ SS","pushw/pushl/pushq SS","16","V","I","","","r","Y",""
+"PUSH imm16","PUSHW imm16","pushw imm16","68 iw","V","V","","operand16","r","Y",""
+"PUSH imm32","-/PUSHL/PUSHQ imm32","-/pushl/pushq imm32","68 id","V","V","","operand32","r","Y",""
+"PUSH imm8","PUSHW/PUSHL/PUSHQ imm8","pushw/pushl/pushq imm8","6A ib","V","V","","","r","Y",""
+"PUSH r/m16","PUSHW r/m16","pushw r/m16","FF /6","V","V","","operand16","r","Y","16"
+"PUSH r/m32","PUSHL r/m32","pushl r/m32","FF /6","V","N.E.","","operand32","r","Y","32"
+"PUSH r/m64","PUSHQ r/m64","pushq r/m64","FF /6","N.E.","V","","operand32,operand64","r","Y","64"
+"PUSH r16op","PUSHW r16op","pushw r16op","50+rw","V","V","","operand16","r","Y","16"
+"PUSH r32op","PUSHL r32op","pushl r32op","50+rd","V","N.E.","","operand32","r","Y","32"
+"PUSH r64op","PUSHQ r64op","pushq r64op","50+rd","N.E.","V","","operand32,operand64","r","Y","64"
+"PXOR mm1, mm2/m64","PXOR mm2/m64, mm1","pxor mm2/m64, mm1","0F EF /r","V","V","MMX","","rw,r","",""
+"PXOR xmm1, xmm2/m128","PXOR xmm2/m128, xmm1","pxor xmm2/m128, xmm1","66 0F EF /r","V","V","SSE2","","rw,r","",""
+"RCL r/m16, 1","RCLW 1, r/m16","rclw 1, r/m16","D1 /2","V","V","","operand16","w,r","Y","16"
+"RCL r/m16, CL","RCLW CL, r/m16","rclw CL, r/m16","D3 /2","V","V","","operand16","w,r","Y","16"
+"RCL r/m16, imm8","RCLW imm8, r/m16","rclw imm8, r/m16","C1 /2 ib","V","V","","operand16","w,r","Y","16"
+"RCL r/m32, 1","RCLL 1, r/m32","rcll 1, r/m32","D1 /2","V","V","","operand32","w,r","Y","32"
+"RCL r/m32, CL","RCLL CL, r/m32","rcll CL, r/m32","D3 /2","V","V","","operand32","w,r","Y","32"
+"RCL r/m32, imm8","RCLL imm8, r/m32","rcll imm8, r/m32","C1 /2 ib","V","V","","operand32","w,r","Y","32"
+"RCL r/m64, 1","RCLQ 1, r/m64","rclq 1, r/m64","REX.W D1 /2","N.E.","V","","","w,r","Y","64"
+"RCL r/m64, CL","RCLQ CL, r/m64","rclq CL, r/m64","REX.W D3 /2","N.E.","V","","","w,r","Y","64"
+"RCL r/m64, imm8","RCLQ imm8, r/m64","rclq imm8, r/m64","REX.W C1 /2 ib","N.E.","V","","","w,r","Y","64"
+"RCL r/m8, 1","RCLB 1, r/m8","rclb 1, r/m8","D0 /2","V","V","","","w,r","Y","8"
+"RCL r/m8, 1","RCLB 1, r/m8","rclb 1, r/m8","REX D0 /2","N.E.","V","","pseudo64","w,r","Y","8"
+"RCL r/m8, CL","RCLB CL, r/m8","rclb CL, r/m8","D2 /2","V","V","","","w,r","Y","8"
+"RCL r/m8, CL","RCLB CL, r/m8","rclb CL, r/m8","REX D2 /2","N.E.","V","","pseudo64","w,r","Y","8"
+"RCL r/m8, imm8","RCLB imm8, r/m8","rclb imm8, r/m8","C0 /2 ib","V","V","","","w,r","Y","8"
+"RCL r/m8, imm8","RCLB imm8, r/m8","rclb imm8, r/m8","REX C0 /2 ib","N.E.","V","","pseudo64","w,r","Y","8"
+"RCPPS xmm1, xmm2/m128","RCPPS xmm2/m128, xmm1","rcpps xmm2/m128, xmm1","0F 53 /r","V","V","SSE","","w,r","",""
+"RCPSS xmm1, xmm2/m32","RCPSS xmm2/m32, xmm1","rcpss xmm2/m32, xmm1","F3 0F 53 /r","V","V","SSE","","w,r","",""
+"RCR r/m16, 1","RCRW 1, r/m16","rcrw 1, r/m16","D1 /3","V","V","","operand16","w,r","Y","16"
+"RCR r/m16, CL","RCRW CL, r/m16","rcrw CL, r/m16","D3 /3","V","V","","operand16","w,r","Y","16"
+"RCR r/m16, imm8","RCRW imm8, r/m16","rcrw imm8, r/m16","C1 /3 ib","V","V","","operand16","w,r","Y","16"
+"RCR r/m32, 1","RCRL 1, r/m32","rcrl 1, r/m32","D1 /3","V","V","","operand32","w,r","Y","32"
+"RCR r/m32, CL","RCRL CL, r/m32","rcrl CL, r/m32","D3 /3","V","V","","operand32","w,r","Y","32"
+"RCR r/m32, imm8","RCRL imm8, r/m32","rcrl imm8, r/m32","C1 /3 ib","V","V","","operand32","w,r","Y","32"
+"RCR r/m64, 1","RCRQ 1, r/m64","rcrq 1, r/m64","REX.W D1 /3","N.E.","V","","","w,r","Y","64"
+"RCR r/m64, CL","RCRQ CL, r/m64","rcrq CL, r/m64","REX.W D3 /3","N.E.","V","","","w,r","Y","64"
+"RCR r/m64, imm8","RCRQ imm8, r/m64","rcrq imm8, r/m64","REX.W C1 /3 ib","N.E.","V","","","w,r","Y","64"
+"RCR r/m8, 1","RCRB 1, r/m8","rcrb 1, r/m8","D0 /3","V","V","","","w,r","Y","8"
+"RCR r/m8, 1","RCRB 1, r/m8","rcrb 1, r/m8","REX D0 /3","N.E.","V","","pseudo64","w,r","Y","8"
+"RCR r/m8, CL","RCRB CL, r/m8","rcrb CL, r/m8","D2 /3","V","V","","","w,r","Y","8"
+"RCR r/m8, CL","RCRB CL, r/m8","rcrb CL, r/m8","REX D2 /3","N.E.","V","","pseudo64","w,r","Y","8"
+"RCR r/m8, imm8","RCRB imm8, r/m8","rcrb imm8, r/m8","C0 /3 ib","V","V","","","w,r","Y","8"
+"RCR r/m8, imm8","RCRB imm8, r/m8","rcrb imm8, r/m8","REX C0 /3 ib","N.E.","V","","pseudo64","w,r","Y","8"
+"RDFSBASE rmr32","RDFSBASE rmr32","rdfsbase rmr32","F3 0F AE /0","I","V","FSGSBASE","modrm_regonly,operand16,operand32","w","Y","32"
+"RDFSBASE rmr64","RDFSBASE rmr64","rdfsbase rmr64","F3 REX.W 0F AE /0","I","V","FSGSBASE","modrm_regonly","w","Y","64"
+"RDGSBASE rmr32","RDGSBASE rmr32","rdgsbase rmr32","F3 0F AE /1","I","V","FSGSBASE","modrm_regonly,operand16,operand32","w","Y","32"
+"RDGSBASE rmr64","RDGSBASE rmr64","rdgsbase rmr64","F3 REX.W 0F AE /1","I","V","FSGSBASE","modrm_regonly","w","Y","64"
+"RDMSR","RDMSR","rdmsr","0F 32","V","V","Pentium","","","",""
+"RDPKRU","RDPKRU","rdpkru","0F 01 EE","V","V","OSPKE","","","",""
+"RDPMC","RDPMC","rdpmc","0F 33","V","V","","","","",""
+"RDRAND rmr16","RDRAND rmr16","rdrand rmr16","0F C7 /6","V","V","RDRAND","modrm_regonly,operand16","w","Y",""
+"RDRAND rmr32","RDRAND rmr32","rdrand rmr32","0F C7 /6","V","V","RDRAND","modrm_regonly,operand32","w","Y","32"
+"RDRAND rmr64","RDRAND rmr64","rdrand rmr64","REX.W 0F C7 /6","I","V","RDRAND","modrm_regonly","w","Y","64"
+"RDSEED rmr16","RDSEED rmr16","rdseed rmr16","0F C7 /7","V","V","RDSEED","modrm_regonly,operand16","w","Y",""
+"RDSEED rmr32","RDSEED rmr32","rdseed rmr32","0F C7 /7","V","V","RDSEED","modrm_regonly,operand32","w","Y","32"
+"RDSEED rmr64","RDSEED rmr64","rdseed rmr64","REX.W 0F C7 /7","I","V","RDSEED","modrm_regonly","w","Y","64"
+"RDTSC","RDTSC","rdtsc","0F 31","V","V","","","","",""
+"RDTSCP","RDTSCP","rdtscp","0F 01 F9","V","V","","","","",""
+"RET imm16u","RETW/RETL/RETQ imm16u","retw/retl/retq imm16u","C2 iw","V","V","","","r","",""
+"RET_FAR imm16u","RETFW/RETFL/RETFQ imm16u","lretw/lretl/lretl imm16u","CA iw","V","V","","","r","",""
+"ROL r/m16, 1","ROLW 1, r/m16","rolw 1, r/m16","D1 /0","V","V","","operand16","w,r","Y","16"
+"ROL r/m16, CL","ROLW CL, r/m16","rolw CL, r/m16","D3 /0","V","V","","operand16","w,r","Y","16"
+"ROL r/m16, imm8","ROLW imm8, r/m16","rolw imm8, r/m16","C1 /0 ib","V","V","","operand16","w,r","Y","16"
+"ROL r/m32, 1","ROLL 1, r/m32","roll 1, r/m32","D1 /0","V","V","","operand32","w,r","Y","32"
+"ROL r/m32, CL","ROLL CL, r/m32","roll CL, r/m32","D3 /0","V","V","","operand32","w,r","Y","32"
+"ROL r/m32, imm8","ROLL imm8, r/m32","roll imm8, r/m32","C1 /0 ib","V","V","","operand32","w,r","Y","32"
+"ROL r/m64, 1","ROLQ 1, r/m64","rolq 1, r/m64","REX.W D1 /0","N.E.","V","","","w,r","Y","64"
+"ROL r/m64, CL","ROLQ CL, r/m64","rolq CL, r/m64","REX.W D3 /0","N.E.","V","","","w,r","Y","64"
+"ROL r/m64, imm8","ROLQ imm8, r/m64","rolq imm8, r/m64","REX.W C1 /0 ib","N.E.","V","","","w,r","Y","64"
+"ROL r/m8, 1","ROLB 1, r/m8","rolb 1, r/m8","D0 /0","V","V","","","w,r","Y","8"
+"ROL r/m8, 1","ROLB 1, r/m8","rolb 1, r/m8","REX D0 /0","N.E.","V","","pseudo64","w,r","Y","8"
+"ROL r/m8, CL","ROLB CL, r/m8","rolb CL, r/m8","D2 /0","V","V","","","w,r","Y","8"
+"ROL r/m8, CL","ROLB CL, r/m8","rolb CL, r/m8","REX D2 /0","N.E.","V","","pseudo64","w,r","Y","8"
+"ROL r/m8, imm8","ROLB imm8, r/m8","rolb imm8, r/m8","C0 /0 ib","V","V","","","w,r","Y","8"
+"ROL r/m8, imm8","ROLB imm8, r/m8","rolb imm8, r/m8","REX C0 /0 ib","N.E.","V","","pseudo64","w,r","Y","8"
+"ROR r/m16, 1","RORW 1, r/m16","rorw 1, r/m16","D1 /1","V","V","","operand16","w,r","Y","16"
+"ROR r/m16, CL","RORW CL, r/m16","rorw CL, r/m16","D3 /1","V","V","","operand16","w,r","Y","16"
+"ROR r/m16, imm8","RORW imm8, r/m16","rorw imm8, r/m16","C1 /1 ib","V","V","","operand16","w,r","Y","16"
+"ROR r/m32, 1","RORL 1, r/m32","rorl 1, r/m32","D1 /1","V","V","","operand32","w,r","Y","32"
+"ROR r/m32, CL","RORL CL, r/m32","rorl CL, r/m32","D3 /1","V","V","","operand32","w,r","Y","32"
+"ROR r/m32, imm8","RORL imm8, r/m32","rorl imm8, r/m32","C1 /1 ib","V","V","","operand32","w,r","Y","32"
+"ROR r/m64, 1","RORQ 1, r/m64","rorq 1, r/m64","REX.W D1 /1","N.E.","V","","","w,r","Y","64"
+"ROR r/m64, CL","RORQ CL, r/m64","rorq CL, r/m64","REX.W D3 /1","N.E.","V","","","w,r","Y","64"
+"ROR r/m64, imm8","RORQ imm8, r/m64","rorq imm8, r/m64","REX.W C1 /1 ib","N.E.","V","","","w,r","Y","64"
+"ROR r/m8, 1","RORB 1, r/m8","rorb 1, r/m8","D0 /1","V","V","","","w,r","Y","8"
+"ROR r/m8, 1","RORB 1, r/m8","rorb 1, r/m8","REX D0 /1","N.E.","V","","pseudo64","w,r","Y","8"
+"ROR r/m8, CL","RORB CL, r/m8","rorb CL, r/m8","D2 /1","V","V","","","w,r","Y","8"
+"ROR r/m8, CL","RORB CL, r/m8","rorb CL, r/m8","REX D2 /1","N.E.","V","","pseudo64","w,r","Y","8"
+"ROR r/m8, imm8","RORB imm8, r/m8","rorb imm8, r/m8","C0 /1 ib","V","V","","","w,r","Y","8"
+"ROR r/m8, imm8","RORB imm8, r/m8","rorb imm8, r/m8","REX C0 /1 ib","N.E.","V","","pseudo64","w,r","Y","8"
+"RORX r32, r/m32, imm8","RORXL imm8, r/m32, r32","rorxl imm8, r/m32, r32","VEX.LZ.F2.0F3A.W0 F0 /r ib","V","V","BMI2","","w,r,r","Y","32"
+"RORX r64, r/m64, imm8","RORXQ imm8, r/m64, r64","rorxq imm8, r/m64, r64","VEX.LZ.F2.0F3A.W1 F0 /r ib","N.E.","V","BMI2","","w,r,r","Y","64"
+"ROUNDPD xmm1, xmm2/m128, imm8","ROUNDPD imm8, xmm2/m128, xmm1","roundpd imm8, xmm2/m128, xmm1","66 0F 3A 09 /r ib","V","V","SSE4_1","","w,r,r","",""
+"ROUNDPS xmm1, xmm2/m128, imm8","ROUNDPS imm8, xmm2/m128, xmm1","roundps imm8, xmm2/m128, xmm1","66 0F 3A 08 /r ib","V","V","SSE4_1","","w,r,r","",""
+"ROUNDSD xmm1, xmm2/m64, imm8","ROUNDSD imm8, xmm2/m64, xmm1","roundsd imm8, xmm2/m64, xmm1","66 0F 3A 0B /r ib","V","V","SSE4_1","","w,r,r","",""
+"ROUNDSS xmm1, xmm2/m32, imm8","ROUNDSS imm8, xmm2/m32, xmm1","roundss imm8, xmm2/m32, xmm1","66 0F 3A 0A /r ib","V","V","SSE4_1","","w,r,r","",""
+"RSM","RSM","rsm","0F AA","V","V","","","","",""
+"RSQRTPS xmm1, xmm2/m128","RSQRTPS xmm2/m128, xmm1","rsqrtps xmm2/m128, xmm1","0F 52 /r","V","V","SSE","","w,r","",""
+"RSQRTSS xmm1, xmm2/m32","RSQRTSS xmm2/m32, xmm1","rsqrtss xmm2/m32, xmm1","F3 0F 52 /r","V","V","SSE","","w,r","",""
+"SAL r/m16, 1","SALW 1, r/m16","salw 1, r/m16","D1 /4","V","V","","operand16,pseudo","rw,r","Y","16"
+"SAL r/m16, CL","SALW CL, r/m16","salw CL, r/m16","D3 /4","V","V","","operand16,pseudo","rw,r","Y","16"
+"SAL r/m16, imm8","SALW imm8, r/m16","salw imm8, r/m16","C1 /4 ib","V","V","","operand16,pseudo","rw,r","Y","16"
+"SAL r/m32, 1","SALL 1, r/m32","sall 1, r/m32","D1 /4","V","V","","operand32,pseudo","rw,r","Y","32"
+"SAL r/m32, CL","SALL CL, r/m32","sall CL, r/m32","D3 /4","V","V","","operand32,pseudo","rw,r","Y","32"
+"SAL r/m32, imm8","SALL imm8, r/m32","sall imm8, r/m32","C1 /4 ib","V","V","","operand32,pseudo","rw,r","Y","32"
+"SAL r/m64, 1","SALQ 1, r/m64","salq 1, r/m64","REX.W D1 /4","N.E.","V","","pseudo","rw,r","Y","64"
+"SAL r/m64, CL","SALQ CL, r/m64","salq CL, r/m64","REX.W D3 /4","N.E.","V","","pseudo","rw,r","Y","64"
+"SAL r/m64, imm8","SALQ imm8, r/m64","salq imm8, r/m64","REX.W C1 /4 ib","N.E.","V","","pseudo","rw,r","Y","64"
+"SAL r/m8, 1","SALB 1, r/m8","salb 1, r/m8","D0 /4","V","V","","pseudo","rw,r","Y","8"
+"SAL r/m8, 1","SALB 1, r/m8","salb 1, r/m8","REX D0 /4","N.E.","V","","pseudo","rw,r","Y","8"
+"SAL r/m8, CL","SALB CL, r/m8","salb CL, r/m8","D2 /4","V","V","","pseudo","rw,r","Y","8"
+"SAL r/m8, CL","SALB CL, r/m8","salb CL, r/m8","REX D2 /4","N.E.","V","","pseudo","rw,r","Y","8"
+"SAL r/m8, imm8","SALB imm8, r/m8","salb imm8, r/m8","C0 /4 ib","V","V","","pseudo","rw,r","Y","8"
+"SAL r/m8, imm8","SALB imm8, r/m8","salb imm8, r/m8","REX C0 /4 ib","N.E.","V","","pseudo","rw,r","Y","8"
+"SAR r/m16, 1","SARW 1, r/m16","sarw 1, r/m16","D1 /7","V","V","","operand16","rw,r","Y","16"
+"SAR r/m16, CL","SARW CL, r/m16","sarw CL, r/m16","D3 /7","V","V","","operand16","rw,r","Y","16"
+"SAR r/m16, imm8","SARW imm8, r/m16","sarw imm8, r/m16","C1 /7 ib","V","V","","operand16","rw,r","Y","16"
+"SAR r/m32, 1","SARL 1, r/m32","sarl 1, r/m32","D1 /7","V","V","","operand32","rw,r","Y","32"
+"SAR r/m32, CL","SARL CL, r/m32","sarl CL, r/m32","D3 /7","V","V","","operand32","rw,r","Y","32"
+"SAR r/m32, imm8","SARL imm8, r/m32","sarl imm8, r/m32","C1 /7 ib","V","V","","operand32","rw,r","Y","32"
+"SAR r/m64, 1","SARQ 1, r/m64","sarq 1, r/m64","REX.W D1 /7","N.E.","V","","","rw,r","Y","64"
+"SAR r/m64, CL","SARQ CL, r/m64","sarq CL, r/m64","REX.W D3 /7","N.E.","V","","","rw,r","Y","64"
+"SAR r/m64, imm8","SARQ imm8, r/m64","sarq imm8, r/m64","REX.W C1 /7 ib","N.E.","V","","","rw,r","Y","64"
+"SAR r/m8, 1","SARB 1, r/m8","sarb 1, r/m8","D0 /7","V","V","","","rw,r","Y","8"
+"SAR r/m8, 1","SARB 1, r/m8","sarb 1, r/m8","REX D0 /7","N.E.","V","","pseudo64","rw,r","Y","8"
+"SAR r/m8, CL","SARB CL, r/m8","sarb CL, r/m8","D2 /7","V","V","","","rw,r","Y","8"
+"SAR r/m8, CL","SARB CL, r/m8","sarb CL, r/m8","REX D2 /7","N.E.","V","","pseudo64","rw,r","Y","8"
+"SAR r/m8, imm8","SARB imm8, r/m8","sarb imm8, r/m8","C0 /7 ib","V","V","","","rw,r","Y","8"
+"SAR r/m8, imm8","SARB imm8, r/m8","sarb imm8, r/m8","REX C0 /7 ib","N.E.","V","","pseudo64","rw,r","Y","8"
+"SARX r32, r/m32, r32V","SARXL r32V, r/m32, r32","sarxl r32V, r/m32, r32","VEX.NDS.LZ.F3.0F38.W0 F7 /r","V","V","BMI2","","w,r,r","Y","32"
+"SARX r64, r/m64, r64V","SARXQ r64V, r/m64, r64","sarxq r64V, r/m64, r64","VEX.NDS.LZ.F3.0F38.W1 F7 /r","N.E.","V","BMI2","","w,r,r","Y","64"
+"SBB AL, imm8","SBBB imm8, AL","sbbb imm8, AL","1C ib","V","V","","","rw,r","Y","8"
+"SBB AX, imm16","SBBW imm16, AX","sbbw imm16, AX","1D iw","V","V","","operand16","rw,r","Y","16"
+"SBB EAX, imm32","SBBL imm32, EAX","sbbl imm32, EAX","1D id","V","V","","operand32","rw,r","Y","32"
+"SBB RAX, imm32","SBBQ imm32, RAX","sbbq imm32, RAX","REX.W 1D id","N.E.","V","","","rw,r","Y","64"
+"SBB r/m16, imm16","SBBW imm16, r/m16","sbbw imm16, r/m16","81 /3 iw","V","V","","operand16","w,r","Y","16"
+"SBB r/m16, imm8","SBBW imm8, r/m16","sbbw imm8, r/m16","83 /3 ib","V","V","","operand16","w,r","Y","16"
+"SBB r/m16, r16","SBBW r16, r/m16","sbbw r16, r/m16","19 /r","V","V","","operand16","w,r","Y","16"
+"SBB r/m32, imm32","SBBL imm32, r/m32","sbbl imm32, r/m32","81 /3 id","V","V","","operand32","w,r","Y","32"
+"SBB r/m32, imm8","SBBL imm8, r/m32","sbbl imm8, r/m32","83 /3 ib","V","V","","operand32","w,r","Y","32"
+"SBB r/m32, r32","SBBL r32, r/m32","sbbl r32, r/m32","19 /r","V","V","","operand32","w,r","Y","32"
+"SBB r/m64, imm32","SBBQ imm32, r/m64","sbbq imm32, r/m64","REX.W 81 /3 id","N.E.","V","","","w,r","Y","64"
+"SBB r/m64, imm8","SBBQ imm8, r/m64","sbbq imm8, r/m64","REX.W 83 /3 ib","N.E.","V","","","w,r","Y","64"
+"SBB r/m64, r64","SBBQ r64, r/m64","sbbq r64, r/m64","REX.W 19 /r","N.E.","V","","","w,r","Y","64"
+"SBB r/m8, imm8","SBBB imm8, r/m8","sbbb imm8, r/m8","80 /3 ib","V","V","","","w,r","Y","8"
+"SBB r/m8, imm8","SBBB imm8, r/m8","sbbb imm8, r/m8","REX 80 /3 ib","N.E.","V","","pseudo64","w,r","Y","8"
+"SBB r/m8, r8","SBBB r8, r/m8","sbbb r8, r/m8","18 /r","V","V","","","w,r","Y","8"
+"SBB r/m8, r8","SBBB r8, r/m8","sbbb r8, r/m8","REX 18 /r","N.E.","V","","pseudo64","w,r","Y","8"
+"SBB r16, r/m16","SBBW r/m16, r16","sbbw r/m16, r16","1B /r","V","V","","operand16","w,r","Y","16"
+"SBB r32, r/m32","SBBL r/m32, r32","sbbl r/m32, r32","1B /r","V","V","","operand32","w,r","Y","32"
+"SBB r64, r/m64","SBBQ r/m64, r64","sbbq r/m64, r64","REX.W 1B /r","N.E.","V","","","w,r","Y","64"
+"SBB r8, r/m8","SBBB r/m8, r8","sbbb r/m8, r8","1A /r","V","V","","","w,r","Y","8"
+"SBB r8, r/m8","SBBB r/m8, r8","sbbb r/m8, r8","REX 1A /r","N.E.","V","","pseudo64","w,r","Y","8"
+"SCASQ","SCASQ","scasq","REX.W AF","N.E.","V","","","","",""
+"SETA r/m8","SETHI r/m8","seta r/m8","0F 97 /r","V","V","","","r","",""
+"SETA r/m8","SETHI r/m8","seta r/m8","REX 0F 97 /r","N.E.","V","","pseudo64","r","",""
+"SETAE r/m8","SETCC r/m8","setae r/m8","0F 93 /r","V","V","","","r","",""
+"SETAE r/m8","SETCC r/m8","setae r/m8","REX 0F 93 /r","N.E.","V","","pseudo64","r","",""
+"SETB r/m8","SETCS r/m8","setb r/m8","0F 92 /r","V","V","","","r","",""
+"SETB r/m8","SETCS r/m8","setb r/m8","REX 0F 92 /r","N.E.","V","","pseudo64","r","",""
+"SETBE r/m8","SETLS r/m8","setbe r/m8","0F 96 /r","V","V","","","r","",""
+"SETBE r/m8","SETLS r/m8","setbe r/m8","REX 0F 96 /r","N.E.","V","","pseudo64","r","",""
+"SETC r/m8","SETCS r/m8","setc r/m8","0F 92 /r","V","V","","pseudo","r","",""
+"SETC r/m8","SETCS r/m8","setc r/m8","REX 0F 92 /r","N.E.","V","","pseudo","r","",""
+"SETE r/m8","SETEQ r/m8","sete r/m8","0F 94 /r","V","V","","","r","",""
+"SETE r/m8","SETEQ r/m8","sete r/m8","REX 0F 94 /r","N.E.","V","","pseudo64","r","",""
+"SETG r/m8","SETGT r/m8","setg r/m8","0F 9F /r","V","V","","","r","",""
+"SETG r/m8","SETGT r/m8","setg r/m8","REX 0F 9F /r","N.E.","V","","pseudo64","r","",""
+"SETGE r/m8","SETGE r/m8","setge r/m8","0F 9D /r","V","V","","","r","",""
+"SETGE r/m8","SETGE r/m8","setge r/m8","REX 0F 9D /r","N.E.","V","","pseudo64","r","",""
+"SETL r/m8","SETLT r/m8","setl r/m8","0F 9C /r","V","V","","","r","",""
+"SETL r/m8","SETLT r/m8","setl r/m8","REX 0F 9C /r","N.E.","V","","pseudo64","r","",""
+"SETLE r/m8","SETLE r/m8","setle r/m8","0F 9E /r","V","V","","","r","",""
+"SETLE r/m8","SETLE r/m8","setle r/m8","REX 0F 9E /r","N.E.","V","","pseudo64","r","",""
+"SETNA r/m8","SETLS r/m8","setna r/m8","0F 96 /r","V","V","","pseudo","r","",""
+"SETNA r/m8","SETLS r/m8","setna r/m8","REX 0F 96 /r","N.E.","V","","pseudo","r","",""
+"SETNAE r/m8","SETCS r/m8","setnae r/m8","0F 92 /r","V","V","","pseudo","r","",""
+"SETNAE r/m8","SETCS r/m8","setnae r/m8","REX 0F 92 /r","N.E.","V","","pseudo","r","",""
+"SETNB r/m8","SETCC r/m8","setnb r/m8","0F 93 /r","V","V","","pseudo","r","",""
+"SETNB r/m8","SETCC r/m8","setnb r/m8","REX 0F 93 /r","N.E.","V","","pseudo","r","",""
+"SETNBE r/m8","SETHI r/m8","setnbe r/m8","0F 97 /r","V","V","","pseudo","r","",""
+"SETNBE r/m8","SETHI r/m8","setnbe r/m8","REX 0F 97 /r","N.E.","V","","pseudo","r","",""
+"SETNC r/m8","SETCC r/m8","setnc r/m8","0F 93 /r","V","V","","pseudo","r","",""
+"SETNC r/m8","SETCC r/m8","setnc r/m8","REX 0F 93 /r","N.E.","V","","pseudo","r","",""
+"SETNE r/m8","SETNE r/m8","setne r/m8","0F 95 /r","V","V","","","r","",""
+"SETNE r/m8","SETNE r/m8","setne r/m8","REX 0F 95 /r","N.E.","V","","pseudo64","r","",""
+"SETNG r/m8","SETLE r/m8","setng r/m8","0F 9E /r","V","V","","pseudo","r","",""
+"SETNG r/m8","SETLE r/m8","setng r/m8","REX 0F 9E /r","N.E.","V","","pseudo","r","",""
+"SETNGE r/m8","SETLT r/m8","setnge r/m8","0F 9C /r","V","V","","pseudo","r","",""
+"SETNGE r/m8","SETLT r/m8","setnge r/m8","REX 0F 9C /r","N.E.","V","","pseudo","r","",""
+"SETNL r/m8","SETGE r/m8","setnl r/m8","0F 9D /r","V","V","","pseudo","r","",""
+"SETNL r/m8","SETGE r/m8","setnl r/m8","REX 0F 9D /r","N.E.","V","","pseudo","r","",""
+"SETNLE r/m8","SETGT r/m8","setnle r/m8","0F 9F /r","V","V","","pseudo","r","",""
+"SETNLE r/m8","SETGT r/m8","setnle r/m8","REX 0F 9F /r","N.E.","V","","pseudo","r","",""
+"SETNO r/m8","SETOC r/m8","setno r/m8","0F 91 /r","V","V","","","r","",""
+"SETNO r/m8","SETOC r/m8","setno r/m8","REX 0F 91 /r","N.E.","V","","pseudo64","r","",""
+"SETNP r/m8","SETPC r/m8","setnp r/m8","0F 9B /r","V","V","","","r","",""
+"SETNP r/m8","SETPC r/m8","setnp r/m8","REX 0F 9B /r","N.E.","V","","pseudo64","r","",""
+"SETNS r/m8","SETPL r/m8","setns r/m8","0F 99 /r","V","V","","","r","",""
+"SETNS r/m8","SETPL r/m8","setns r/m8","REX 0F 99 /r","N.E.","V","","pseudo64","r","",""
+"SETNZ r/m8","SETNE r/m8","setnz r/m8","0F 95 /r","V","V","","pseudo","r","",""
+"SETNZ r/m8","SETNE r/m8","setnz r/m8","REX 0F 95 /r","N.E.","V","","pseudo","r","",""
+"SETO r/m8","SETOS r/m8","seto r/m8","0F 90 /r","V","V","","","r","",""
+"SETO r/m8","SETOS r/m8","seto r/m8","REX 0F 90 /r","N.E.","V","","pseudo64","r","",""
+"SETP r/m8","SETPS r/m8","setp r/m8","0F 9A /r","V","V","","","r","",""
+"SETP r/m8","SETPS r/m8","setp r/m8","REX 0F 9A /r","N.E.","V","","pseudo64","r","",""
+"SETPE r/m8","SETPS r/m8","setpe r/m8","0F 9A /r","V","V","","pseudo","r","",""
+"SETPE r/m8","SETPS r/m8","setpe r/m8","REX 0F 9A /r","N.E.","V","","pseudo","r","",""
+"SETPO r/m8","SETPC r/m8","setpo r/m8","0F 9B /r","V","V","","pseudo","r","",""
+"SETPO r/m8","SETPC r/m8","setpo r/m8","REX 0F 9B /r","N.E.","V","","pseudo","r","",""
+"SETS r/m8","SETMI r/m8","sets r/m8","0F 98 /r","V","V","","","r","",""
+"SETS r/m8","SETMI r/m8","sets r/m8","REX 0F 98 /r","N.E.","V","","pseudo64","r","",""
+"SETZ r/m8","SETEQ r/m8","setz r/m8","0F 94 /r","V","V","","pseudo","r","",""
+"SETZ r/m8","SETEQ r/m8","setz r/m8","REX 0F 94 /r","N.E.","V","","pseudo","r","",""
+"SFENCE","SFENCE","sfence","0F AE F8","V","V","","","","",""
+"SGDT m","SGDTW/SGDTL/SGDT m","sgdtw/sgdtl/sgdt m","0F 01 /0","V","V","","","w","",""
+"SHL r/m16, 1","SHLW 1, r/m16","shlw 1, r/m16","D1 /4","V","V","","operand16","rw,r","Y","16"
+"SHL r/m16, CL","SHLW CL, r/m16","shlw CL, r/m16","D3 /4","V","V","","operand16","rw,r","Y","16"
+"SHL r/m16, imm8","SHLW imm8, r/m16","shlw imm8, r/m16","C1 /4 ib","V","V","","operand16","rw,r","Y","16"
+"SHL r/m32, 1","SHLL 1, r/m32","shll 1, r/m32","D1 /4","V","V","","operand32","rw,r","Y","32"
+"SHL r/m32, CL","SHLL CL, r/m32","shll CL, r/m32","D3 /4","V","V","","operand32","rw,r","Y","32"
+"SHL r/m32, imm8","SHLL imm8, r/m32","shll imm8, r/m32","C1 /4 ib","V","V","","operand32","rw,r","Y","32"
+"SHL r/m64, 1","SHLQ 1, r/m64","shlq 1, r/m64","REX.W D1 /4","N.E.","V","","","rw,r","Y","64"
+"SHL r/m64, CL","SHLQ CL, r/m64","shlq CL, r/m64","REX.W D3 /4","N.E.","V","","","rw,r","Y","64"
+"SHL r/m64, imm8","SHLQ imm8, r/m64","shlq imm8, r/m64","REX.W C1 /4 ib","N.E.","V","","","rw,r","Y","64"
+"SHL r/m8, 1","SHLB 1, r/m8","shlb 1, r/m8","D0 /4","V","V","","","rw,r","Y","8"
+"SHL r/m8, 1","SHLB 1, r/m8","shlb 1, r/m8","REX D0 /4","N.E.","V","","pseudo64","rw,r","Y","8"
+"SHL r/m8, CL","SHLB CL, r/m8","shlb CL, r/m8","D2 /4","V","V","","","rw,r","Y","8"
+"SHL r/m8, CL","SHLB CL, r/m8","shlb CL, r/m8","REX D2 /4","N.E.","V","","pseudo64","rw,r","Y","8"
+"SHL r/m8, imm8","SHLB imm8, r/m8","shlb imm8, r/m8","C0 /4 ib","V","V","","","rw,r","Y","8"
+"SHL r/m8, imm8","SHLB imm8, r/m8","shlb imm8, r/m8","REX C0 /4 ib","N.E.","V","","pseudo64","rw,r","Y","8"
+"SHLD r/m16, r16, CL","SHLW CL, r16, r/m16","shldw CL, r16, r/m16","0F A5 /r","V","V","","operand16","w,r,r","Y","16"
+"SHLD r/m16, r16, imm8","SHLW imm8, r16, r/m16","shldw imm8, r16, r/m16","0F A4 /r ib","V","V","","operand16","w,r,r","Y","16"
+"SHLD r/m32, r32, CL","SHLL CL, r32, r/m32","shldl CL, r32, r/m32","0F A5 /r","V","V","","operand32","w,r,r","Y","32"
+"SHLD r/m32, r32, imm8","SHLL imm8, r32, r/m32","shldl imm8, r32, r/m32","0F A4 /r ib","V","V","","operand32","w,r,r","Y","32"
+"SHLD r/m64, r64, CL","SHLQ CL, r64, r/m64","shldq CL, r64, r/m64","REX.W 0F A5 /r","N.E.","V","","","w,r,r","Y","64"
+"SHLD r/m64, r64, imm8","SHLQ imm8, r64, r/m64","shldq imm8, r64, r/m64","REX.W 0F A4 /r ib","N.E.","V","","","w,r,r","Y","64"
+"SHLX r32, r/m32, r32V","SHLXL r32V, r/m32, r32","shlxl r32V, r/m32, r32","VEX.NDS.LZ.66.0F38.W0 F7 /r","V","V","BMI2","","w,r,r","Y","32"
+"SHLX r64, r/m64, r64V","SHLXQ r64V, r/m64, r64","shlxq r64V, r/m64, r64","VEX.NDS.LZ.66.0F38.W1 F7 /r","N.E.","V","BMI2","","w,r,r","Y","64"
+"SHR r/m16, 1","SHRW 1, r/m16","shrw 1, r/m16","D1 /5","V","V","","operand16","rw,r","Y","16"
+"SHR r/m16, CL","SHRW CL, r/m16","shrw CL, r/m16","D3 /5","V","V","","operand16","rw,r","Y","16"
+"SHR r/m16, imm8","SHRW imm8, r/m16","shrw imm8, r/m16","C1 /5 ib","V","V","","operand16","rw,r","Y","16"
+"SHR r/m32, 1","SHRL 1, r/m32","shrl 1, r/m32","D1 /5","V","V","","operand32","rw,r","Y","32"
+"SHR r/m32, CL","SHRL CL, r/m32","shrl CL, r/m32","D3 /5","V","V","","operand32","rw,r","Y","32"
+"SHR r/m32, imm8","SHRL imm8, r/m32","shrl imm8, r/m32","C1 /5 ib","V","V","","operand32","rw,r","Y","32"
+"SHR r/m64, 1","SHRQ 1, r/m64","shrq 1, r/m64","REX.W D1 /5","N.E.","V","","","rw,r","Y","64"
+"SHR r/m64, CL","SHRQ CL, r/m64","shrq CL, r/m64","REX.W D3 /5","N.E.","V","","","rw,r","Y","64"
+"SHR r/m64, imm8","SHRQ imm8, r/m64","shrq imm8, r/m64","REX.W C1 /5 ib","N.E.","V","","","rw,r","Y","64"
+"SHR r/m8, 1","SHRB 1, r/m8","shrb 1, r/m8","D0 /5","V","V","","","rw,r","Y","8"
+"SHR r/m8, 1","SHRB 1, r/m8","shrb 1, r/m8","REX D0 /5","N.E.","V","","pseudo64","rw,r","Y","8"
+"SHR r/m8, CL","SHRB CL, r/m8","shrb CL, r/m8","D2 /5","V","V","","","rw,r","Y","8"
+"SHR r/m8, CL","SHRB CL, r/m8","shrb CL, r/m8","REX D2 /5","N.E.","V","","pseudo64","rw,r","Y","8"
+"SHR r/m8, imm8","SHRB imm8, r/m8","shrb imm8, r/m8","C0 /5 ib","V","V","","","rw,r","Y","8"
+"SHR r/m8, imm8","SHRB imm8, r/m8","shrb imm8, r/m8","REX C0 /5 ib","N.E.","V","","pseudo64","rw,r","Y","8"
+"SHRD r/m16, r16, CL","SHRW CL, r16, r/m16","shrdw CL, r16, r/m16","0F AD /r","V","V","","operand16","w,r,r","Y","16"
+"SHRD r/m16, r16, imm8","SHRW imm8, r16, r/m16","shrdw imm8, r16, r/m16","0F AC /r ib","V","V","","operand16","w,r,r","Y","16"
+"SHRD r/m32, r32, CL","SHRL CL, r32, r/m32","shrdl CL, r32, r/m32","0F AD /r","V","V","","operand32","w,r,r","Y","32"
+"SHRD r/m32, r32, imm8","SHRL imm8, r32, r/m32","shrdl imm8, r32, r/m32","0F AC /r ib","V","V","","operand32","w,r,r","Y","32"
+"SHRD r/m64, r64, CL","SHRQ CL, r64, r/m64","shrdq CL, r64, r/m64","REX.W 0F AD /r","N.E.","V","","","w,r,r","Y","64"
+"SHRD r/m64, r64, imm8","SHRQ imm8, r64, r/m64","shrdq imm8, r64, r/m64","REX.W 0F AC /r ib","N.E.","V","","","w,r,r","Y","64"
+"SHRX r32, r/m32, r32V","SHRXL r32V, r/m32, r32","shrxl r32V, r/m32, r32","VEX.NDS.LZ.F2.0F38.W0 F7 /r","V","V","BMI2","","w,r,r","Y","32"
+"SHRX r64, r/m64, r64V","SHRXQ r64V, r/m64, r64","shrxq r64V, r/m64, r64","VEX.NDS.LZ.F2.0F38.W1 F7 /r","N.E.","V","BMI2","","w,r,r","Y","64"
+"SHUFPD xmm1, xmm2/m128, imm8","SHUFPD imm8, xmm2/m128, xmm1","shufpd imm8, xmm2/m128, xmm1","66 0F C6 /r ib","V","V","SSE2","","rw,r,r","",""
+"SHUFPS xmm1, xmm2/m128, imm8","SHUFPS imm8, xmm2/m128, xmm1","shufps imm8, xmm2/m128, xmm1","0F C6 /r ib","V","V","SSE","","rw,r,r","",""
+"SIDT m","SIDTW/SIDTL/SIDT m","sidtw/sidtl/sidt m","0F 01 /1","V","V","","","w","",""
+"SLDT r/m16","SLDTW r/m16","sldtw r/m16","0F 00 /0","V","V","","operand16","w","Y","16"
+"SLDT r32/m16","SLDT{L/W} r32/m16","sldt{l/w} r32/m16","0F 00 /0","V","V","","operand32","w","Y",""
+"SLDT r64/m16","SLDT{Q/W} r64/m16","sldt{q/w} r64/m16","REX.W 0F 00 /0","N.E.","V","","","w","Y",""
+"SMSW r/m16","SMSWW r/m16","smsww r/m16","0F 01 /4","V","V","","operand16","w","Y","16"
+"SMSW r32/m16","SMSW{L/W} r32/m16","smsw{l/w} r32/m16","0F 01 /4","V","V","","operand32","w","Y",""
+"SMSW r64/m16","SMSW{Q/W} r64/m16","smsw{q/w} r64/m16","REX.W 0F 01 /4","N.E.","V","","","w","Y",""
+"SQRTPD xmm1, xmm2/m128","SQRTPD xmm2/m128, xmm1","sqrtpd xmm2/m128, xmm1","66 0F 51 /r","V","V","SSE2","","w,r","",""
+"SQRTPS xmm1, xmm2/m128","SQRTPS xmm2/m128, xmm1","sqrtps xmm2/m128, xmm1","0F 51 /r","V","V","SSE","","w,r","",""
+"SQRTSD xmm1, xmm2/m64","SQRTSD xmm2/m64, xmm1","sqrtsd xmm2/m64, xmm1","F2 0F 51 /r","V","V","SSE2","","w,r","",""
+"SQRTSS xmm1, xmm2/m32","SQRTSS xmm2/m32, xmm1","sqrtss xmm2/m32, xmm1","F3 0F 51 /r","V","V","SSE","","w,r","",""
+"STAC","STAC","stac","0F 01 CB","V","V","","","","",""
+"STMXCSR m32","STMXCSR m32","stmxcsr m32","0F AE /3","V","V","SSE","modrm_memonly","w","",""
+"STOSQ","STOSQ","stosq","REX.W AB","N.E.","V","","","","",""
+"STR r/m16","STRW r/m16","strw r/m16","0F 00 /1","V","V","","operand16","w","Y","16"
+"STR r32/m16","STR{L/W} r32/m16","str{l/w} r32/m16","0F 00 /1","V","V","","operand32","w","Y",""
+"STR r64/m16","STR{Q/W} r64/m16","str{q/w} r64/m16","REX.W 0F 00 /1","N.E.","V","","","w","Y",""
+"SUB AL, imm8","SUBB imm8, AL","subb imm8, AL","2C ib","V","V","","","rw,r","Y","8"
+"SUB AX, imm16","SUBW imm16, AX","subw imm16, AX","2D iw","V","V","","operand16","rw,r","Y","16"
+"SUB EAX, imm32","SUBL imm32, EAX","subl imm32, EAX","2D id","V","V","","operand32","rw,r","Y","32"
+"SUB RAX, imm32","SUBQ imm32, RAX","subq imm32, RAX","REX.W 2D id","N.E.","V","","","rw,r","Y","64"
+"SUB r/m16, imm16","SUBW imm16, r/m16","subw imm16, r/m16","81 /5 iw","V","V","","operand16","rw,r","Y","16"
+"SUB r/m16, imm8","SUBW imm8, r/m16","subw imm8, r/m16","83 /5 ib","V","V","","operand16","rw,r","Y","16"
+"SUB r/m16, r16","SUBW r16, r/m16","subw r16, r/m16","29 /r","V","V","","operand16","rw,r","Y","16"
+"SUB r/m32, imm32","SUBL imm32, r/m32","subl imm32, r/m32","81 /5 id","V","V","","operand32","rw,r","Y","32"
+"SUB r/m32, imm8","SUBL imm8, r/m32","subl imm8, r/m32","83 /5 ib","V","V","","operand32","rw,r","Y","32"
+"SUB r/m32, r32","SUBL r32, r/m32","subl r32, r/m32","29 /r","V","V","","operand32","rw,r","Y","32"
+"SUB r/m64, imm32","SUBQ imm32, r/m64","subq imm32, r/m64","REX.W 81 /5 id","N.E.","V","","","rw,r","Y","64"
+"SUB r/m64, imm8","SUBQ imm8, r/m64","subq imm8, r/m64","REX.W 83 /5 ib","N.E.","V","","","rw,r","Y","64"
+"SUB r/m64, r64","SUBQ r64, r/m64","subq r64, r/m64","REX.W 29 /r","N.E.","V","","","rw,r","Y","64"
+"SUB r/m8, imm8","SUBB imm8, r/m8","subb imm8, r/m8","80 /5 ib","V","V","","","rw,r","Y","8"
+"SUB r/m8, imm8","SUBB imm8, r/m8","subb imm8, r/m8","REX 80 /5 ib","N.E.","V","","pseudo64","rw,r","Y","8"
+"SUB r/m8, r8","SUBB r8, r/m8","subb r8, r/m8","28 /r","V","V","","","rw,r","Y","8"
+"SUB r/m8, r8","SUBB r8, r/m8","subb r8, r/m8","REX 28 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"SUB r16, r/m16","SUBW r/m16, r16","subw r/m16, r16","2B /r","V","V","","operand16","rw,r","Y","16"
+"SUB r32, r/m32","SUBL r/m32, r32","subl r/m32, r32","2B /r","V","V","","operand32","rw,r","Y","32"
+"SUB r64, r/m64","SUBQ r/m64, r64","subq r/m64, r64","REX.W 2B /r","N.E.","V","","","rw,r","Y","64"
+"SUB r8, r/m8","SUBB r/m8, r8","subb r/m8, r8","2A /r","V","V","","","rw,r","Y","8"
+"SUB r8, r/m8","SUBB r/m8, r8","subb r/m8, r8","REX 2A /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"SUBPD xmm1, xmm2/m128","SUBPD xmm2/m128, xmm1","subpd xmm2/m128, xmm1","66 0F 5C /r","V","V","SSE2","","rw,r","",""
+"SUBPS xmm1, xmm2/m128","SUBPS xmm2/m128, xmm1","subps xmm2/m128, xmm1","0F 5C /r","V","V","SSE","","rw,r","",""
+"SUBSD xmm1, xmm2/m64","SUBSD xmm2/m64, xmm1","subsd xmm2/m64, xmm1","F2 0F 5C /r","V","V","SSE2","","rw,r","",""
+"SUBSS xmm1, xmm2/m32","SUBSS xmm2/m32, xmm1","subss xmm2/m32, xmm1","F3 0F 5C /r","V","V","SSE","","rw,r","",""
+"SWAPGS","SWAPGS","swapgs","0F 01 F8","I","V","","","","",""
+"SYSCALL","SYSCALL","syscall","0F 05","I","V","","","","",""
+"SYSENTER","SYSENTER","sysenter","0F 34","V","V","PentiumII","","","",""
+"SYSEXIT","SYSEXIT","sysexit","0F 35","V","V","PentiumII","ignoreREXW","","",""
+"SYSEXIT","SYSEXIT","sysexit","REX.W 0F 35","N.E.","V","","pseudo","","",""
+"SYSRET","SYSRET","sysretw/sysretl/sysretl","0F 07","I","V","","ignoreREXW","","",""
+"SYSRET","SYSRET","sysretw/sysretl/sysretl","REX.W 0F 07","I","V","","pseudo","","",""
+"TEST AL, imm8","TESTB imm8, AL","testb imm8, AL","A8 ib","V","V","","","r,r","Y","8"
+"TEST AX, imm16","TESTW imm16, AX","testw imm16, AX","A9 iw","V","V","","operand16","r,r","Y","16"
+"TEST EAX, imm32","TESTL imm32, EAX","testl imm32, EAX","A9 id","V","V","","operand32","r,r","Y","32"
+"TEST RAX, imm32","TESTQ imm32, RAX","testq imm32, RAX","REX.W A9 id","N.E.","V","","","r,r","Y","64"
+"TEST r/m16, imm16","TESTW imm16, r/m16","testw imm16, r/m16","F7 /0 iw","V","V","","operand16","r,r","Y","16"
+"TEST r/m16, r16","TESTW r16, r/m16","testw r16, r/m16","85 /r","V","V","","operand16","r,r","Y","16"
+"TEST r/m32, imm32","TESTL imm32, r/m32","testl imm32, r/m32","F7 /0 id","V","V","","operand32","r,r","Y","32"
+"TEST r/m32, r32","TESTL r32, r/m32","testl r32, r/m32","85 /r","V","V","","operand32","r,r","Y","32"
+"TEST r/m64, imm32","TESTQ imm32, r/m64","testq imm32, r/m64","REX.W F7 /0 id","N.E.","V","","","r,r","Y","64"
+"TEST r/m64, r64","TESTQ r64, r/m64","testq r64, r/m64","REX.W 85 /r","N.E.","V","","","r,r","Y","64"
+"TEST r/m8, imm8","TESTB imm8, r/m8","testb imm8, r/m8","F6 /0 ib","V","V","","","r,r","Y","8"
+"TEST r/m8, imm8","TESTB imm8, r/m8","testb imm8, r/m8","REX F6 /0 ib","N.E.","V","","pseudo64","r,r","Y","8"
+"TEST r/m8, r8","TESTB r8, r/m8","testb r8, r/m8","84 /r","V","V","","","r,r","Y","8"
+"TEST r/m8, r8","TESTB r8, r/m8","testb r8, r/m8","REX 84 /r","N.E.","V","","pseudo64","r,r","Y","8"
+"TZCNT r16, r/m16","TZCNTW r/m16, r16","tzcntw r/m16, r16","F3 0F BC /r","V","V","BMI1","operand16","w,r","Y","16"
+"TZCNT r32, r/m32","TZCNTL r/m32, r32","tzcntl r/m32, r32","F3 0F BC /r","V","V","BMI1","operand32","w,r","Y","32"
+"TZCNT r64, r/m64","TZCNTQ r/m64, r64","tzcntq r/m64, r64","F3 REX.W 0F BC /r","N.E.","V","BMI1","","w,r","Y","64"
+"UCOMISD xmm1, xmm2/m64","UCOMISD xmm2/m64, xmm1","ucomisd xmm2/m64, xmm1","66 0F 2E /r","V","V","SSE2","","r,r","",""
+"UCOMISS xmm1, xmm2/m32","UCOMISS xmm2/m32, xmm1","ucomiss xmm2/m32, xmm1","0F 2E /r","V","V","SSE","","r,r","",""
+"UD1","UD1","ud1","0F B9","V","V","","","","",""
+"UD2","UD2","ud2","0F 0B","V","V","","","","",""
+"UNPCKHPD xmm1, xmm2/m128","UNPCKHPD xmm2/m128, xmm1","unpckhpd xmm2/m128, xmm1","66 0F 15 /r","V","V","SSE2","","rw,r","",""
+"UNPCKHPS xmm1, xmm2/m128","UNPCKHPS xmm2/m128, xmm1","unpckhps xmm2/m128, xmm1","0F 15 /r","V","V","SSE","","rw,r","",""
+"UNPCKLPD xmm1, xmm2/m128","UNPCKLPD xmm2/m128, xmm1","unpcklpd xmm2/m128, xmm1","66 0F 14 /r","V","V","SSE2","","rw,r","",""
+"UNPCKLPS xmm1, xmm2/m128","UNPCKLPS xmm2/m128, xmm1","unpcklps xmm2/m128, xmm1","0F 14 /r","V","V","SSE","","rw,r","",""
+"VADDPD xmm1, xmmV, xmm2/m128","VADDPD xmm2/m128, xmmV, xmm1","vaddpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
+"VADDPD ymm1, ymmV, ymm2/m256","VADDPD ymm2/m256, ymmV, ymm1","vaddpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
+"VADDPS xmm1, xmmV, xmm2/m128","VADDPS xmm2/m128, xmmV, xmm1","vaddps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
+"VADDPS ymm1, ymmV, ymm2/m256","VADDPS ymm2/m256, ymmV, ymm1","vaddps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
+"VADDSD xmm1, xmmV, xmm2/m64","VADDSD xmm2/m64, xmmV, xmm1","vaddsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
+"VADDSS xmm1, xmmV, xmm2/m32","VADDSS xmm2/m32, xmmV, xmm1","vaddss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 58 /r","V","V","AVX","","w,r,r","",""
+"VADDSUBPD xmm1, xmmV, xmm2/m128","VADDSUBPD xmm2/m128, xmmV, xmm1","vaddsubpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D0 /r","V","V","AVX","","w,r,r","",""
+"VADDSUBPD ymm1, ymmV, ymm2/m256","VADDSUBPD ymm2/m256, ymmV, ymm1","vaddsubpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D0 /r","V","V","AVX","","w,r,r","",""
+"VADDSUBPS xmm1, xmmV, xmm2/m128","VADDSUBPS xmm2/m128, xmmV, xmm1","vaddsubps xmm2/m128, xmmV, xmm1","VEX.NDS.128.F2.0F.WIG D0 /r","V","V","AVX","","w,r,r","",""
+"VADDSUBPS ymm1, ymmV, ymm2/m256","VADDSUBPS ymm2/m256, ymmV, ymm1","vaddsubps ymm2/m256, ymmV, ymm1","VEX.NDS.256.F2.0F.WIG D0 /r","V","V","AVX","","w,r,r","",""
+"VAESDEC xmm1, xmmV, xmm2/m128","VAESDEC xmm2/m128, xmmV, xmm1","vaesdec xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG DE /r","V","V","Both AES and AVX flags","","w,r,r","",""
+"VAESDECLAST xmm1, xmmV, xmm2/m128","VAESDECLAST xmm2/m128, xmmV, xmm1","vaesdeclast xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG DF /r","V","V","Both AES and AVX flags","","w,r,r","",""
+"VAESENC xmm1, xmmV, xmm2/m128","VAESENC xmm2/m128, xmmV, xmm1","vaesenc xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG DC /r","V","V","Both AES and AVX flags","","w,r,r","",""
+"VAESENCLAST xmm1, xmmV, xmm2/m128","VAESENCLAST xmm2/m128, xmmV, xmm1","vaesenclast xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG DD /r","V","V","Both AES and AVX flags","","w,r,r","",""
+"VAESIMC xmm1, xmm2/m128","VAESIMC xmm2/m128, xmm1","vaesimc xmm2/m128, xmm1","VEX.128.66.0F38.WIG DB /r","V","V","Both AES and AVX flags","","w,r","",""
+"VAESKEYGENASSIST xmm1, xmm2/m128, imm8","VAESKEYGENASSIST imm8, xmm2/m128, xmm1","vaeskeygenassist imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG DF /r ib","V","V","Both AES and AVX flags","","w,r,r","",""
+"VANDNPD xmm1, xmmV, xmm2/m128","VANDNPD xmm2/m128, xmmV, xmm1","vandnpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 55 /r","V","V","AVX","","w,r,r","",""
+"VANDNPD ymm1, ymmV, ymm2/m256","VANDNPD ymm2/m256, ymmV, ymm1","vandnpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 55 /r","V","V","AVX","","w,r,r","",""
+"VANDNPS xmm1, xmmV, xmm2/m128","VANDNPS xmm2/m128, xmmV, xmm1","vandnps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 55 /r","V","V","AVX","","w,r,r","",""
+"VANDNPS ymm1, ymmV, ymm2/m256","VANDNPS ymm2/m256, ymmV, ymm1","vandnps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 55 /r","V","V","AVX","","w,r,r","",""
+"VANDPD xmm1, xmmV, xmm2/m128","VANDPD xmm2/m128, xmmV, xmm1","vandpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 54 /r","V","V","AVX","","w,r,r","",""
+"VANDPD ymm1, ymmV, ymm2/m256","VANDPD ymm2/m256, ymmV, ymm1","vandpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 54 /r","V","V","AVX","","w,r,r","",""
+"VANDPS xmm1, xmmV, xmm2/m128","VANDPS xmm2/m128, xmmV, xmm1","vandps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 54 /r","V","V","AVX","","w,r,r","",""
+"VANDPS ymm1, ymmV, ymm2/m256","VANDPS ymm2/m256, ymmV, ymm1","vandps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 54 /r","V","V","AVX","","w,r,r","",""
+"VBLENDPD xmm1, xmmV, xmm2/m128, imm8","VBLENDPD imm8, xmm2/m128, xmmV, xmm1","vblendpd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 0D /r ib","V","V","AVX","","w,r,r,r","",""
+"VBLENDPD ymm1, ymmV, ymm2/m256, imm8","VBLENDPD imm8, ymm2/m256, ymmV, ymm1","vblendpd imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 0D /r ib","V","V","AVX","","w,r,r,r","",""
+"VBLENDPS xmm1, xmmV, xmm2/m128, imm8","VBLENDPS imm8, xmm2/m128, xmmV, xmm1","vblendps imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 0C /r ib","V","V","AVX","","w,r,r,r","",""
+"VBLENDPS ymm1, ymmV, ymm2/m256, imm8","VBLENDPS imm8, ymm2/m256, ymmV, ymm1","vblendps imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 0C /r ib","V","V","AVX","","w,r,r,r","",""
+"VBLENDVPD xmm1, xmmV, xmm2/m128, xmmIH","VBLENDVPD xmmIH, xmm2/m128, xmmV, xmm1","vblendvpd xmmIH, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 4B /r /is4","V","V","AVX","","w,r,r,r","",""
+"VBLENDVPD ymm1, ymmV, ymm2/m256, ymmIH","VBLENDVPD ymmIH, ymm2/m256, ymmV, ymm1","vblendvpd ymmIH, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 4B /r /is4","V","V","AVX","","w,r,r,r","",""
+"VBLENDVPS xmm1, xmmV, xmm2/m128, xmmIH","VBLENDVPS xmmIH, xmm2/m128, xmmV, xmm1","vblendvps xmmIH, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 4A /r /is4","V","V","AVX","","w,r,r,r","",""
+"VBLENDVPS ymm1, ymmV, ymm2/m256, ymmIH","VBLENDVPS ymmIH, ymm2/m256, ymmV, ymm1","vblendvps ymmIH, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 4A /r /is4","V","V","AVX","","w,r,r,r","",""
+"VBROADCASTF128 ymm1, m128","VBROADCASTF128 m128, ymm1","vbroadcastf128 m128, ymm1","VEX.256.66.0F38.W0 1A /r","V","V","AVX","modrm_memonly","w,r","",""
+"VBROADCASTI128 ymm1, m128","VBROADCASTI128 m128, ymm1","vbroadcasti128 m128, ymm1","VEX.256.66.0F38.W0 5A /r","V","V","AVX2","modrm_memonly","w,r","",""
+"VBROADCASTSD ymm1, m64","VBROADCASTSD m64, ymm1","vbroadcastsd m64, ymm1","VEX.256.66.0F38.W0 19 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VBROADCASTSD ymm1, xmm2","VBROADCASTSD xmm2, ymm1","vbroadcastsd xmm2, ymm1","VEX.256.66.0F38.W0 19 /r","V","V","AVX2","modrm_regonly","w,r","",""
+"VBROADCASTSS xmm1, m32","VBROADCASTSS m32, xmm1","vbroadcastss m32, xmm1","VEX.128.66.0F38.W0 18 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VBROADCASTSS xmm1, xmm2","VBROADCASTSS xmm2, xmm1","vbroadcastss xmm2, xmm1","VEX.128.66.0F38.W0 18 /r","V","V","AVX2","modrm_regonly","w,r","",""
+"VBROADCASTSS ymm1, m32","VBROADCASTSS m32, ymm1","vbroadcastss m32, ymm1","VEX.256.66.0F38.W0 18 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VBROADCASTSS ymm1, xmm2","VBROADCASTSS xmm2, ymm1","vbroadcastss xmm2, ymm1","VEX.256.66.0F38.W0 18 /r","V","V","AVX2","modrm_regonly","w,r","",""
+"VCMPPD xmm1, xmmV, xmm2/m128, imm8","VCMPPD imm8, xmm2/m128, xmmV, xmm1","vcmppd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
+"VCMPPD ymm1, ymmV, ymm2/m256, imm8","VCMPPD imm8, ymm2/m256, ymmV, ymm1","vcmppd imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
+"VCMPPS xmm1, xmmV, xmm2/m128, imm8","VCMPPS imm8, xmm2/m128, xmmV, xmm1","vcmpps imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
+"VCMPPS ymm1, ymmV, ymm2/m256, imm8","VCMPPS imm8, ymm2/m256, ymmV, ymm1","vcmpps imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
+"VCMPSD xmm1, xmmV, xmm2/m64, imm8","VCMPSD imm8, xmm2/m64, xmmV, xmm1","vcmpsd imm8, xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
+"VCMPSS xmm1, xmmV, xmm2/m32, imm8","VCMPSS imm8, xmm2/m32, xmmV, xmm1","vcmpss imm8, xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG C2 /r ib","V","V","AVX","","w,r,r,r","",""
+"VCOMISD xmm1, xmm2/m64","VCOMISD xmm2/m64, xmm1","vcomisd xmm2/m64, xmm1","VEX.LIG.66.0F.WIG 2F /r","V","V","AVX","","r,r","",""
+"VCOMISS xmm1, xmm2/m32","VCOMISS xmm2/m32, xmm1","vcomiss xmm2/m32, xmm1","VEX.LIG.0F.WIG 2F /r","V","V","AVX","","r,r","",""
+"VCVTDQ2PD xmm1, xmm2/m64","VCVTDQ2PD xmm2/m64, xmm1","vcvtdq2pd xmm2/m64, xmm1","VEX.128.F3.0F.WIG E6 /r","V","V","AVX","","w,r","",""
+"VCVTDQ2PD ymm1, xmm2/m128","VCVTDQ2PD xmm2/m128, ymm1","vcvtdq2pd xmm2/m128, ymm1","VEX.256.F3.0F.WIG E6 /r","V","V","AVX","","w,r","",""
+"VCVTDQ2PS xmm1, xmm2/m128","VCVTDQ2PS xmm2/m128, xmm1","vcvtdq2ps xmm2/m128, xmm1","VEX.128.0F.WIG 5B /r","V","V","AVX","","w,r","",""
+"VCVTDQ2PS ymm1, ymm2/m256","VCVTDQ2PS ymm2/m256, ymm1","vcvtdq2ps ymm2/m256, ymm1","VEX.256.0F.WIG 5B /r","V","V","AVX","","w,r","",""
+"VCVTPD2DQ xmm1, xmm2/m128","VCVTPD2DQX xmm2/m128, xmm1","vcvtpd2dqx xmm2/m128, xmm1","VEX.128.F2.0F.WIG E6 /r","V","V","AVX","","w,r","Y","128"
+"VCVTPD2DQ xmm1, ymm2/m256","VCVTPD2DQY ymm2/m256, xmm1","vcvtpd2dqy ymm2/m256, xmm1","VEX.256.F2.0F.WIG E6 /r","V","V","AVX","","w,r","Y","256"
+"VCVTPD2PS xmm1, xmm2/m128","VCVTPD2PSX xmm2/m128, xmm1","vcvtpd2psx xmm2/m128, xmm1","VEX.128.66.0F.WIG 5A /r","V","V","AVX","","w,r","Y","128"
+"VCVTPD2PS xmm1, ymm2/m256","VCVTPD2PSY ymm2/m256, xmm1","vcvtpd2psy ymm2/m256, xmm1","VEX.256.66.0F.WIG 5A /r","V","V","AVX","","w,r","Y","256"
+"VCVTPH2PS xmm1, xmm2/m64","VCVTPH2PS xmm2/m64, xmm1","vcvtph2ps xmm2/m64, xmm1","VEX.128.66.0F38.W0 13 /r","V","V","F16C","","w,r","",""
+"VCVTPH2PS ymm1, xmm2/m128","VCVTPH2PS xmm2/m128, ymm1","vcvtph2ps xmm2/m128, ymm1","VEX.256.66.0F38.W0 13 /r","V","V","F16C","","w,r","",""
+"VCVTPS2DQ xmm1, xmm2/m128","VCVTPS2DQ xmm2/m128, xmm1","vcvtps2dq xmm2/m128, xmm1","VEX.128.66.0F.WIG 5B /r","V","V","AVX","","w,r","",""
+"VCVTPS2DQ ymm1, ymm2/m256","VCVTPS2DQ ymm2/m256, ymm1","vcvtps2dq ymm2/m256, ymm1","VEX.256.66.0F.WIG 5B /r","V","V","AVX","","w,r","",""
+"VCVTPS2PD xmm1, xmm2/m64","VCVTPS2PD xmm2/m64, xmm1","vcvtps2pd xmm2/m64, xmm1","VEX.128.0F.WIG 5A /r","V","V","AVX","","w,r","",""
+"VCVTPS2PD ymm1, xmm2/m128","VCVTPS2PD xmm2/m128, ymm1","vcvtps2pd xmm2/m128, ymm1","VEX.256.0F.WIG 5A /r","V","V","AVX","","w,r","",""
+"VCVTPS2PH xmm2/m128, ymm1, imm8","VCVTPS2PH imm8, ymm1, xmm2/m128","vcvtps2ph imm8, ymm1, xmm2/m128","VEX.256.66.0F3A.W0 1D /r ib","V","V","F16C","","w,r,r","",""
+"VCVTPS2PH xmm2/m64, xmm1, imm8","VCVTPS2PH imm8, xmm1, xmm2/m64","vcvtps2ph imm8, xmm1, xmm2/m64","VEX.128.66.0F3A.W0 1D /r ib","V","V","F16C","","w,r,r","",""
+"VCVTSD2SI r32, xmm2/m64","VCVTSD2SI xmm2/m64, r32","vcvtsd2si xmm2/m64, r32","VEX.LIG.F2.0F.W0 2D /r","V","V","AVX","","w,r","Y","32"
+"VCVTSD2SI r64, xmm2/m64","VCVTSD2SIQ xmm2/m64, r64","vcvtsd2siq xmm2/m64, r64","VEX.LIG.F2.0F.W1 2D /r","N.E.","V","AVX","","w,r","Y","64"
+"VCVTSD2SS xmm1, xmmV, xmm2/m64","VCVTSD2SS xmm2/m64, xmmV, xmm1","vcvtsd2ss xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5A /r","V","V","AVX","","w,r,r","",""
+"VCVTSI2SD xmm1, xmmV, r/m32","VCVTSI2SDL r/m32, xmmV, xmm1","vcvtsi2sdl r/m32, xmmV, xmm1","VEX.NDS.LIG.F2.0F.W0 2A /r","V","V","AVX","","w,r,r","Y","32"
+"VCVTSI2SD xmm1, xmmV, r/m64","VCVTSI2SDQ r/m64, xmmV, xmm1","vcvtsi2sdq r/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.W1 2A /r","N.E.","V","AVX","","w,r,r","Y","64"
+"VCVTSI2SS xmm1, xmmV, r/m32","VCVTSI2SSL r/m32, xmmV, xmm1","vcvtsi2ssl r/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.W0 2A /r","V","V","AVX","","w,r,r","Y","32"
+"VCVTSI2SS xmm1, xmmV, r/m64","VCVTSI2SSQ r/m64, xmmV, xmm1","vcvtsi2ssq r/m64, xmmV, xmm1","VEX.NDS.LIG.F3.0F.W1 2A /r","N.E.","V","AVX","","w,r,r","Y","64"
+"VCVTSS2SD xmm1, xmmV, xmm2/m32","VCVTSS2SD xmm2/m32, xmmV, xmm1","vcvtss2sd xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5A /r","V","V","AVX","","w,r,r","",""
+"VCVTSS2SI r32, xmm2/m32","VCVTSS2SI xmm2/m32, r32","vcvtss2si xmm2/m32, r32","VEX.LIG.F3.0F.W0 2D /r","V","V","AVX","","w,r","Y","32"
+"VCVTSS2SI r64, xmm2/m32","VCVTSS2SIQ xmm2/m32, r64","vcvtss2siq xmm2/m32, r64","VEX.LIG.F3.0F.W1 2D /r","N.E.","V","AVX","","w,r","Y","64"
+"VCVTTPD2DQ xmm1, xmm2/m128","VCVTTPD2DQX xmm2/m128, xmm1","vcvttpd2dqx xmm2/m128, xmm1","VEX.128.66.0F.WIG E6 /r","V","V","AVX","","w,r","Y","128"
+"VCVTTPD2DQ xmm1, ymm2/m256","VCVTTPD2DQY ymm2/m256, xmm1","vcvttpd2dqy ymm2/m256, xmm1","VEX.256.66.0F.WIG E6 /r","V","V","AVX","","w,r","Y","256"
+"VCVTTPS2DQ xmm1, xmm2/m128","VCVTTPS2DQ xmm2/m128, xmm1","vcvttps2dq xmm2/m128, xmm1","VEX.128.F3.0F.WIG 5B /r","V","V","AVX","","w,r","",""
+"VCVTTPS2DQ ymm1, ymm2/m256","VCVTTPS2DQ ymm2/m256, ymm1","vcvttps2dq ymm2/m256, ymm1","VEX.256.F3.0F.WIG 5B /r","V","V","AVX","","w,r","",""
+"VCVTTSD2SI r32, xmm2/m64","VCVTTSD2SI xmm2/m64, r32","vcvttsd2si xmm2/m64, r32","VEX.LIG.F2.0F.W0 2C /r","V","V","AVX","","w,r","Y","32"
+"VCVTTSD2SI r64, xmm2/m64","VCVTTSD2SIQ xmm2/m64, r64","vcvttsd2siq xmm2/m64, r64","VEX.LIG.F2.0F.W1 2C /r","N.E.","V","AVX","","w,r","Y","64"
+"VCVTTSS2SI r32, xmm2/m32","VCVTTSS2SI xmm2/m32, r32","vcvttss2si xmm2/m32, r32","VEX.LIG.F3.0F.W0 2C /r","V","V","AVX","","w,r","Y","32"
+"VCVTTSS2SI r64, xmm2/m32","VCVTTSS2SIQ xmm2/m32, r64","vcvttss2siq xmm2/m32, r64","VEX.LIG.F3.0F.W1 2C /r","N.E.","V","AVX","","w,r","Y","64"
+"VDIVPD xmm1, xmmV, xmm2/m128","VDIVPD xmm2/m128, xmmV, xmm1","vdivpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
+"VDIVPD ymm1, ymmV, ymm2/m256","VDIVPD ymm2/m256, ymmV, ymm1","vdivpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
+"VDIVPS xmm1, xmmV, xmm2/m128","VDIVPS xmm2/m128, xmmV, xmm1","vdivps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
+"VDIVPS ymm1, ymmV, ymm2/m256","VDIVPS ymm2/m256, ymmV, ymm1","vdivps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
+"VDIVSD xmm1, xmmV, xmm2/m64","VDIVSD xmm2/m64, xmmV, xmm1","vdivsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
+"VDIVSS xmm1, xmmV, xmm2/m32","VDIVSS xmm2/m32, xmmV, xmm1","vdivss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5E /r","V","V","AVX","","w,r,r","",""
+"VDPPD xmm1, xmmV, xmm2/m128, imm8","VDPPD imm8, xmm2/m128, xmmV, xmm1","vdppd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 41 /r ib","V","V","AVX","","w,r,r,r","",""
+"VDPPS xmm1, xmmV, xmm2/m128, imm8","VDPPS imm8, xmm2/m128, xmmV, xmm1","vdpps imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 40 /r ib","V","V","AVX","","w,r,r,r","",""
+"VDPPS ymm1, ymmV, ymm2/m256, imm8","VDPPS imm8, ymm2/m256, ymmV, ymm1","vdpps imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 40 /r ib","V","V","AVX","","w,r,r,r","",""
+"VERR r/m16","VERR r/m16","verr r/m16","0F 00 /4","V","V","","","r","",""
+"VERW r/m16","VERW r/m16","verw r/m16","0F 00 /5","V","V","","","r","",""
+"VEXTRACTF128 xmm2/m128, ymm1, imm8","VEXTRACTF128 imm8, ymm1, xmm2/m128","vextractf128 imm8, ymm1, xmm2/m128","VEX.256.66.0F3A.W0 19 /r ib","V","V","AVX","","w,r,r","",""
+"VEXTRACTI128 xmm2/m128, ymm1, imm8","VEXTRACTI128 imm8, ymm1, xmm2/m128","vextracti128 imm8, ymm1, xmm2/m128","VEX.256.66.0F3A.W0 39 /r ib","V","V","AVX2","","w,r,r","",""
+"VEXTRACTPS r/m32, xmm1, imm8","VEXTRACTPS imm8, xmm1, r/m32","vextractps imm8, xmm1, r/m32","VEX.128.66.0F3A.WIG 17 /r ib","V","V","AVX","","w,r,r","",""
+"VFMADD132PD xmm1, xmmV, xmm2/m128","VFMADD132PD xmm2/m128, xmmV, xmm1","vfmadd132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 98 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD132PD ymm1, ymmV, ymm2/m256","VFMADD132PD ymm2/m256, ymmV, ymm1","vfmadd132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 98 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD132PS xmm1, xmmV, xmm2/m128","VFMADD132PS xmm2/m128, xmmV, xmm1","vfmadd132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 98 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD132PS ymm1, ymmV, ymm2/m256","VFMADD132PS ymm2/m256, ymmV, ymm1","vfmadd132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 98 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD132SD xmm1, xmmV, xmm2/m64","VFMADD132SD xmm2/m64, xmmV, xmm1","vfmadd132sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 99 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD132SS xmm1, xmmV, xmm2/m32","VFMADD132SS xmm2/m32, xmmV, xmm1","vfmadd132ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 99 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD213PD xmm1, xmmV, xmm2/m128","VFMADD213PD xmm2/m128, xmmV, xmm1","vfmadd213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 A8 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD213PD ymm1, ymmV, ymm2/m256","VFMADD213PD ymm2/m256, ymmV, ymm1","vfmadd213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 A8 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD213PS xmm1, xmmV, xmm2/m128","VFMADD213PS xmm2/m128, xmmV, xmm1","vfmadd213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 A8 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD213PS ymm1, ymmV, ymm2/m256","VFMADD213PS ymm2/m256, ymmV, ymm1","vfmadd213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 A8 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD213SD xmm1, xmmV, xmm2/m64","VFMADD213SD xmm2/m64, xmmV, xmm1","vfmadd213sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 A9 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD213SS xmm1, xmmV, xmm2/m32","VFMADD213SS xmm2/m32, xmmV, xmm1","vfmadd213ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 A9 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD231PD xmm1, xmmV, xmm2/m128","VFMADD231PD xmm2/m128, xmmV, xmm1","vfmadd231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 B8 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD231PD ymm1, ymmV, ymm2/m256","VFMADD231PD ymm2/m256, ymmV, ymm1","vfmadd231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 B8 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD231PS xmm1, xmmV, xmm2/m128","VFMADD231PS xmm2/m128, xmmV, xmm1","vfmadd231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 B8 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD231PS ymm1, ymmV, ymm2/m256","VFMADD231PS ymm2/m256, ymmV, ymm1","vfmadd231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 B8 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD231SD xmm1, xmmV, xmm2/m64","VFMADD231SD xmm2/m64, xmmV, xmm1","vfmadd231sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 B9 /r","V","V","FMA","","rw,r,r","",""
+"VFMADD231SS xmm1, xmmV, xmm2/m32","VFMADD231SS xmm2/m32, xmmV, xmm1","vfmadd231ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 B9 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB132PD xmm1, xmmV, xmm2/m128","VFMADDSUB132PD xmm2/m128, xmmV, xmm1","vfmaddsub132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 96 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB132PD ymm1, ymmV, ymm2/m256","VFMADDSUB132PD ymm2/m256, ymmV, ymm1","vfmaddsub132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 96 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB132PS xmm1, xmmV, xmm2/m128","VFMADDSUB132PS xmm2/m128, xmmV, xmm1","vfmaddsub132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 96 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB132PS ymm1, ymmV, ymm2/m256","VFMADDSUB132PS ymm2/m256, ymmV, ymm1","vfmaddsub132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 96 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB213PD xmm1, xmmV, xmm2/m128","VFMADDSUB213PD xmm2/m128, xmmV, xmm1","vfmaddsub213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 A6 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB213PD ymm1, ymmV, ymm2/m256","VFMADDSUB213PD ymm2/m256, ymmV, ymm1","vfmaddsub213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 A6 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB213PS xmm1, xmmV, xmm2/m128","VFMADDSUB213PS xmm2/m128, xmmV, xmm1","vfmaddsub213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 A6 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB213PS ymm1, ymmV, ymm2/m256","VFMADDSUB213PS ymm2/m256, ymmV, ymm1","vfmaddsub213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 A6 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB231PD xmm1, xmmV, xmm2/m128","VFMADDSUB231PD xmm2/m128, xmmV, xmm1","vfmaddsub231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 B6 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB231PD ymm1, ymmV, ymm2/m256","VFMADDSUB231PD ymm2/m256, ymmV, ymm1","vfmaddsub231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 B6 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB231PS xmm1, xmmV, xmm2/m128","VFMADDSUB231PS xmm2/m128, xmmV, xmm1","vfmaddsub231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 B6 /r","V","V","FMA","","rw,r,r","",""
+"VFMADDSUB231PS ymm1, ymmV, ymm2/m256","VFMADDSUB231PS ymm2/m256, ymmV, ymm1","vfmaddsub231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 B6 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB132PD xmm1, xmmV, xmm2/m128","VFMSUB132PD xmm2/m128, xmmV, xmm1","vfmsub132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 9A /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB132PD ymm1, ymmV, ymm2/m256","VFMSUB132PD ymm2/m256, ymmV, ymm1","vfmsub132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 9A /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB132PS xmm1, xmmV, xmm2/m128","VFMSUB132PS xmm2/m128, xmmV, xmm1","vfmsub132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 9A /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB132PS ymm1, ymmV, ymm2/m256","VFMSUB132PS ymm2/m256, ymmV, ymm1","vfmsub132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 9A /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB132SD xmm1, xmmV, xmm2/m64","VFMSUB132SD xmm2/m64, xmmV, xmm1","vfmsub132sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 9B /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB132SS xmm1, xmmV, xmm2/m32","VFMSUB132SS xmm2/m32, xmmV, xmm1","vfmsub132ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 9B /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB213PD xmm1, xmmV, xmm2/m128","VFMSUB213PD xmm2/m128, xmmV, xmm1","vfmsub213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 AA /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB213PD ymm1, ymmV, ymm2/m256","VFMSUB213PD ymm2/m256, ymmV, ymm1","vfmsub213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 AA /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB213PS xmm1, xmmV, xmm2/m128","VFMSUB213PS xmm2/m128, xmmV, xmm1","vfmsub213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 AA /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB213PS ymm1, ymmV, ymm2/m256","VFMSUB213PS ymm2/m256, ymmV, ymm1","vfmsub213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 AA /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB213SD xmm1, xmmV, xmm2/m64","VFMSUB213SD xmm2/m64, xmmV, xmm1","vfmsub213sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 AB /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB213SS xmm1, xmmV, xmm2/m32","VFMSUB213SS xmm2/m32, xmmV, xmm1","vfmsub213ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 AB /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB231PD xmm1, xmmV, xmm2/m128","VFMSUB231PD xmm2/m128, xmmV, xmm1","vfmsub231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 BA /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB231PD ymm1, ymmV, ymm2/m256","VFMSUB231PD ymm2/m256, ymmV, ymm1","vfmsub231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 BA /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB231PS xmm1, xmmV, xmm2/m128","VFMSUB231PS xmm2/m128, xmmV, xmm1","vfmsub231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 BA /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB231PS ymm1, ymmV, ymm2/m256","VFMSUB231PS ymm2/m256, ymmV, ymm1","vfmsub231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 BA /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB231SD xmm1, xmmV, xmm2/m64","VFMSUB231SD xmm2/m64, xmmV, xmm1","vfmsub231sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 BB /r","V","V","FMA","","rw,r,r","",""
+"VFMSUB231SS xmm1, xmmV, xmm2/m32","VFMSUB231SS xmm2/m32, xmmV, xmm1","vfmsub231ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 BB /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD132PD xmm1, xmmV, xmm2/m128","VFMSUBADD132PD xmm2/m128, xmmV, xmm1","vfmsubadd132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 97 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD132PD ymm1, ymmV, ymm2/m256","VFMSUBADD132PD ymm2/m256, ymmV, ymm1","vfmsubadd132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 97 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD132PS xmm1, xmmV, xmm2/m128","VFMSUBADD132PS xmm2/m128, xmmV, xmm1","vfmsubadd132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 97 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD132PS ymm1, ymmV, ymm2/m256","VFMSUBADD132PS ymm2/m256, ymmV, ymm1","vfmsubadd132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 97 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD213PD xmm1, xmmV, xmm2/m128","VFMSUBADD213PD xmm2/m128, xmmV, xmm1","vfmsubadd213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 A7 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD213PD ymm1, ymmV, ymm2/m256","VFMSUBADD213PD ymm2/m256, ymmV, ymm1","vfmsubadd213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 A7 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD213PS xmm1, xmmV, xmm2/m128","VFMSUBADD213PS xmm2/m128, xmmV, xmm1","vfmsubadd213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 A7 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD213PS ymm1, ymmV, ymm2/m256","VFMSUBADD213PS ymm2/m256, ymmV, ymm1","vfmsubadd213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 A7 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD231PD xmm1, xmmV, xmm2/m128","VFMSUBADD231PD xmm2/m128, xmmV, xmm1","vfmsubadd231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 B7 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD231PD ymm1, ymmV, ymm2/m256","VFMSUBADD231PD ymm2/m256, ymmV, ymm1","vfmsubadd231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 B7 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD231PS xmm1, xmmV, xmm2/m128","VFMSUBADD231PS xmm2/m128, xmmV, xmm1","vfmsubadd231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 B7 /r","V","V","FMA","","rw,r,r","",""
+"VFMSUBADD231PS ymm1, ymmV, ymm2/m256","VFMSUBADD231PS ymm2/m256, ymmV, ymm1","vfmsubadd231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 B7 /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD132PD xmm1, xmmV, xmm2/m128","VFNMADD132PD xmm2/m128, xmmV, xmm1","vfnmadd132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 9C /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD132PD ymm1, ymmV, ymm2/m256","VFNMADD132PD ymm2/m256, ymmV, ymm1","vfnmadd132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 9C /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD132PS xmm1, xmmV, xmm2/m128","VFNMADD132PS xmm2/m128, xmmV, xmm1","vfnmadd132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 9C /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD132PS ymm1, ymmV, ymm2/m256","VFNMADD132PS ymm2/m256, ymmV, ymm1","vfnmadd132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 9C /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD132SD xmm1, xmmV, xmm2/m64","VFNMADD132SD xmm2/m64, xmmV, xmm1","vfnmadd132sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 9D /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD132SS xmm1, xmmV, xmm2/m32","VFNMADD132SS xmm2/m32, xmmV, xmm1","vfnmadd132ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 9D /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD213PD xmm1, xmmV, xmm2/m128","VFNMADD213PD xmm2/m128, xmmV, xmm1","vfnmadd213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 AC /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD213PD ymm1, ymmV, ymm2/m256","VFNMADD213PD ymm2/m256, ymmV, ymm1","vfnmadd213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 AC /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD213PS xmm1, xmmV, xmm2/m128","VFNMADD213PS xmm2/m128, xmmV, xmm1","vfnmadd213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 AC /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD213PS ymm1, ymmV, ymm2/m256","VFNMADD213PS ymm2/m256, ymmV, ymm1","vfnmadd213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 AC /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD213SD xmm1, xmmV, xmm2/m64","VFNMADD213SD xmm2/m64, xmmV, xmm1","vfnmadd213sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 AD /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD213SS xmm1, xmmV, xmm2/m32","VFNMADD213SS xmm2/m32, xmmV, xmm1","vfnmadd213ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 AD /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD231PD xmm1, xmmV, xmm2/m128","VFNMADD231PD xmm2/m128, xmmV, xmm1","vfnmadd231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 BC /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD231PD ymm1, ymmV, ymm2/m256","VFNMADD231PD ymm2/m256, ymmV, ymm1","vfnmadd231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 BC /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD231PS xmm1, xmmV, xmm2/m128","VFNMADD231PS xmm2/m128, xmmV, xmm1","vfnmadd231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 BC /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD231PS ymm1, ymmV, ymm2/m256","VFNMADD231PS ymm2/m256, ymmV, ymm1","vfnmadd231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 BC /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD231SD xmm1, xmmV, xmm2/m64","VFNMADD231SD xmm2/m64, xmmV, xmm1","vfnmadd231sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 BD /r","V","V","FMA","","rw,r,r","",""
+"VFNMADD231SS xmm1, xmmV, xmm2/m32","VFNMADD231SS xmm2/m32, xmmV, xmm1","vfnmadd231ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 BD /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB132PD xmm1, xmmV, xmm2/m128","VFNMSUB132PD xmm2/m128, xmmV, xmm1","vfnmsub132pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 9E /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB132PD ymm1, ymmV, ymm2/m256","VFNMSUB132PD ymm2/m256, ymmV, ymm1","vfnmsub132pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 9E /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB132PS xmm1, xmmV, xmm2/m128","VFNMSUB132PS xmm2/m128, xmmV, xmm1","vfnmsub132ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 9E /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB132PS ymm1, ymmV, ymm2/m256","VFNMSUB132PS ymm2/m256, ymmV, ymm1","vfnmsub132ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 9E /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB132SD xmm1, xmmV, xmm2/m64","VFNMSUB132SD xmm2/m64, xmmV, xmm1","vfnmsub132sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 9F /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB132SS xmm1, xmmV, xmm2/m32","VFNMSUB132SS xmm2/m32, xmmV, xmm1","vfnmsub132ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 9F /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB213PD xmm1, xmmV, xmm2/m128","VFNMSUB213PD xmm2/m128, xmmV, xmm1","vfnmsub213pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 AE /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB213PD ymm1, ymmV, ymm2/m256","VFNMSUB213PD ymm2/m256, ymmV, ymm1","vfnmsub213pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 AE /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB213PS xmm1, xmmV, xmm2/m128","VFNMSUB213PS xmm2/m128, xmmV, xmm1","vfnmsub213ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 AE /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB213PS ymm1, ymmV, ymm2/m256","VFNMSUB213PS ymm2/m256, ymmV, ymm1","vfnmsub213ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 AE /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB213SD xmm1, xmmV, xmm2/m64","VFNMSUB213SD xmm2/m64, xmmV, xmm1","vfnmsub213sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 AF /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB213SS xmm1, xmmV, xmm2/m32","VFNMSUB213SS xmm2/m32, xmmV, xmm1","vfnmsub213ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 AF /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB231PD xmm1, xmmV, xmm2/m128","VFNMSUB231PD xmm2/m128, xmmV, xmm1","vfnmsub231pd xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W1 BE /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB231PD ymm1, ymmV, ymm2/m256","VFNMSUB231PD ymm2/m256, ymmV, ymm1","vfnmsub231pd ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W1 BE /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB231PS xmm1, xmmV, xmm2/m128","VFNMSUB231PS xmm2/m128, xmmV, xmm1","vfnmsub231ps xmm2/m128, xmmV, xmm1","VEX.DDS.128.66.0F38.W0 BE /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB231PS ymm1, ymmV, ymm2/m256","VFNMSUB231PS ymm2/m256, ymmV, ymm1","vfnmsub231ps ymm2/m256, ymmV, ymm1","VEX.DDS.256.66.0F38.W0 BE /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB231SD xmm1, xmmV, xmm2/m64","VFNMSUB231SD xmm2/m64, xmmV, xmm1","vfnmsub231sd xmm2/m64, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W1 BF /r","V","V","FMA","","rw,r,r","",""
+"VFNMSUB231SS xmm1, xmmV, xmm2/m32","VFNMSUB231SS xmm2/m32, xmmV, xmm1","vfnmsub231ss xmm2/m32, xmmV, xmm1","VEX.DDS.LIG.66.0F38.W0 BF /r","V","V","FMA","","rw,r,r","",""
+"VHADDPD xmm1, xmmV, xmm2/m128","VHADDPD xmm2/m128, xmmV, xmm1","vhaddpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 7C /r","V","V","AVX","","w,r,r","",""
+"VHADDPD ymm1, ymmV, ymm2/m256","VHADDPD ymm2/m256, ymmV, ymm1","vhaddpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 7C /r","V","V","AVX","","w,r,r","",""
+"VHADDPS xmm1, xmmV, xmm2/m128","VHADDPS xmm2/m128, xmmV, xmm1","vhaddps xmm2/m128, xmmV, xmm1","VEX.NDS.128.F2.0F.WIG 7C /r","V","V","AVX","","w,r,r","",""
+"VHADDPS ymm1, ymmV, ymm2/m256","VHADDPS ymm2/m256, ymmV, ymm1","vhaddps ymm2/m256, ymmV, ymm1","VEX.NDS.256.F2.0F.WIG 7C /r","V","V","AVX","","w,r,r","",""
+"VHSUBPD xmm1, xmmV, xmm2/m128","VHSUBPD xmm2/m128, xmmV, xmm1","vhsubpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 7D /r","V","V","AVX","","w,r,r","",""
+"VHSUBPD ymm1, ymmV, ymm2/m256","VHSUBPD ymm2/m256, ymmV, ymm1","vhsubpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 7D /r","V","V","AVX","","w,r,r","",""
+"VHSUBPS xmm1, xmmV, xmm2/m128","VHSUBPS xmm2/m128, xmmV, xmm1","vhsubps xmm2/m128, xmmV, xmm1","VEX.NDS.128.F2.0F.WIG 7D /r","V","V","AVX","","w,r,r","",""
+"VHSUBPS ymm1, ymmV, ymm2/m256","VHSUBPS ymm2/m256, ymmV, ymm1","vhsubps ymm2/m256, ymmV, ymm1","VEX.NDS.256.F2.0F.WIG 7D /r","V","V","AVX","","w,r,r","",""
+"VINSERTF128 ymm1, ymmV, xmm2/m128, imm8","VINSERTF128 imm8, xmm2/m128, ymmV, ymm1","vinsertf128 imm8, xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 18 /r ib","V","V","AVX","","w,r,r,r","",""
+"VINSERTI128 ymm1, ymmV, xmm2/m128, imm8","VINSERTI128 imm8, xmm2/m128, ymmV, ymm1","vinserti128 imm8, xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 38 /r ib","V","V","AVX2","","w,r,r,r","",""
+"VINSERTPS xmm1, xmmV, xmm2/m32, imm8","VINSERTPS imm8, xmm2/m32, xmmV, xmm1","vinsertps imm8, xmm2/m32, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 21 /r ib","V","V","AVX","","w,r,r,r","",""
+"VLDDQU xmm1, m128","VLDDQU m128, xmm1","vlddqu m128, xmm1","VEX.128.F2.0F.WIG F0 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VLDDQU ymm1, m256","VLDDQU m256, ymm1","vlddqu m256, ymm1","VEX.256.F2.0F.WIG F0 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VLDMXCSR m32","VLDMXCSR m32","vldmxcsr m32","VEX.LZ.0F.WIG AE /2","V","V","AVX","modrm_memonly","r","",""
+"VMASKMOVDQU xmm1, xmm2","VMASKMOVDQU xmm2, xmm1","vmaskmovdqu xmm2, xmm1","VEX.128.66.0F.WIG F7 /r","V","V","AVX","modrm_regonly","r,r","",""
+"VMASKMOVPD m128, xmmV, xmm1","VMASKMOVPD xmm1, xmmV, m128","vmaskmovpd xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W0 2F /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMASKMOVPD m256, ymmV, ymm1","VMASKMOVPD ymm1, ymmV, m256","vmaskmovpd ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W0 2F /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMASKMOVPD xmm1, xmmV, m128","VMASKMOVPD m128, xmmV, xmm1","vmaskmovpd m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 2D /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMASKMOVPD ymm1, ymmV, m256","VMASKMOVPD m256, ymmV, ymm1","vmaskmovpd m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 2D /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMASKMOVPS m128, xmmV, xmm1","VMASKMOVPS xmm1, xmmV, m128","vmaskmovps xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W0 2E /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMASKMOVPS m256, ymmV, ymm1","VMASKMOVPS ymm1, ymmV, m256","vmaskmovps ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W0 2E /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMASKMOVPS xmm1, xmmV, m128","VMASKMOVPS m128, xmmV, xmm1","vmaskmovps m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 2C /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMASKMOVPS ymm1, ymmV, m256","VMASKMOVPS m256, ymmV, ymm1","vmaskmovps m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 2C /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMAXPD xmm1, xmmV, xmm2/m128","VMAXPD xmm2/m128, xmmV, xmm1","vmaxpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
+"VMAXPD ymm1, ymmV, ymm2/m256","VMAXPD ymm2/m256, ymmV, ymm1","vmaxpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
+"VMAXPS xmm1, xmmV, xmm2/m128","VMAXPS xmm2/m128, xmmV, xmm1","vmaxps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
+"VMAXPS ymm1, ymmV, ymm2/m256","VMAXPS ymm2/m256, ymmV, ymm1","vmaxps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
+"VMAXSD xmm1, xmmV, xmm2/m64","VMAXSD xmm2/m64, xmmV, xmm1","vmaxsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
+"VMAXSS xmm1, xmmV, xmm2/m32","VMAXSS xmm2/m32, xmmV, xmm1","vmaxss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5F /r","V","V","AVX","","w,r,r","",""
+"VMINPD xmm1, xmmV, xmm2/m128","VMINPD xmm2/m128, xmmV, xmm1","vminpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
+"VMINPD ymm1, ymmV, ymm2/m256","VMINPD ymm2/m256, ymmV, ymm1","vminpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
+"VMINPS xmm1, xmmV, xmm2/m128","VMINPS xmm2/m128, xmmV, xmm1","vminps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
+"VMINPS ymm1, ymmV, ymm2/m256","VMINPS ymm2/m256, ymmV, ymm1","vminps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
+"VMINSD xmm1, xmmV, xmm2/m64","VMINSD xmm2/m64, xmmV, xmm1","vminsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
+"VMINSS xmm1, xmmV, xmm2/m32","VMINSS xmm2/m32, xmmV, xmm1","vminss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5D /r","V","V","AVX","","w,r,r","",""
+"VMOVAPD xmm1, xmm2/m128","VMOVAPD xmm2/m128, xmm1","vmovapd xmm2/m128, xmm1","VEX.128.66.0F.WIG 28 /r","V","V","AVX","","w,r","",""
+"VMOVAPD xmm2/m128, xmm1","VMOVAPD xmm1, xmm2/m128","vmovapd xmm1, xmm2/m128","VEX.128.66.0F.WIG 29 /r","V","V","AVX","","w,r","",""
+"VMOVAPD ymm1, ymm2/m256","VMOVAPD ymm2/m256, ymm1","vmovapd ymm2/m256, ymm1","VEX.256.66.0F.WIG 28 /r","V","V","AVX","","w,r","",""
+"VMOVAPD ymm2/m256, ymm1","VMOVAPD ymm1, ymm2/m256","vmovapd ymm1, ymm2/m256","VEX.256.66.0F.WIG 29 /r","V","V","AVX","","w,r","",""
+"VMOVAPS xmm1, xmm2/m128","VMOVAPS xmm2/m128, xmm1","vmovaps xmm2/m128, xmm1","VEX.128.0F.WIG 28 /r","V","V","AVX","","w,r","",""
+"VMOVAPS xmm2/m128, xmm1","VMOVAPS xmm1, xmm2/m128","vmovaps xmm1, xmm2/m128","VEX.128.0F.WIG 29 /r","V","V","AVX","","w,r","",""
+"VMOVAPS ymm1, ymm2/m256","VMOVAPS ymm2/m256, ymm1","vmovaps ymm2/m256, ymm1","VEX.256.0F.WIG 28 /r","V","V","AVX","","w,r","",""
+"VMOVAPS ymm2/m256, ymm1","VMOVAPS ymm1, ymm2/m256","vmovaps ymm1, ymm2/m256","VEX.256.0F.WIG 29 /r","V","V","AVX","","w,r","",""
+"VMOVD r/m32, xmm1","VMOVD xmm1, r/m32","vmovd xmm1, r/m32","VEX.128.66.0F.W0 7E /r","V","V","AVX","","w,r","",""
+"VMOVD xmm1, r/m32","VMOVD r/m32, xmm1","vmovd r/m32, xmm1","VEX.128.66.0F.W0 6E /r","V","V","AVX","","w,r","",""
+"VMOVDDUP xmm1, xmm2/m64","VMOVDDUP xmm2/m64, xmm1","vmovddup xmm2/m64, xmm1","VEX.128.F2.0F.WIG 12 /r","V","V","AVX","","w,r","",""
+"VMOVDDUP ymm1, ymm2/m256","VMOVDDUP ymm2/m256, ymm1","vmovddup ymm2/m256, ymm1","VEX.256.F2.0F.WIG 12 /r","V","V","AVX","","w,r","",""
+"VMOVDQA xmm1, xmm2/m128","VMOVDQA xmm2/m128, xmm1","vmovdqa xmm2/m128, xmm1","VEX.128.66.0F.WIG 6F /r","V","V","AVX","","w,r","",""
+"VMOVDQA xmm2/m128, xmm1","VMOVDQA xmm1, xmm2/m128","vmovdqa xmm1, xmm2/m128","VEX.128.66.0F.WIG 7F /r","V","V","AVX","","w,r","",""
+"VMOVDQA ymm1, ymm2/m256","VMOVDQA ymm2/m256, ymm1","vmovdqa ymm2/m256, ymm1","VEX.256.66.0F.WIG 6F /r","V","V","AVX","","w,r","",""
+"VMOVDQA ymm2/m256, ymm1","VMOVDQA ymm1, ymm2/m256","vmovdqa ymm1, ymm2/m256","VEX.256.66.0F.WIG 7F /r","V","V","AVX","","w,r","",""
+"VMOVDQU xmm1, xmm2/m128","VMOVDQU xmm2/m128, xmm1","vmovdqu xmm2/m128, xmm1","VEX.128.F3.0F.WIG 6F /r","V","V","AVX","","w,r","",""
+"VMOVDQU xmm2/m128, xmm1","VMOVDQU xmm1, xmm2/m128","vmovdqu xmm1, xmm2/m128","VEX.128.F3.0F.WIG 7F /r","V","V","AVX","","w,r","",""
+"VMOVDQU ymm1, ymm2/m256","VMOVDQU ymm2/m256, ymm1","vmovdqu ymm2/m256, ymm1","VEX.256.F3.0F.WIG 6F /r","V","V","AVX","","w,r","",""
+"VMOVDQU ymm2/m256, ymm1","VMOVDQU ymm1, ymm2/m256","vmovdqu ymm1, ymm2/m256","VEX.256.F3.0F.WIG 7F /r","V","V","AVX","","w,r","",""
+"VMOVHLPS xmm1, xmmV, xmm2","VMOVHLPS xmm2, xmmV, xmm1","vmovhlps xmm2, xmmV, xmm1","VEX.NDS.128.0F.WIG 12 /r","V","V","AVX","modrm_regonly","w,r,r","",""
+"VMOVHPD m64, xmm1","VMOVHPD xmm1, m64","vmovhpd xmm1, m64","VEX.128.66.0F.WIG 17 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVHPD xmm1, xmmV, m64","VMOVHPD m64, xmmV, xmm1","vmovhpd m64, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 16 /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMOVHPS m64, xmm1","VMOVHPS xmm1, m64","vmovhps xmm1, m64","VEX.128.0F.WIG 17 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVHPS xmm1, xmmV, m64","VMOVHPS m64, xmmV, xmm1","vmovhps m64, xmmV, xmm1","VEX.NDS.128.0F.WIG 16 /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMOVLHPS xmm1, xmmV, xmm2","VMOVLHPS xmm2, xmmV, xmm1","vmovlhps xmm2, xmmV, xmm1","VEX.NDS.128.0F.WIG 16 /r","V","V","AVX","modrm_regonly","w,r,r","",""
+"VMOVLPD m64, xmm1","VMOVLPD xmm1, m64","vmovlpd xmm1, m64","VEX.128.66.0F.WIG 13 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVLPD xmm1, xmmV, m64","VMOVLPD m64, xmmV, xmm1","vmovlpd m64, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 12 /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMOVLPS m64, xmm1","VMOVLPS xmm1, m64","vmovlps xmm1, m64","VEX.128.0F.WIG 13 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVLPS xmm1, xmmV, m64","VMOVLPS m64, xmmV, xmm1","vmovlps m64, xmmV, xmm1","VEX.NDS.128.0F.WIG 12 /r","V","V","AVX","modrm_memonly","w,r,r","",""
+"VMOVMSKPD r32, xmm2","VMOVMSKPD xmm2, r32","vmovmskpd xmm2, r32","VEX.128.66.0F.WIG 50 /r","V","V","AVX","modrm_regonly","w,r","",""
+"VMOVMSKPD r32, ymm2","VMOVMSKPD ymm2, r32","vmovmskpd ymm2, r32","VEX.256.66.0F.WIG 50 /r","V","V","AVX","modrm_regonly","w,r","",""
+"VMOVMSKPS r32, xmm2","VMOVMSKPS xmm2, r32","vmovmskps xmm2, r32","VEX.128.0F.WIG 50 /r","V","V","AVX","modrm_regonly","w,r","",""
+"VMOVMSKPS r32, ymm2","VMOVMSKPS ymm2, r32","vmovmskps ymm2, r32","VEX.256.0F.WIG 50 /r","V","V","AVX","modrm_regonly","w,r","",""
+"VMOVNTDQ m128, xmm1","VMOVNTDQ xmm1, m128","vmovntdq xmm1, m128","VEX.128.66.0F.WIG E7 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVNTDQ m256, ymm1","VMOVNTDQ ymm1, m256","vmovntdq ymm1, m256","VEX.256.66.0F.WIG E7 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVNTDQA xmm1, m128","VMOVNTDQA m128, xmm1","vmovntdqa m128, xmm1","VEX.128.66.0F38.WIG 2A /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVNTDQA ymm1, m256","VMOVNTDQA m256, ymm1","vmovntdqa m256, ymm1","VEX.256.66.0F38.WIG 2A /r","V","V","AVX2","modrm_memonly","w,r","",""
+"VMOVNTPD m128, xmm1","VMOVNTPD xmm1, m128","vmovntpd xmm1, m128","VEX.128.66.0F.WIG 2B /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVNTPD m256, ymm1","VMOVNTPD ymm1, m256","vmovntpd ymm1, m256","VEX.256.66.0F.WIG 2B /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVNTPS m128, xmm1","VMOVNTPS xmm1, m128","vmovntps xmm1, m128","VEX.128.0F.WIG 2B /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVNTPS m256, ymm1","VMOVNTPS ymm1, m256","vmovntps ymm1, m256","VEX.256.0F.WIG 2B /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVQ r/m64, xmm1","VMOVQ xmm1, r/m64","vmovq xmm1, r/m64","VEX.128.66.0F.W1 7E /r","N.E.","V","AVX","","w,r","",""
+"VMOVQ xmm1, m64","VMOVQ m64, xmm1","vmovq m64, xmm1","VEX.128.F3.0F.WIG 7E /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVQ xmm1, r/m64","VMOVQ r/m64, xmm1","vmovq r/m64, xmm1","VEX.128.66.0F.W1 6E /r","N.E.","V","AVX","","w,r","",""
+"VMOVQ xmm1, xmm2","VMOVQ xmm2, xmm1","vmovq xmm2, xmm1","VEX.128.F3.0F.WIG 7E /r","V","V","AVX","modrm_regonly","w,r","",""
+"VMOVQ xmm2/m64, xmm1","VMOVQ xmm1, xmm2/m64","vmovq xmm1, xmm2/m64","VEX.128.66.0F.WIG D6 /r","V","V","AVX","","w,r","",""
+"VMOVSD m64, xmm1","VMOVSD xmm1, m64","vmovsd xmm1, m64","VEX.LIG.F2.0F.WIG 11 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVSD xmm1, m64","VMOVSD m64, xmm1","vmovsd m64, xmm1","VEX.LIG.F2.0F.WIG 10 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVSD xmm1, xmmV, xmm2","VMOVSD xmm2, xmmV, xmm1","vmovsd xmm2, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 10 /r","V","V","AVX","modrm_regonly","w,r,r","",""
+"VMOVSD xmm2, xmmV, xmm1","VMOVSD xmm1, xmmV, xmm2","vmovsd xmm1, xmmV, xmm2","VEX.NDS.LIG.F2.0F.WIG 11 /r","V","V","AVX","modrm_regonly","w,r,r","",""
+"VMOVSHDUP xmm1, xmm2/m128","VMOVSHDUP xmm2/m128, xmm1","vmovshdup xmm2/m128, xmm1","VEX.128.F3.0F.WIG 16 /r","V","V","AVX","","w,r","",""
+"VMOVSHDUP ymm1, ymm2/m256","VMOVSHDUP ymm2/m256, ymm1","vmovshdup ymm2/m256, ymm1","VEX.256.F3.0F.WIG 16 /r","V","V","AVX","","w,r","",""
+"VMOVSLDUP xmm1, xmm2/m128","VMOVSLDUP xmm2/m128, xmm1","vmovsldup xmm2/m128, xmm1","VEX.128.F3.0F.WIG 12 /r","V","V","AVX","","w,r","",""
+"VMOVSLDUP ymm1, ymm2/m256","VMOVSLDUP ymm2/m256, ymm1","vmovsldup ymm2/m256, ymm1","VEX.256.F3.0F.WIG 12 /r","V","V","AVX","","w,r","",""
+"VMOVSS m32, xmm1","VMOVSS xmm1, m32","vmovss xmm1, m32","VEX.LIG.F3.0F.WIG 11 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVSS xmm1, m32","VMOVSS m32, xmm1","vmovss m32, xmm1","VEX.LIG.F3.0F.WIG 10 /r","V","V","AVX","modrm_memonly","w,r","",""
+"VMOVSS xmm1, xmmV, xmm2","VMOVSS xmm2, xmmV, xmm1","vmovss xmm2, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 10 /r","V","V","AVX","modrm_regonly","w,r,r","",""
+"VMOVSS xmm2, xmmV, xmm1","VMOVSS xmm1, xmmV, xmm2","vmovss xmm1, xmmV, xmm2","VEX.NDS.LIG.F3.0F.WIG 11 /r","V","V","AVX","modrm_regonly","w,r,r","",""
+"VMOVUPD xmm1, xmm2/m128","VMOVUPD xmm2/m128, xmm1","vmovupd xmm2/m128, xmm1","VEX.128.66.0F.WIG 10 /r","V","V","AVX","","w,r","",""
+"VMOVUPD xmm2/m128, xmm1","VMOVUPD xmm1, xmm2/m128","vmovupd xmm1, xmm2/m128","VEX.128.66.0F.WIG 11 /r","V","V","AVX","","w,r","",""
+"VMOVUPD ymm1, ymm2/m256","VMOVUPD ymm2/m256, ymm1","vmovupd ymm2/m256, ymm1","VEX.256.66.0F.WIG 10 /r","V","V","AVX","","w,r","",""
+"VMOVUPD ymm2/m256, ymm1","VMOVUPD ymm1, ymm2/m256","vmovupd ymm1, ymm2/m256","VEX.256.66.0F.WIG 11 /r","V","V","AVX","","w,r","",""
+"VMOVUPS xmm1, xmm2/m128","VMOVUPS xmm2/m128, xmm1","vmovups xmm2/m128, xmm1","VEX.128.0F.WIG 10 /r","V","V","AVX","","w,r","",""
+"VMOVUPS xmm2/m128, xmm1","VMOVUPS xmm1, xmm2/m128","vmovups xmm1, xmm2/m128","VEX.128.0F.WIG 11 /r","V","V","AVX","","w,r","",""
+"VMOVUPS ymm1, ymm2/m256","VMOVUPS ymm2/m256, ymm1","vmovups ymm2/m256, ymm1","VEX.256.0F.WIG 10 /r","V","V","AVX","","w,r","",""
+"VMOVUPS ymm2/m256, ymm1","VMOVUPS ymm1, ymm2/m256","vmovups ymm1, ymm2/m256","VEX.256.0F.WIG 11 /r","V","V","AVX","","w,r","",""
+"VMPSADBW xmm1, xmmV, xmm2/m128, imm8","VMPSADBW imm8, xmm2/m128, xmmV, xmm1","vmpsadbw imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 42 /r ib","V","V","AVX","","w,r,r,r","",""
+"VMPSADBW ymm1, ymmV, ymm2/m256, imm8","VMPSADBW imm8, ymm2/m256, ymmV, ymm1","vmpsadbw imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 42 /r ib","V","V","AVX2","","w,r,r,r","",""
+"VMULPD xmm1, xmmV, xmm2/m128","VMULPD xmm2/m128, xmmV, xmm1","vmulpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
+"VMULPD ymm1, ymmV, ymm2/m256","VMULPD ymm2/m256, ymmV, ymm1","vmulpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
+"VMULPS xmm1, xmmV, xmm2/m128","VMULPS xmm2/m128, xmmV, xmm1","vmulps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
+"VMULPS ymm1, ymmV, ymm2/m256","VMULPS ymm2/m256, ymmV, ymm1","vmulps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
+"VMULSD xmm1, xmmV, xmm2/m64","VMULSD xmm2/m64, xmmV, xmm1","vmulsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
+"VMULSS xmm1, xmmV, xmm2/m32","VMULSS xmm2/m32, xmmV, xmm1","vmulss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 59 /r","V","V","AVX","","w,r,r","",""
+"VORPD xmm1, xmmV, xmm2/m128","VORPD xmm2/m128, xmmV, xmm1","vorpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 56 /r","V","V","AVX","","w,r,r","",""
+"VORPD ymm1, ymmV, ymm2/m256","VORPD ymm2/m256, ymmV, ymm1","vorpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 56 /r","V","V","AVX","","w,r,r","",""
+"VORPS xmm1, xmmV, xmm2/m128","VORPS xmm2/m128, xmmV, xmm1","vorps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 56 /r","V","V","AVX","","w,r,r","",""
+"VORPS ymm1, ymmV, ymm2/m256","VORPS ymm2/m256, ymmV, ymm1","vorps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 56 /r","V","V","AVX","","w,r,r","",""
+"VPABSB xmm1, xmm2/m128","VPABSB xmm2/m128, xmm1","vpabsb xmm2/m128, xmm1","VEX.128.66.0F38.WIG 1C /r","V","V","AVX","","w,r","",""
+"VPABSB ymm1, ymm2/m256","VPABSB ymm2/m256, ymm1","vpabsb ymm2/m256, ymm1","VEX.256.66.0F38.WIG 1C /r","V","V","AVX2","","w,r","",""
+"VPABSD xmm1, xmm2/m128","VPABSD xmm2/m128, xmm1","vpabsd xmm2/m128, xmm1","VEX.128.66.0F38.WIG 1E /r","V","V","AVX","","w,r","",""
+"VPABSD ymm1, ymm2/m256","VPABSD ymm2/m256, ymm1","vpabsd ymm2/m256, ymm1","VEX.256.66.0F38.WIG 1E /r","V","V","AVX2","","w,r","",""
+"VPABSW xmm1, xmm2/m128","VPABSW xmm2/m128, xmm1","vpabsw xmm2/m128, xmm1","VEX.128.66.0F38.WIG 1D /r","V","V","AVX","","w,r","",""
+"VPABSW ymm1, ymm2/m256","VPABSW ymm2/m256, ymm1","vpabsw ymm2/m256, ymm1","VEX.256.66.0F38.WIG 1D /r","V","V","AVX2","","w,r","",""
+"VPACKSSDW xmm1, xmmV, xmm2/m128","VPACKSSDW xmm2/m128, xmmV, xmm1","vpackssdw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 6B /r","V","V","AVX","","w,r,r","",""
+"VPACKSSDW ymm1, ymmV, ymm2/m256","VPACKSSDW ymm2/m256, ymmV, ymm1","vpackssdw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 6B /r","V","V","AVX2","","w,r,r","",""
+"VPACKSSWB xmm1, xmmV, xmm2/m128","VPACKSSWB xmm2/m128, xmmV, xmm1","vpacksswb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 63 /r","V","V","AVX","","w,r,r","",""
+"VPACKSSWB ymm1, ymmV, ymm2/m256","VPACKSSWB ymm2/m256, ymmV, ymm1","vpacksswb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 63 /r","V","V","AVX2","","w,r,r","",""
+"VPACKUSDW xmm1, xmmV, xmm2/m128","VPACKUSDW xmm2/m128, xmmV, xmm1","vpackusdw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 2B /r","V","V","AVX","","w,r,r","",""
+"VPACKUSDW ymm1, ymmV, ymm2/m256","VPACKUSDW ymm2/m256, ymmV, ymm1","vpackusdw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 2B /r","V","V","AVX2","","w,r,r","",""
+"VPACKUSWB xmm1, xmmV, xmm2/m128","VPACKUSWB xmm2/m128, xmmV, xmm1","vpackuswb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 67 /r","V","V","AVX","","w,r,r","",""
+"VPACKUSWB ymm1, ymmV, ymm2/m256","VPACKUSWB ymm2/m256, ymmV, ymm1","vpackuswb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 67 /r","V","V","AVX2","","w,r,r","",""
+"VPADDB xmm1, xmmV, xmm2/m128","VPADDB xmm2/m128, xmmV, xmm1","vpaddb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FC /r","V","V","AVX","","w,r,r","",""
+"VPADDB ymm1, ymmV, ymm2/m256","VPADDB ymm2/m256, ymmV, ymm1","vpaddb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FC /r","V","V","AVX2","","w,r,r","",""
+"VPADDD xmm1, xmmV, xmm2/m128","VPADDD xmm2/m128, xmmV, xmm1","vpaddd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FE /r","V","V","AVX","","w,r,r","",""
+"VPADDD ymm1, ymmV, ymm2/m256","VPADDD ymm2/m256, ymmV, ymm1","vpaddd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FE /r","V","V","AVX2","","w,r,r","",""
+"VPADDQ xmm1, xmmV, xmm2/m128","VPADDQ xmm2/m128, xmmV, xmm1","vpaddq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D4 /r","V","V","AVX","","w,r,r","",""
+"VPADDQ ymm1, ymmV, ymm2/m256","VPADDQ ymm2/m256, ymmV, ymm1","vpaddq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D4 /r","V","V","AVX2","","w,r,r","",""
+"VPADDSB xmm1, xmmV, xmm2/m128","VPADDSB xmm2/m128, xmmV, xmm1","vpaddsb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EC /r","V","V","AVX","","w,r,r","",""
+"VPADDSB ymm1, ymmV, ymm2/m256","VPADDSB ymm2/m256, ymmV, ymm1","vpaddsb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EC /r","V","V","AVX2","","w,r,r","",""
+"VPADDSW xmm1, xmmV, xmm2/m128","VPADDSW xmm2/m128, xmmV, xmm1","vpaddsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG ED /r","V","V","AVX","","w,r,r","",""
+"VPADDSW ymm1, ymmV, ymm2/m256","VPADDSW ymm2/m256, ymmV, ymm1","vpaddsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG ED /r","V","V","AVX2","","w,r,r","",""
+"VPADDUSB xmm1, xmmV, xmm2/m128","VPADDUSB xmm2/m128, xmmV, xmm1","vpaddusb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DC /r","V","V","AVX","","w,r,r","",""
+"VPADDUSB ymm1, ymmV, ymm2/m256","VPADDUSB ymm2/m256, ymmV, ymm1","vpaddusb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DC /r","V","V","AVX2","","w,r,r","",""
+"VPADDUSW xmm1, xmmV, xmm2/m128","VPADDUSW xmm2/m128, xmmV, xmm1","vpaddusw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DD /r","V","V","AVX","","w,r,r","",""
+"VPADDUSW ymm1, ymmV, ymm2/m256","VPADDUSW ymm2/m256, ymmV, ymm1","vpaddusw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DD /r","V","V","AVX2","","w,r,r","",""
+"VPADDW xmm1, xmmV, xmm2/m128","VPADDW xmm2/m128, xmmV, xmm1","vpaddw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FD /r","V","V","AVX","","w,r,r","",""
+"VPADDW ymm1, ymmV, ymm2/m256","VPADDW ymm2/m256, ymmV, ymm1","vpaddw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FD /r","V","V","AVX2","","w,r,r","",""
+"VPALIGNR xmm1, xmmV, xmm2/m128, imm8","VPALIGNR imm8, xmm2/m128, xmmV, xmm1","vpalignr imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 0F /r ib","V","V","AVX","","w,r,r,r","",""
+"VPALIGNR ymm1, ymmV, ymm2/m256, imm8","VPALIGNR imm8, ymm2/m256, ymmV, ymm1","vpalignr imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 0F /r ib","V","V","AVX2","","w,r,r,r","",""
+"VPAND xmm1, xmmV, xmm2/m128","VPAND xmm2/m128, xmmV, xmm1","vpand xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DB /r","V","V","AVX","","w,r,r","",""
+"VPAND ymm1, ymmV, ymm2/m256","VPAND ymm2/m256, ymmV, ymm1","vpand ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DB /r","V","V","AVX2","","w,r,r","",""
+"VPANDN xmm1, xmmV, xmm2/m128","VPANDN xmm2/m128, xmmV, xmm1","vpandn xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DF /r","V","V","AVX","","w,r,r","",""
+"VPANDN ymm1, ymmV, ymm2/m256","VPANDN ymm2/m256, ymmV, ymm1","vpandn ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DF /r","V","V","AVX2","","w,r,r","",""
+"VPAVGB xmm1, xmmV, xmm2/m128","VPAVGB xmm2/m128, xmmV, xmm1","vpavgb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E0 /r","V","V","AVX","","w,r,r","",""
+"VPAVGB ymm1, ymmV, ymm2/m256","VPAVGB ymm2/m256, ymmV, ymm1","vpavgb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E0 /r","V","V","AVX2","","w,r,r","",""
+"VPAVGW xmm1, xmmV, xmm2/m128","VPAVGW xmm2/m128, xmmV, xmm1","vpavgw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E3 /r","V","V","AVX","","w,r,r","",""
+"VPAVGW ymm1, ymmV, ymm2/m256","VPAVGW ymm2/m256, ymmV, ymm1","vpavgw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E3 /r","V","V","AVX2","","w,r,r","",""
+"VPBLENDD xmm1, xmmV, xmm2/m128, imm8","VPBLENDD imm8, xmm2/m128, xmmV, xmm1","vpblendd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 02 /r ib","V","V","AVX2","","w,r,r,r","",""
+"VPBLENDD ymm1, ymmV, ymm2/m256, imm8","VPBLENDD imm8, ymm2/m256, ymmV, ymm1","vpblendd imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 02 /r ib","V","V","AVX2","","w,r,r,r","",""
+"VPBLENDVB xmm1, xmmV, xmm2/m128, xmmIH","VPBLENDVB xmmIH, xmm2/m128, xmmV, xmm1","vpblendvb xmmIH, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 4C /r /is4","V","V","AVX","","w,r,r,r","",""
+"VPBLENDVB ymm1, ymmV, ymm2/m256, ymmIH","VPBLENDVB ymmIH, ymm2/m256, ymmV, ymm1","vpblendvb ymmIH, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 4C /r /is4","V","V","AVX2","","w,r,r,r","",""
+"VPBLENDW xmm1, xmmV, xmm2/m128, imm8","VPBLENDW imm8, xmm2/m128, xmmV, xmm1","vpblendw imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 0E /r ib","V","V","AVX","","w,r,r,r","",""
+"VPBLENDW ymm1, ymmV, ymm2/m256, imm8","VPBLENDW imm8, ymm2/m256, ymmV, ymm1","vpblendw imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.WIG 0E /r ib","V","V","AVX2","","w,r,r,r","",""
+"VPBROADCASTB xmm1, xmm2/m8","VPBROADCASTB xmm2/m8, xmm1","vpbroadcastb xmm2/m8, xmm1","VEX.128.66.0F38.W0 78 /r","V","V","AVX2","","w,r","",""
+"VPBROADCASTB ymm1, xmm2/m8","VPBROADCASTB xmm2/m8, ymm1","vpbroadcastb xmm2/m8, ymm1","VEX.256.66.0F38.W0 78 /r","V","V","AVX2","","w,r","",""
+"VPBROADCASTD xmm1, xmm2/m32","VPBROADCASTD xmm2/m32, xmm1","vpbroadcastd xmm2/m32, xmm1","VEX.128.66.0F38.W0 58 /r","V","V","AVX2","","w,r","",""
+"VPBROADCASTD ymm1, xmm2/m32","VPBROADCASTD xmm2/m32, ymm1","vpbroadcastd xmm2/m32, ymm1","VEX.256.66.0F38.W0 58 /r","V","V","AVX2","","w,r","",""
+"VPBROADCASTQ xmm1, xmm2/m64","VPBROADCASTQ xmm2/m64, xmm1","vpbroadcastq xmm2/m64, xmm1","VEX.128.66.0F38.W0 59 /r","V","V","AVX2","","w,r","",""
+"VPBROADCASTQ ymm1, xmm2/m64","VPBROADCASTQ xmm2/m64, ymm1","vpbroadcastq xmm2/m64, ymm1","VEX.256.66.0F38.W0 59 /r","V","V","AVX2","","w,r","",""
+"VPBROADCASTW xmm1, xmm2/m16","VPBROADCASTW xmm2/m16, xmm1","vpbroadcastw xmm2/m16, xmm1","VEX.128.66.0F38.W0 79 /r","V","V","AVX2","","w,r","",""
+"VPBROADCASTW ymm1, xmm2/m16","VPBROADCASTW xmm2/m16, ymm1","vpbroadcastw xmm2/m16, ymm1","VEX.256.66.0F38.W0 79 /r","V","V","AVX2","","w,r","",""
+"VPCLMULQDQ xmm1, xmmV, xmm2/m128, imm8","VPCLMULQDQ imm8, xmm2/m128, xmmV, xmm1","vpclmulqdq imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F3A.WIG 44 /r ib","V","V","PCLMULQDQ+AVX","","w,r,r,r","",""
+"VPCMPEQB xmm1, xmmV, xmm2/m128","VPCMPEQB xmm2/m128, xmmV, xmm1","vpcmpeqb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 74 /r","V","V","AVX","","w,r,r","",""
+"VPCMPEQB ymm1, ymmV, ymm2/m256","VPCMPEQB ymm2/m256, ymmV, ymm1","vpcmpeqb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 74 /r","V","V","AVX2","","w,r,r","",""
+"VPCMPEQD xmm1, xmmV, xmm2/m128","VPCMPEQD xmm2/m128, xmmV, xmm1","vpcmpeqd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 76 /r","V","V","AVX","","w,r,r","",""
+"VPCMPEQD ymm1, ymmV, ymm2/m256","VPCMPEQD ymm2/m256, ymmV, ymm1","vpcmpeqd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 76 /r","V","V","AVX2","","w,r,r","",""
+"VPCMPEQQ xmm1, xmmV, xmm2/m128","VPCMPEQQ xmm2/m128, xmmV, xmm1","vpcmpeqq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 29 /r","V","V","AVX","","w,r,r","",""
+"VPCMPEQQ ymm1, ymmV, ymm2/m256","VPCMPEQQ ymm2/m256, ymmV, ymm1","vpcmpeqq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 29 /r","V","V","AVX2","","w,r,r","",""
+"VPCMPEQW xmm1, xmmV, xmm2/m128","VPCMPEQW xmm2/m128, xmmV, xmm1","vpcmpeqw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 75 /r","V","V","AVX","","w,r,r","",""
+"VPCMPEQW ymm1, ymmV, ymm2/m256","VPCMPEQW ymm2/m256, ymmV, ymm1","vpcmpeqw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 75 /r","V","V","AVX2","","w,r,r","",""
+"VPCMPESTRI xmm1, xmm2/m128, imm8","VPCMPESTRI imm8, xmm2/m128, xmm1","vpcmpestri imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 61 /r ib","V","V","AVX","","r,r,r","",""
+"VPCMPESTRM xmm1, xmm2/m128, imm8","VPCMPESTRM imm8, xmm2/m128, xmm1","vpcmpestrm imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 60 /r ib","V","V","AVX","","r,r,r","",""
+"VPCMPGTB xmm1, xmmV, xmm2/m128","VPCMPGTB xmm2/m128, xmmV, xmm1","vpcmpgtb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 64 /r","V","V","AVX","","w,r,r","",""
+"VPCMPGTB ymm1, ymmV, ymm2/m256","VPCMPGTB ymm2/m256, ymmV, ymm1","vpcmpgtb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 64 /r","V","V","AVX2","","w,r,r","",""
+"VPCMPGTD xmm1, xmmV, xmm2/m128","VPCMPGTD xmm2/m128, xmmV, xmm1","vpcmpgtd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 66 /r","V","V","AVX","","w,r,r","",""
+"VPCMPGTD ymm1, ymmV, ymm2/m256","VPCMPGTD ymm2/m256, ymmV, ymm1","vpcmpgtd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 66 /r","V","V","AVX2","","w,r,r","",""
+"VPCMPGTQ xmm1, xmmV, xmm2/m128","VPCMPGTQ xmm2/m128, xmmV, xmm1","vpcmpgtq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 37 /r","V","V","AVX","","w,r,r","",""
+"VPCMPGTQ ymm1, ymmV, ymm2/m256","VPCMPGTQ ymm2/m256, ymmV, ymm1","vpcmpgtq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 37 /r","V","V","AVX2","","w,r,r","",""
+"VPCMPGTW xmm1, xmmV, xmm2/m128","VPCMPGTW xmm2/m128, xmmV, xmm1","vpcmpgtw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 65 /r","V","V","AVX","","w,r,r","",""
+"VPCMPGTW ymm1, ymmV, ymm2/m256","VPCMPGTW ymm2/m256, ymmV, ymm1","vpcmpgtw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 65 /r","V","V","AVX2","","w,r,r","",""
+"VPCMPISTRI xmm1, xmm2/m128, imm8","VPCMPISTRI imm8, xmm2/m128, xmm1","vpcmpistri imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 63 /r ib","V","V","AVX","","r,r,r","",""
+"VPCMPISTRM xmm1, xmm2/m128, imm8","VPCMPISTRM imm8, xmm2/m128, xmm1","vpcmpistrm imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 62 /r ib","V","V","AVX","","r,r,r","",""
+"VPERM2F128 ymm1, ymmV, ymm2/m256, imm8","VPERM2F128 imm8, ymm2/m256, ymmV, ymm1","vperm2f128 imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 06 /r ib","V","V","AVX","","w,r,r,r","",""
+"VPERM2I128 ymm1, ymmV, ymm2/m256, imm8","VPERM2I128 imm8, ymm2/m256, ymmV, ymm1","vperm2i128 imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F3A.W0 46 /r ib","V","V","AVX2","","w,r,r,r","",""
+"VPERMD ymm1, ymmV, ymm2/m256","VPERMD ymm2/m256, ymmV, ymm1","vpermd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 36 /r","V","V","AVX2","","w,r,r","",""
+"VPERMILPD xmm1, xmm2/m128, imm8","VPERMILPD imm8, xmm2/m128, xmm1","vpermilpd imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.W0 05 /r ib","V","V","AVX","","w,r,r","",""
+"VPERMILPD xmm1, xmmV, xmm2/m128","VPERMILPD xmm2/m128, xmmV, xmm1","vpermilpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 0D /r","V","V","AVX","","w,r,r","",""
+"VPERMILPD ymm1, ymm2/m256, imm8","VPERMILPD imm8, ymm2/m256, ymm1","vpermilpd imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.W0 05 /r ib","V","V","AVX","","w,r,r","",""
+"VPERMILPD ymm1, ymmV, ymm2/m256","VPERMILPD ymm2/m256, ymmV, ymm1","vpermilpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 0D /r","V","V","AVX","","w,r,r","",""
+"VPERMILPS xmm1, xmm2/m128, imm8","VPERMILPS imm8, xmm2/m128, xmm1","vpermilps imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.W0 04 /r ib","V","V","AVX","","w,r,r","",""
+"VPERMILPS xmm1, xmmV, xmm2/m128","VPERMILPS xmm2/m128, xmmV, xmm1","vpermilps xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 0C /r","V","V","AVX","","w,r,r","",""
+"VPERMILPS ymm1, ymm2/m256, imm8","VPERMILPS imm8, ymm2/m256, ymm1","vpermilps imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.W0 04 /r ib","V","V","AVX","","w,r,r","",""
+"VPERMILPS ymm1, ymmV, ymm2/m256","VPERMILPS ymm2/m256, ymmV, ymm1","vpermilps ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 0C /r","V","V","AVX","","w,r,r","",""
+"VPERMPD ymm1, ymm2/m256, imm8","VPERMPD imm8, ymm2/m256, ymm1","vpermpd imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.W1 01 /r ib","V","V","AVX2","","w,r,r","",""
+"VPERMPS ymm1, ymmV, ymm2/m256","VPERMPS ymm2/m256, ymmV, ymm1","vpermps ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 16 /r","V","V","AVX2","","w,r,r","",""
+"VPERMQ ymm1, ymm2/m256, imm8","VPERMQ imm8, ymm2/m256, ymm1","vpermq imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.W1 00 /r ib","V","V","AVX2","","w,r,r","",""
+"VPEXTRB r32/m8, xmm1, imm8","VPEXTRB imm8, xmm1, r32/m8","vpextrb imm8, xmm1, r32/m8","VEX.128.66.0F3A.W0 14 /r ib","V","V","AVX","","w,r,r","",""
+"VPEXTRD r/m32, xmm1, imm8","VPEXTRD imm8, xmm1, r/m32","vpextrd imm8, xmm1, r/m32","VEX.128.66.0F3A.W0 16 /r ib","V","V","AVX","","w,r,r","",""
+"VPEXTRQ r/m64, xmm1, imm8","VPEXTRQ imm8, xmm1, r/m64","vpextrq imm8, xmm1, r/m64","VEX.128.66.0F3A.W1 16 /r ib","I","V","AVX","","w,r,r","",""
+"VPEXTRW r32, xmm2, imm8","VPEXTRW imm8, xmm2, r32","vpextrw imm8, xmm2, r32","VEX.128.66.0F.W0 C5 /r ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPEXTRW r32/m16, xmm1, imm8","VPEXTRW imm8, xmm1, r32/m16","vpextrw imm8, xmm1, r32/m16","VEX.128.66.0F3A.W0 15 /r ib","V","V","AVX","","w,r,r","",""
+"VPHADDD xmm1, xmmV, xmm2/m128","VPHADDD xmm2/m128, xmmV, xmm1","vphaddd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 02 /r","V","V","AVX","","w,r,r","",""
+"VPHADDD ymm1, ymmV, ymm2/m256","VPHADDD ymm2/m256, ymmV, ymm1","vphaddd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 02 /r","V","V","AVX2","","w,r,r","",""
+"VPHADDSW xmm1, xmmV, xmm2/m128","VPHADDSW xmm2/m128, xmmV, xmm1","vphaddsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 03 /r","V","V","AVX","","w,r,r","",""
+"VPHADDSW ymm1, ymmV, ymm2/m256","VPHADDSW ymm2/m256, ymmV, ymm1","vphaddsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 03 /r","V","V","AVX2","","w,r,r","",""
+"VPHADDW xmm1, xmmV, xmm2/m128","VPHADDW xmm2/m128, xmmV, xmm1","vphaddw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 01 /r","V","V","AVX","","w,r,r","",""
+"VPHADDW ymm1, ymmV, ymm2/m256","VPHADDW ymm2/m256, ymmV, ymm1","vphaddw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 01 /r","V","V","AVX2","","w,r,r","",""
+"VPHMINPOSUW xmm1, xmm2/m128","VPHMINPOSUW xmm2/m128, xmm1","vphminposuw xmm2/m128, xmm1","VEX.128.66.0F38.WIG 41 /r","V","V","AVX","","w,r","",""
+"VPHSUBD xmm1, xmmV, xmm2/m128","VPHSUBD xmm2/m128, xmmV, xmm1","vphsubd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 06 /r","V","V","AVX","","rw,r,r","",""
+"VPHSUBD ymm1, ymmV, ymm2/m256","VPHSUBD ymm2/m256, ymmV, ymm1","vphsubd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 06 /r","V","V","AVX2","","rw,r,r","",""
+"VPHSUBSW xmm1, xmmV, xmm2/m128","VPHSUBSW xmm2/m128, xmmV, xmm1","vphsubsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 07 /r","V","V","AVX","","rw,r,r","",""
+"VPHSUBSW ymm1, ymmV, ymm2/m256","VPHSUBSW ymm2/m256, ymmV, ymm1","vphsubsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 07 /r","V","V","AVX2","","rw,r,r","",""
+"VPHSUBW xmm1, xmmV, xmm2/m128","VPHSUBW xmm2/m128, xmmV, xmm1","vphsubw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 05 /r","V","V","AVX","","rw,r,r","",""
+"VPHSUBW ymm1, ymmV, ymm2/m256","VPHSUBW ymm2/m256, ymmV, ymm1","vphsubw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 05 /r","V","V","AVX2","","rw,r,r","",""
+"VPINSRB xmm1, xmmV, r32/m8, imm8","VPINSRB imm8, r32/m8, xmmV, xmm1","vpinsrb imm8, r32/m8, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 20 /r ib","V","V","AVX","","w,r,r,r","",""
+"VPINSRD xmm1, xmmV, r/m32, imm8","VPINSRD imm8, r/m32, xmmV, xmm1","vpinsrd imm8, r/m32, xmmV, xmm1","VEX.NDS.128.66.0F3A.W0 22 /r ib","V","V","AVX","","w,r,r,r","",""
+"VPINSRQ xmm1, xmmV, r/m64, imm8","VPINSRQ imm8, r/m64, xmmV, xmm1","vpinsrq imm8, r/m64, xmmV, xmm1","VEX.NDS.128.66.0F3A.W1 22 /r ib","I","V","AVX","","w,r,r,r","",""
+"VPINSRW xmm1, xmmV, r32/m16, imm8","VPINSRW imm8, r32/m16, xmmV, xmm1","vpinsrw imm8, r32/m16, xmmV, xmm1","VEX.NDS.128.66.0F.W0 C4 /r ib","V","V","AVX","","w,r,r,r","",""
+"VPMADDUBSW xmm1, xmmV, xmm2/m128","VPMADDUBSW xmm2/m128, xmmV, xmm1","vpmaddubsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 04 /r","V","V","AVX","","w,r,r","",""
+"VPMADDUBSW ymm1, ymmV, ymm2/m256","VPMADDUBSW ymm2/m256, ymmV, ymm1","vpmaddubsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 04 /r","V","V","AVX2","","w,r,r","",""
+"VPMADDWD xmm1, xmmV, xmm2/m128","VPMADDWD xmm2/m128, xmmV, xmm1","vpmaddwd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F5 /r","V","V","AVX","","w,r,r","",""
+"VPMADDWD ymm1, ymmV, ymm2/m256","VPMADDWD ymm2/m256, ymmV, ymm1","vpmaddwd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F5 /r","V","V","AVX2","","w,r,r","",""
+"VPMASKMOVD m128, xmmV, xmm1","VPMASKMOVD xmm1, xmmV, m128","vpmaskmovd xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W0 8E /r","V","V","AVX2","modrm_memonly","w,r,r","",""
+"VPMASKMOVD m256, ymmV, ymm1","VPMASKMOVD ymm1, ymmV, m256","vpmaskmovd ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W0 8E /r","V","V","AVX2","modrm_memonly","w,r,r","",""
+"VPMASKMOVD xmm1, xmmV, m128","VPMASKMOVD m128, xmmV, xmm1","vpmaskmovd m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 8C /r","V","V","AVX2","modrm_memonly","w,r,r","",""
+"VPMASKMOVD ymm1, ymmV, m256","VPMASKMOVD m256, ymmV, ymm1","vpmaskmovd m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 8C /r","V","V","AVX2","modrm_memonly","w,r,r","",""
+"VPMASKMOVQ m128, xmmV, xmm1","VPMASKMOVQ xmm1, xmmV, m128","vpmaskmovq xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W1 8E /r","V","V","AVX2","modrm_memonly","w,r,r","",""
+"VPMASKMOVQ m256, ymmV, ymm1","VPMASKMOVQ ymm1, ymmV, m256","vpmaskmovq ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W1 8E /r","V","V","AVX2","modrm_memonly","w,r,r","",""
+"VPMASKMOVQ xmm1, xmmV, m128","VPMASKMOVQ m128, xmmV, xmm1","vpmaskmovq m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W1 8C /r","V","V","AVX2","modrm_memonly","w,r,r","",""
+"VPMASKMOVQ ymm1, ymmV, m256","VPMASKMOVQ m256, ymmV, ymm1","vpmaskmovq m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W1 8C /r","V","V","AVX2","modrm_memonly","w,r,r","",""
+"VPMAXSB xmm1, xmmV, xmm2/m128","VPMAXSB xmm2/m128, xmmV, xmm1","vpmaxsb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3C /r","V","V","AVX","","w,r,r","",""
+"VPMAXSB ymm1, ymmV, ymm2/m256","VPMAXSB ymm2/m256, ymmV, ymm1","vpmaxsb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3C /r","V","V","AVX2","","w,r,r","",""
+"VPMAXSD xmm1, xmmV, xmm2/m128","VPMAXSD xmm2/m128, xmmV, xmm1","vpmaxsd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3D /r","V","V","AVX","","w,r,r","",""
+"VPMAXSD ymm1, ymmV, ymm2/m256","VPMAXSD ymm2/m256, ymmV, ymm1","vpmaxsd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3D /r","V","V","AVX2","","w,r,r","",""
+"VPMAXSW xmm1, xmmV, xmm2/m128","VPMAXSW xmm2/m128, xmmV, xmm1","vpmaxsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EE /r","V","V","AVX","","w,r,r","",""
+"VPMAXSW ymm1, ymmV, ymm2/m256","VPMAXSW ymm2/m256, ymmV, ymm1","vpmaxsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EE /r","V","V","AVX2","","w,r,r","",""
+"VPMAXUB xmm1, xmmV, xmm2/m128","VPMAXUB xmm2/m128, xmmV, xmm1","vpmaxub xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DE /r","V","V","AVX","","w,r,r","",""
+"VPMAXUB ymm1, ymmV, ymm2/m256","VPMAXUB ymm2/m256, ymmV, ymm1","vpmaxub ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DE /r","V","V","AVX2","","w,r,r","",""
+"VPMAXUD xmm1, xmmV, xmm2/m128","VPMAXUD xmm2/m128, xmmV, xmm1","vpmaxud xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3F /r","V","V","AVX","","w,r,r","",""
+"VPMAXUD ymm1, ymmV, ymm2/m256","VPMAXUD ymm2/m256, ymmV, ymm1","vpmaxud ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3F /r","V","V","AVX2","","w,r,r","",""
+"VPMAXUW xmm1, xmmV, xmm2/m128","VPMAXUW xmm2/m128, xmmV, xmm1","vpmaxuw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3E /r","V","V","AVX","","w,r,r","",""
+"VPMAXUW ymm1, ymmV, ymm2/m256","VPMAXUW ymm2/m256, ymmV, ymm1","vpmaxuw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3E /r","V","V","AVX2","","w,r,r","",""
+"VPMINSB xmm1, xmmV, xmm2/m128","VPMINSB xmm2/m128, xmmV, xmm1","vpminsb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 38 /r","V","V","AVX","","w,r,r","",""
+"VPMINSB ymm1, ymmV, ymm2/m256","VPMINSB ymm2/m256, ymmV, ymm1","vpminsb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 38 /r","V","V","AVX2","","w,r,r","",""
+"VPMINSD xmm1, xmmV, xmm2/m128","VPMINSD xmm2/m128, xmmV, xmm1","vpminsd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 39 /r","V","V","AVX","","w,r,r","",""
+"VPMINSD ymm1, ymmV, ymm2/m256","VPMINSD ymm2/m256, ymmV, ymm1","vpminsd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 39 /r","V","V","AVX2","","w,r,r","",""
+"VPMINSW xmm1, xmmV, xmm2/m128","VPMINSW xmm2/m128, xmmV, xmm1","vpminsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EA /r","V","V","AVX","","w,r,r","",""
+"VPMINSW ymm1, ymmV, ymm2/m256","VPMINSW ymm2/m256, ymmV, ymm1","vpminsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EA /r","V","V","AVX2","","w,r,r","",""
+"VPMINUB xmm1, xmmV, xmm2/m128","VPMINUB xmm2/m128, xmmV, xmm1","vpminub xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG DA /r","V","V","AVX","","w,r,r","",""
+"VPMINUB ymm1, ymmV, ymm2/m256","VPMINUB ymm2/m256, ymmV, ymm1","vpminub ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG DA /r","V","V","AVX2","","w,r,r","",""
+"VPMINUD xmm1, xmmV, xmm2/m128","VPMINUD xmm2/m128, xmmV, xmm1","vpminud xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3B /r","V","V","AVX","","w,r,r","",""
+"VPMINUD ymm1, ymmV, ymm2/m256","VPMINUD ymm2/m256, ymmV, ymm1","vpminud ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3B /r","V","V","AVX2","","w,r,r","",""
+"VPMINUW xmm1, xmmV, xmm2/m128","VPMINUW xmm2/m128, xmmV, xmm1","vpminuw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 3A /r","V","V","AVX","","w,r,r","",""
+"VPMINUW ymm1, ymmV, ymm2/m256","VPMINUW ymm2/m256, ymmV, ymm1","vpminuw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 3A /r","V","V","AVX2","","w,r,r","",""
+"VPMOVMSKB r32, xmm2","VPMOVMSKB xmm2, r32","vpmovmskb xmm2, r32","VEX.128.66.0F.WIG D7 /r","V","V","AVX","modrm_regonly","w,r","",""
+"VPMOVMSKB r32, ymm2","VPMOVMSKB ymm2, r32","vpmovmskb ymm2, r32","VEX.256.66.0F.WIG D7 /r","V","V","AVX2","modrm_regonly","w,r","",""
+"VPMOVSXBD xmm1, xmm2/m32","VPMOVSXBD xmm2/m32, xmm1","vpmovsxbd xmm2/m32, xmm1","VEX.128.66.0F38.WIG 21 /r","V","V","AVX","","w,r","",""
+"VPMOVSXBD ymm1, xmm2/m64","VPMOVSXBD xmm2/m64, ymm1","vpmovsxbd xmm2/m64, ymm1","VEX.256.66.0F38.WIG 21 /r","V","V","AVX2","","w,r","",""
+"VPMOVSXBQ xmm1, xmm2/m16","VPMOVSXBQ xmm2/m16, xmm1","vpmovsxbq xmm2/m16, xmm1","VEX.128.66.0F38.WIG 22 /r","V","V","AVX","","w,r","",""
+"VPMOVSXBQ ymm1, xmm2/m32","VPMOVSXBQ xmm2/m32, ymm1","vpmovsxbq xmm2/m32, ymm1","VEX.256.66.0F38.WIG 22 /r","V","V","AVX2","","w,r","",""
+"VPMOVSXBW xmm1, xmm2/m64","VPMOVSXBW xmm2/m64, xmm1","vpmovsxbw xmm2/m64, xmm1","VEX.128.66.0F38.WIG 20 /r","V","V","AVX","","w,r","",""
+"VPMOVSXBW ymm1, xmm2/m128","VPMOVSXBW xmm2/m128, ymm1","vpmovsxbw xmm2/m128, ymm1","VEX.256.66.0F38.WIG 20 /r","V","V","AVX2","","w,r","",""
+"VPMOVSXDQ xmm1, xmm2/m64","VPMOVSXDQ xmm2/m64, xmm1","vpmovsxdq xmm2/m64, xmm1","VEX.128.66.0F38.WIG 25 /r","V","V","AVX","","w,r","",""
+"VPMOVSXDQ ymm1, xmm2/m128","VPMOVSXDQ xmm2/m128, ymm1","vpmovsxdq xmm2/m128, ymm1","VEX.256.66.0F38.WIG 25 /r","V","V","AVX2","","w,r","",""
+"VPMOVSXWD xmm1, xmm2/m64","VPMOVSXWD xmm2/m64, xmm1","vpmovsxwd xmm2/m64, xmm1","VEX.128.66.0F38.WIG 23 /r","V","V","AVX","","w,r","",""
+"VPMOVSXWD ymm1, xmm2/m128","VPMOVSXWD xmm2/m128, ymm1","vpmovsxwd xmm2/m128, ymm1","VEX.256.66.0F38.WIG 23 /r","V","V","AVX2","","w,r","",""
+"VPMOVSXWQ xmm1, xmm2/m32","VPMOVSXWQ xmm2/m32, xmm1","vpmovsxwq xmm2/m32, xmm1","VEX.128.66.0F38.WIG 24 /r","V","V","AVX","","w,r","",""
+"VPMOVSXWQ ymm1, xmm2/m64","VPMOVSXWQ xmm2/m64, ymm1","vpmovsxwq xmm2/m64, ymm1","VEX.256.66.0F38.WIG 24 /r","V","V","AVX2","","w,r","",""
+"VPMOVZXBD xmm1, xmm2/m32","VPMOVZXBD xmm2/m32, xmm1","vpmovzxbd xmm2/m32, xmm1","VEX.128.66.0F38.WIG 31 /r","V","V","AVX","","w,r","",""
+"VPMOVZXBD ymm1, xmm2/m64","VPMOVZXBD xmm2/m64, ymm1","vpmovzxbd xmm2/m64, ymm1","VEX.256.66.0F38.WIG 31 /r","V","V","AVX2","","w,r","",""
+"VPMOVZXBQ xmm1, xmm2/m16","VPMOVZXBQ xmm2/m16, xmm1","vpmovzxbq xmm2/m16, xmm1","VEX.128.66.0F38.WIG 32 /r","V","V","AVX","","w,r","",""
+"VPMOVZXBQ ymm1, xmm2/m32","VPMOVZXBQ xmm2/m32, ymm1","vpmovzxbq xmm2/m32, ymm1","VEX.256.66.0F38.WIG 32 /r","V","V","AVX2","","w,r","",""
+"VPMOVZXBW xmm1, xmm2/m64","VPMOVZXBW xmm2/m64, xmm1","vpmovzxbw xmm2/m64, xmm1","VEX.128.66.0F38.WIG 30 /r","V","V","AVX","","w,r","",""
+"VPMOVZXBW ymm1, xmm2/m128","VPMOVZXBW xmm2/m128, ymm1","vpmovzxbw xmm2/m128, ymm1","VEX.256.66.0F38.WIG 30 /r","V","V","AVX2","","w,r","",""
+"VPMOVZXDQ xmm1, xmm2/m64","VPMOVZXDQ xmm2/m64, xmm1","vpmovzxdq xmm2/m64, xmm1","VEX.128.66.0F38.WIG 35 /r","V","V","AVX","","w,r","",""
+"VPMOVZXDQ ymm1, xmm2/m128","VPMOVZXDQ xmm2/m128, ymm1","vpmovzxdq xmm2/m128, ymm1","VEX.256.66.0F38.WIG 35 /r","V","V","AVX2","","w,r","",""
+"VPMOVZXWD xmm1, xmm2/m64","VPMOVZXWD xmm2/m64, xmm1","vpmovzxwd xmm2/m64, xmm1","VEX.128.66.0F38.WIG 33 /r","V","V","AVX","","w,r","",""
+"VPMOVZXWD ymm1, xmm2/m128","VPMOVZXWD xmm2/m128, ymm1","vpmovzxwd xmm2/m128, ymm1","VEX.256.66.0F38.WIG 33 /r","V","V","AVX2","","w,r","",""
+"VPMOVZXWQ xmm1, xmm2/m32","VPMOVZXWQ xmm2/m32, xmm1","vpmovzxwq xmm2/m32, xmm1","VEX.128.66.0F38.WIG 34 /r","V","V","AVX","","w,r","",""
+"VPMOVZXWQ ymm1, xmm2/m64","VPMOVZXWQ xmm2/m64, ymm1","vpmovzxwq xmm2/m64, ymm1","VEX.256.66.0F38.WIG 34 /r","V","V","AVX2","","w,r","",""
+"VPMULDQ xmm1, xmmV, xmm2/m128","VPMULDQ xmm2/m128, xmmV, xmm1","vpmuldq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 28 /r","V","V","AVX","","w,r,r","",""
+"VPMULDQ ymm1, ymmV, ymm2/m256","VPMULDQ ymm2/m256, ymmV, ymm1","vpmuldq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 28 /r","V","V","AVX2","","w,r,r","",""
+"VPMULHRSW xmm1, xmmV, xmm2/m128","VPMULHRSW xmm2/m128, xmmV, xmm1","vpmulhrsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 0B /r","V","V","AVX","","w,r,r","",""
+"VPMULHRSW ymm1, ymmV, ymm2/m256","VPMULHRSW ymm2/m256, ymmV, ymm1","vpmulhrsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 0B /r","V","V","AVX2","","w,r,r","",""
+"VPMULHUW xmm1, xmmV, xmm2/m128","VPMULHUW xmm2/m128, xmmV, xmm1","vpmulhuw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E4 /r","V","V","AVX","","w,r,r","",""
+"VPMULHUW ymm1, ymmV, ymm2/m256","VPMULHUW ymm2/m256, ymmV, ymm1","vpmulhuw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E4 /r","V","V","AVX2","","w,r,r","",""
+"VPMULHW xmm1, xmmV, xmm2/m128","VPMULHW xmm2/m128, xmmV, xmm1","vpmulhw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E5 /r","V","V","AVX","","w,r,r","",""
+"VPMULHW ymm1, ymmV, ymm2/m256","VPMULHW ymm2/m256, ymmV, ymm1","vpmulhw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E5 /r","V","V","AVX2","","w,r,r","",""
+"VPMULLD xmm1, xmmV, xmm2/m128","VPMULLD xmm2/m128, xmmV, xmm1","vpmulld xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 40 /r","V","V","AVX","","w,r,r","",""
+"VPMULLD ymm1, ymmV, ymm2/m256","VPMULLD ymm2/m256, ymmV, ymm1","vpmulld ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 40 /r","V","V","AVX2","","w,r,r","",""
+"VPMULLW xmm1, xmmV, xmm2/m128","VPMULLW xmm2/m128, xmmV, xmm1","vpmullw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D5 /r","V","V","AVX","","w,r,r","",""
+"VPMULLW ymm1, ymmV, ymm2/m256","VPMULLW ymm2/m256, ymmV, ymm1","vpmullw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D5 /r","V","V","AVX2","","w,r,r","",""
+"VPMULUDQ xmm1, xmmV, xmm2/m128","VPMULUDQ xmm2/m128, xmmV, xmm1","vpmuludq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F4 /r","V","V","AVX","","w,r,r","",""
+"VPMULUDQ ymm1, ymmV, ymm2/m256","VPMULUDQ ymm2/m256, ymmV, ymm1","vpmuludq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F4 /r","V","V","AVX2","","w,r,r","",""
+"VPOR xmm1, xmmV, xmm2/m128","VPOR xmm2/m128, xmmV, xmm1","vpor xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EB /r","V","V","AVX","","w,r,r","",""
+"VPOR ymm1, ymmV, ymm2/m256","VPOR ymm2/m256, ymmV, ymm1","vpor ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EB /r","V","V","AVX2","","w,r,r","",""
+"VPSADBW xmm1, xmmV, xmm2/m128","VPSADBW xmm2/m128, xmmV, xmm1","vpsadbw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F6 /r","V","V","AVX","","w,r,r","",""
+"VPSADBW ymm1, ymmV, ymm2/m256","VPSADBW ymm2/m256, ymmV, ymm1","vpsadbw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F6 /r","V","V","AVX2","","w,r,r","",""
+"VPSHUFB xmm1, xmmV, xmm2/m128","VPSHUFB xmm2/m128, xmmV, xmm1","vpshufb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 00 /r","V","V","AVX","","w,r,r","",""
+"VPSHUFB ymm1, ymmV, ymm2/m256","VPSHUFB ymm2/m256, ymmV, ymm1","vpshufb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 00 /r","V","V","AVX2","","w,r,r","",""
+"VPSHUFD xmm1, xmm2/m128, imm8","VPSHUFD imm8, xmm2/m128, xmm1","vpshufd imm8, xmm2/m128, xmm1","VEX.128.66.0F.WIG 70 /r ib","V","V","AVX","","w,r,r","",""
+"VPSHUFD ymm1, ymm2/m256, imm8","VPSHUFD imm8, ymm2/m256, ymm1","vpshufd imm8, ymm2/m256, ymm1","VEX.256.66.0F.WIG 70 /r ib","V","V","AVX2","","w,r,r","",""
+"VPSHUFHW xmm1, xmm2/m128, imm8","VPSHUFHW imm8, xmm2/m128, xmm1","vpshufhw imm8, xmm2/m128, xmm1","VEX.128.F3.0F.WIG 70 /r ib","V","V","AVX","","w,r,r","",""
+"VPSHUFHW ymm1, ymm2/m256, imm8","VPSHUFHW imm8, ymm2/m256, ymm1","vpshufhw imm8, ymm2/m256, ymm1","VEX.256.F3.0F.WIG 70 /r ib","V","V","AVX2","","w,r,r","",""
+"VPSHUFLW xmm1, xmm2/m128, imm8","VPSHUFLW imm8, xmm2/m128, xmm1","vpshuflw imm8, xmm2/m128, xmm1","VEX.128.F2.0F.WIG 70 /r ib","V","V","AVX","","w,r,r","",""
+"VPSHUFLW ymm1, ymm2/m256, imm8","VPSHUFLW imm8, ymm2/m256, ymm1","vpshuflw imm8, ymm2/m256, ymm1","VEX.256.F2.0F.WIG 70 /r ib","V","V","AVX2","","w,r,r","",""
+"VPSIGNB xmm1, xmmV, xmm2/m128","VPSIGNB xmm2/m128, xmmV, xmm1","vpsignb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 08 /r","V","V","AVX","","w,r,r","",""
+"VPSIGNB ymm1, ymmV, ymm2/m256","VPSIGNB ymm2/m256, ymmV, ymm1","vpsignb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 08 /r","V","V","AVX2","","w,r,r","",""
+"VPSIGND xmm1, xmmV, xmm2/m128","VPSIGND xmm2/m128, xmmV, xmm1","vpsignd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 0A /r","V","V","AVX","","w,r,r","",""
+"VPSIGND ymm1, ymmV, ymm2/m256","VPSIGND ymm2/m256, ymmV, ymm1","vpsignd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 0A /r","V","V","AVX2","","w,r,r","",""
+"VPSIGNW xmm1, xmmV, xmm2/m128","VPSIGNW xmm2/m128, xmmV, xmm1","vpsignw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.WIG 09 /r","V","V","AVX","","w,r,r","",""
+"VPSIGNW ymm1, ymmV, ymm2/m256","VPSIGNW ymm2/m256, ymmV, ymm1","vpsignw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.WIG 09 /r","V","V","AVX2","","w,r,r","",""
+"VPSLLD xmm1, xmmV, xmm2/m128","VPSLLD xmm2/m128, xmmV, xmm1","vpslld xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F2 /r","V","V","AVX","","w,r,r","",""
+"VPSLLD xmmV, xmm2, imm8","VPSLLD imm8, xmm2, xmmV","vpslld imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 72 /6 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSLLDQ xmmV, xmm2, imm8","VPSLLDQ imm8, xmm2, xmmV","vpslldq imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 73 /7 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSLLDQ ymmV, ymm2, imm8","VPSLLDQ imm8, ymm2, ymmV","vpslldq imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 73 /7 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
+"VPSLLQ xmm1, xmmV, xmm2/m128","VPSLLQ xmm2/m128, xmmV, xmm1","vpsllq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F3 /r","V","V","AVX","","w,r,r","",""
+"VPSLLQ xmmV, xmm2, imm8","VPSLLQ imm8, xmm2, xmmV","vpsllq imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 73 /6 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSLLVD xmm1, xmmV, xmm2/m128","VPSLLVD xmm2/m128, xmmV, xmm1","vpsllvd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 47 /r","V","V","AVX2","","w,r,r","",""
+"VPSLLVD ymm1, ymmV, ymm2/m256","VPSLLVD ymm2/m256, ymmV, ymm1","vpsllvd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 47 /r","V","V","AVX2","","w,r,r","",""
+"VPSLLVQ xmm1, xmmV, xmm2/m128","VPSLLVQ xmm2/m128, xmmV, xmm1","vpsllvq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W1 47 /r","V","V","AVX2","","w,r,r","",""
+"VPSLLVQ ymm1, ymmV, ymm2/m256","VPSLLVQ ymm2/m256, ymmV, ymm1","vpsllvq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W1 47 /r","V","V","AVX2","","w,r,r","",""
+"VPSLLW xmm1, xmmV, xmm2/m128","VPSLLW xmm2/m128, xmmV, xmm1","vpsllw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F1 /r","V","V","AVX","","w,r,r","",""
+"VPSLLW xmmV, xmm2, imm8","VPSLLW imm8, xmm2, xmmV","vpsllw imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 71 /6 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSLLW ymm1, ymmV, xmm2/m128","VPSLLW xmm2/m128, ymmV, ymm1","vpsllw xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F1 /r","V","V","AVX2","","w,r,r","",""
+"VPSLLW ymmV, ymm2, imm8","VPSLLW imm8, ymm2, ymmV","vpsllw imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 71 /6 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
+"VPSRAD xmm1, xmmV, xmm2/m128","VPSRAD xmm2/m128, xmmV, xmm1","vpsrad xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E2 /r","V","V","AVX","","w,r,r","",""
+"VPSRAD xmmV, xmm2, imm8","VPSRAD imm8, xmm2, xmmV","vpsrad imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 72 /4 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSRAD ymm1, ymmV, xmm2/m128","VPSRAD xmm2/m128, ymmV, ymm1","vpsrad xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E2 /r","V","V","AVX2","","w,r,r","",""
+"VPSRAD ymmV, ymm2, imm8","VPSRAD imm8, ymm2, ymmV","vpsrad imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 72 /4 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
+"VPSRAVD xmm1, xmmV, xmm2/m128","VPSRAVD xmm2/m128, xmmV, xmm1","vpsravd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 46 /r","V","V","AVX2","","w,r,r","",""
+"VPSRAVD ymm1, ymmV, ymm2/m256","VPSRAVD ymm2/m256, ymmV, ymm1","vpsravd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 46 /r","V","V","AVX2","","w,r,r","",""
+"VPSRAW xmm1, xmmV, xmm2/m128","VPSRAW xmm2/m128, xmmV, xmm1","vpsraw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E1 /r","V","V","AVX","","w,r,r","",""
+"VPSRAW xmmV, xmm2, imm8","VPSRAW imm8, xmm2, xmmV","vpsraw imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 71 /4 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSRAW ymm1, ymmV, xmm2/m128","VPSRAW xmm2/m128, ymmV, ymm1","vpsraw xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E1 /r","V","V","AVX2","","w,r,r","",""
+"VPSRAW ymmV, ymm2, imm8","VPSRAW imm8, ymm2, ymmV","vpsraw imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 71 /4 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
+"VPSRLD xmm1, xmmV, xmm2/m128","VPSRLD xmm2/m128, xmmV, xmm1","vpsrld xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D2 /r","V","V","AVX","","w,r,r","",""
+"VPSRLD xmmV, xmm2, imm8","VPSRLD imm8, xmm2, xmmV","vpsrld imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 72 /2 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSRLDQ xmmV, xmm2, imm8","VPSRLDQ imm8, xmm2, xmmV","vpsrldq imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 73 /3 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSRLDQ ymmV, ymm2, imm8","VPSRLDQ imm8, ymm2, ymmV","vpsrldq imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 73 /3 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
+"VPSRLQ xmm1, xmmV, xmm2/m128","VPSRLQ xmm2/m128, xmmV, xmm1","vpsrlq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D3 /r","V","V","AVX","","w,r,r","",""
+"VPSRLQ xmmV, xmm2, imm8","VPSRLQ imm8, xmm2, xmmV","vpsrlq imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 73 /2 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSRLVD xmm1, xmmV, xmm2/m128","VPSRLVD xmm2/m128, xmmV, xmm1","vpsrlvd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 45 /r","V","V","AVX2","","w,r,r","",""
+"VPSRLVD ymm1, ymmV, ymm2/m256","VPSRLVD ymm2/m256, ymmV, ymm1","vpsrlvd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 45 /r","V","V","AVX2","","w,r,r","",""
+"VPSRLVQ xmm1, xmmV, xmm2/m128","VPSRLVQ xmm2/m128, xmmV, xmm1","vpsrlvq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W1 45 /r","V","V","AVX2","","w,r,r","",""
+"VPSRLVQ ymm1, ymmV, ymm2/m256","VPSRLVQ ymm2/m256, ymmV, ymm1","vpsrlvq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W1 45 /r","V","V","AVX2","","w,r,r","",""
+"VPSRLW xmm1, xmmV, xmm2/m128","VPSRLW xmm2/m128, xmmV, xmm1","vpsrlw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D1 /r","V","V","AVX","","w,r,r","",""
+"VPSRLW xmmV, xmm2, imm8","VPSRLW imm8, xmm2, xmmV","vpsrlw imm8, xmm2, xmmV","VEX.NDD.128.66.0F.WIG 71 /2 ib","V","V","AVX","modrm_regonly","w,r,r","",""
+"VPSRLW ymm1, ymmV, xmm2/m128","VPSRLW xmm2/m128, ymmV, ymm1","vpsrlw xmm2/m128, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D1 /r","V","V","AVX2","","w,r,r","",""
+"VPSRLW ymmV, ymm2, imm8","VPSRLW imm8, ymm2, ymmV","vpsrlw imm8, ymm2, ymmV","VEX.NDD.256.66.0F.WIG 71 /2 ib","V","V","AVX2","modrm_regonly","w,r,r","",""
+"VPSUBB xmm1, xmmV, xmm2/m128","VPSUBB xmm2/m128, xmmV, xmm1","vpsubb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F8 /r","V","V","AVX","","w,r,r","",""
+"VPSUBB ymm1, ymmV, ymm2/m256","VPSUBB ymm2/m256, ymmV, ymm1","vpsubb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F8 /r","V","V","AVX2","","w,r,r","",""
+"VPSUBD xmm1, xmmV, xmm2/m128","VPSUBD xmm2/m128, xmmV, xmm1","vpsubd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FA /r","V","V","AVX","","w,r,r","",""
+"VPSUBD ymm1, ymmV, ymm2/m256","VPSUBD ymm2/m256, ymmV, ymm1","vpsubd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FA /r","V","V","AVX2","","w,r,r","",""
+"VPSUBQ xmm1, xmmV, xmm2/m128","VPSUBQ xmm2/m128, xmmV, xmm1","vpsubq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG FB /r","V","V","AVX","","w,r,r","",""
+"VPSUBQ ymm1, ymmV, ymm2/m256","VPSUBQ ymm2/m256, ymmV, ymm1","vpsubq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG FB /r","V","V","AVX2","","w,r,r","",""
+"VPSUBSB xmm1, xmmV, xmm2/m128","VPSUBSB xmm2/m128, xmmV, xmm1","vpsubsb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E8 /r","V","V","AVX","","w,r,r","",""
+"VPSUBSB ymm1, ymmV, ymm2/m256","VPSUBSB ymm2/m256, ymmV, ymm1","vpsubsb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E8 /r","V","V","AVX2","","w,r,r","",""
+"VPSUBSW xmm1, xmmV, xmm2/m128","VPSUBSW xmm2/m128, xmmV, xmm1","vpsubsw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG E9 /r","V","V","AVX","","w,r,r","",""
+"VPSUBSW ymm1, ymmV, ymm2/m256","VPSUBSW ymm2/m256, ymmV, ymm1","vpsubsw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG E9 /r","V","V","AVX2","","w,r,r","",""
+"VPSUBUSB xmm1, xmmV, xmm2/m128","VPSUBUSB xmm2/m128, xmmV, xmm1","vpsubusb xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D8 /r","V","V","AVX","","w,r,r","",""
+"VPSUBUSB ymm1, ymmV, ymm2/m256","VPSUBUSB ymm2/m256, ymmV, ymm1","vpsubusb ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D8 /r","V","V","AVX2","","w,r,r","",""
+"VPSUBUSW xmm1, xmmV, xmm2/m128","VPSUBUSW xmm2/m128, xmmV, xmm1","vpsubusw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG D9 /r","V","V","AVX","","w,r,r","",""
+"VPSUBUSW ymm1, ymmV, ymm2/m256","VPSUBUSW ymm2/m256, ymmV, ymm1","vpsubusw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG D9 /r","V","V","AVX2","","w,r,r","",""
+"VPSUBW xmm1, xmmV, xmm2/m128","VPSUBW xmm2/m128, xmmV, xmm1","vpsubw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG F9 /r","V","V","AVX","","w,r,r","",""
+"VPSUBW ymm1, ymmV, ymm2/m256","VPSUBW ymm2/m256, ymmV, ymm1","vpsubw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG F9 /r","V","V","AVX2","","w,r,r","",""
+"VPTEST xmm1, xmm2/m128","VPTEST xmm2/m128, xmm1","vptest xmm2/m128, xmm1","VEX.128.66.0F38.WIG 17 /r","V","V","AVX","","r,r","",""
+"VPTEST ymm1, ymm2/m256","VPTEST ymm2/m256, ymm1","vptest ymm2/m256, ymm1","VEX.256.66.0F38.WIG 17 /r","V","V","AVX","","r,r","",""
+"VPUNPCKHBW xmm1, xmmV, xmm2/m128","VPUNPCKHBW xmm2/m128, xmmV, xmm1","vpunpckhbw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 68 /r","V","V","AVX","","w,r,r","",""
+"VPUNPCKHBW ymm1, ymmV, ymm2/m256","VPUNPCKHBW ymm2/m256, ymmV, ymm1","vpunpckhbw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 68 /r","V","V","AVX2","","w,r,r","",""
+"VPUNPCKHDQ xmm1, xmmV, xmm2/m128","VPUNPCKHDQ xmm2/m128, xmmV, xmm1","vpunpckhdq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 6A /r","V","V","AVX","","w,r,r","",""
+"VPUNPCKHDQ ymm1, ymmV, ymm2/m256","VPUNPCKHDQ ymm2/m256, ymmV, ymm1","vpunpckhdq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 6A /r","V","V","AVX2","","w,r,r","",""
+"VPUNPCKHQDQ xmm1, xmmV, xmm2/m128","VPUNPCKHQDQ xmm2/m128, xmmV, xmm1","vpunpckhqdq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 6D /r","V","V","AVX","","w,r,r","",""
+"VPUNPCKHQDQ ymm1, ymmV, ymm2/m256","VPUNPCKHQDQ ymm2/m256, ymmV, ymm1","vpunpckhqdq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 6D /r","V","V","AVX2","","w,r,r","",""
+"VPUNPCKHWD xmm1, xmmV, xmm2/m128","VPUNPCKHWD xmm2/m128, xmmV, xmm1","vpunpckhwd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 69 /r","V","V","AVX","","w,r,r","",""
+"VPUNPCKHWD ymm1, ymmV, ymm2/m256","VPUNPCKHWD ymm2/m256, ymmV, ymm1","vpunpckhwd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 69 /r","V","V","AVX2","","w,r,r","",""
+"VPUNPCKLBW xmm1, xmmV, xmm2/m128","VPUNPCKLBW xmm2/m128, xmmV, xmm1","vpunpcklbw xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 60 /r","V","V","AVX","","w,r,r","",""
+"VPUNPCKLBW ymm1, ymmV, ymm2/m256","VPUNPCKLBW ymm2/m256, ymmV, ymm1","vpunpcklbw ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 60 /r","V","V","AVX2","","w,r,r","",""
+"VPUNPCKLDQ xmm1, xmmV, xmm2/m128","VPUNPCKLDQ xmm2/m128, xmmV, xmm1","vpunpckldq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 62 /r","V","V","AVX","","w,r,r","",""
+"VPUNPCKLDQ ymm1, ymmV, ymm2/m256","VPUNPCKLDQ ymm2/m256, ymmV, ymm1","vpunpckldq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 62 /r","V","V","AVX2","","w,r,r","",""
+"VPUNPCKLQDQ xmm1, xmmV, xmm2/m128","VPUNPCKLQDQ xmm2/m128, xmmV, xmm1","vpunpcklqdq xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 6C /r","V","V","AVX","","w,r,r","",""
+"VPUNPCKLQDQ ymm1, ymmV, ymm2/m256","VPUNPCKLQDQ ymm2/m256, ymmV, ymm1","vpunpcklqdq ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 6C /r","V","V","AVX2","","w,r,r","",""
+"VPUNPCKLWD xmm1, xmmV, xmm2/m128","VPUNPCKLWD xmm2/m128, xmmV, xmm1","vpunpcklwd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 61 /r","V","V","AVX","","w,r,r","",""
+"VPUNPCKLWD ymm1, ymmV, ymm2/m256","VPUNPCKLWD ymm2/m256, ymmV, ymm1","vpunpcklwd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 61 /r","V","V","AVX2","","w,r,r","",""
+"VPXOR xmm1, xmmV, xmm2/m128","VPXOR xmm2/m128, xmmV, xmm1","vpxor xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG EF /r","V","V","AVX","","w,r,r","",""
+"VPXOR ymm1, ymmV, ymm2/m256","VPXOR ymm2/m256, ymmV, ymm1","vpxor ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG EF /r","V","V","AVX2","","w,r,r","",""
+"VRCPPS xmm1, xmm2/m128","VRCPPS xmm2/m128, xmm1","vrcpps xmm2/m128, xmm1","VEX.128.0F.WIG 53 /r","V","V","AVX","","w,r","",""
+"VRCPPS ymm1, ymm2/m256","VRCPPS ymm2/m256, ymm1","vrcpps ymm2/m256, ymm1","VEX.256.0F.WIG 53 /r","V","V","AVX","","w,r","",""
+"VRCPSS xmm1, xmmV, xmm2/m32","VRCPSS xmm2/m32, xmmV, xmm1","vrcpss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 53 /r","V","V","AVX","","w,r,r","",""
+"VROUNDPD xmm1, xmm2/m128, imm8","VROUNDPD imm8, xmm2/m128, xmm1","vroundpd imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 09 /r ib","V","V","AVX","","w,r,r","",""
+"VROUNDPD ymm1, ymm2/m256, imm8","VROUNDPD imm8, ymm2/m256, ymm1","vroundpd imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.WIG 09 /r ib","V","V","AVX","","w,r,r","",""
+"VROUNDPS xmm1, xmm2/m128, imm8","VROUNDPS imm8, xmm2/m128, xmm1","vroundps imm8, xmm2/m128, xmm1","VEX.128.66.0F3A.WIG 08 /r ib","V","V","AVX","","w,r,r","",""
+"VROUNDPS ymm1, ymm2/m256, imm8","VROUNDPS imm8, ymm2/m256, ymm1","vroundps imm8, ymm2/m256, ymm1","VEX.256.66.0F3A.WIG 08 /r ib","V","V","AVX","","w,r,r","",""
+"VROUNDSD xmm1, xmmV, xmm2/m64, imm8","VROUNDSD imm8, xmm2/m64, xmmV, xmm1","vroundsd imm8, xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.66.0F3A.WIG 0B /r ib","V","V","AVX","","w,r,r,r","",""
+"VROUNDSS xmm1, xmmV, xmm2/m32, imm8","VROUNDSS imm8, xmm2/m32, xmmV, xmm1","vroundss imm8, xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.66.0F3A.WIG 0A /r ib","V","V","AVX","","w,r,r,r","",""
+"VRSQRTPS xmm1, xmm2/m128","VRSQRTPS xmm2/m128, xmm1","vrsqrtps xmm2/m128, xmm1","VEX.128.0F.WIG 52 /r","V","V","AVX","","w,r","",""
+"VRSQRTPS ymm1, ymm2/m256","VRSQRTPS ymm2/m256, ymm1","vrsqrtps ymm2/m256, ymm1","VEX.256.0F.WIG 52 /r","V","V","AVX","","w,r","",""
+"VRSQRTSS xmm1, xmmV, xmm2/m32","VRSQRTSS xmm2/m32, xmmV, xmm1","vrsqrtss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 52 /r","V","V","AVX","","w,r,r","",""
+"VSHUFPD xmm1, xmmV, xmm2/m128, imm8","VSHUFPD imm8, xmm2/m128, xmmV, xmm1","vshufpd imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG C6 /r ib","V","V","AVX","","w,r,r,r","",""
+"VSHUFPD ymm1, ymmV, ymm2/m256, imm8","VSHUFPD imm8, ymm2/m256, ymmV, ymm1","vshufpd imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG C6 /r ib","V","V","AVX","","w,r,r,r","",""
+"VSHUFPS xmm1, xmmV, xmm2/m128, imm8","VSHUFPS imm8, xmm2/m128, xmmV, xmm1","vshufps imm8, xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG C6 /r ib","V","V","AVX","","w,r,r,r","",""
+"VSHUFPS ymm1, ymmV, ymm2/m256, imm8","VSHUFPS imm8, ymm2/m256, ymmV, ymm1","vshufps imm8, ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG C6 /r ib","V","V","AVX","","w,r,r,r","",""
+"VSQRTPD xmm1, xmm2/m128","VSQRTPD xmm2/m128, xmm1","vsqrtpd xmm2/m128, xmm1","VEX.128.66.0F.WIG 51 /r","V","V","AVX","","w,r","",""
+"VSQRTPD ymm1, ymm2/m256","VSQRTPD ymm2/m256, ymm1","vsqrtpd ymm2/m256, ymm1","VEX.256.66.0F.WIG 51 /r","V","V","AVX","","w,r","",""
+"VSQRTPS xmm1, xmm2/m128","VSQRTPS xmm2/m128, xmm1","vsqrtps xmm2/m128, xmm1","VEX.128.0F.WIG 51 /r","V","V","AVX","","w,r","",""
+"VSQRTPS ymm1, ymm2/m256","VSQRTPS ymm2/m256, ymm1","vsqrtps ymm2/m256, ymm1","VEX.256.0F.WIG 51 /r","V","V","AVX","","w,r","",""
+"VSQRTSD xmm1, xmmV, xmm2/m64","VSQRTSD xmm2/m64, xmmV, xmm1","vsqrtsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 51 /r","V","V","AVX","","w,r,r","",""
+"VSQRTSS xmm1, xmmV, xmm2/m32","VSQRTSS xmm2/m32, xmmV, xmm1","vsqrtss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 51 /r","V","V","AVX","","w,r,r","",""
+"VSTMXCSR m32","VSTMXCSR m32","vstmxcsr m32","VEX.LZ.0F.WIG AE /3","V","V","AVX","modrm_memonly","w","",""
+"VSUBPD xmm1, xmmV, xmm2/m128","VSUBPD xmm2/m128, xmmV, xmm1","vsubpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
+"VSUBPD ymm1, ymmV, ymm2/m256","VSUBPD ymm2/m256, ymmV, ymm1","vsubpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
+"VSUBPS xmm1, xmmV, xmm2/m128","VSUBPS xmm2/m128, xmmV, xmm1","vsubps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
+"VSUBPS ymm1, ymmV, ymm2/m256","VSUBPS ymm2/m256, ymmV, ymm1","vsubps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
+"VSUBSD xmm1, xmmV, xmm2/m64","VSUBSD xmm2/m64, xmmV, xmm1","vsubsd xmm2/m64, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
+"VSUBSS xmm1, xmmV, xmm2/m32","VSUBSS xmm2/m32, xmmV, xmm1","vsubss xmm2/m32, xmmV, xmm1","VEX.NDS.LIG.F3.0F.WIG 5C /r","V","V","AVX","","w,r,r","",""
+"VTESTPD xmm1, xmm2/m128","VTESTPD xmm2/m128, xmm1","vtestpd xmm2/m128, xmm1","VEX.128.66.0F38.W0 0F /r","V","V","AVX","","r,r","",""
+"VTESTPD ymm1, ymm2/m256","VTESTPD ymm2/m256, ymm1","vtestpd ymm2/m256, ymm1","VEX.256.66.0F38.W0 0F /r","V","V","AVX","","r,r","",""
+"VTESTPS xmm1, xmm2/m128","VTESTPS xmm2/m128, xmm1","vtestps xmm2/m128, xmm1","VEX.128.66.0F38.W0 0E /r","V","V","AVX","","r,r","",""
+"VTESTPS ymm1, ymm2/m256","VTESTPS ymm2/m256, ymm1","vtestps ymm2/m256, ymm1","VEX.256.66.0F38.W0 0E /r","V","V","AVX","","r,r","",""
+"VUCOMISD xmm1, xmm2/m64","VUCOMISD xmm2/m64, xmm1","vucomisd xmm2/m64, xmm1","VEX.LIG.66.0F.WIG 2E /r","V","V","AVX","","r,r","",""
+"VUCOMISS xmm1, xmm2/m32","VUCOMISS xmm2/m32, xmm1","vucomiss xmm2/m32, xmm1","VEX.LIG.0F.WIG 2E /r","V","V","AVX","","r,r","",""
+"VUNPCKHPD xmm1, xmmV, xmm2/m128","VUNPCKHPD xmm2/m128, xmmV, xmm1","vunpckhpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 15 /r","V","V","AVX","","w,r,r","",""
+"VUNPCKHPD ymm1, ymmV, ymm2/m256","VUNPCKHPD ymm2/m256, ymmV, ymm1","vunpckhpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 15 /r","V","V","AVX","","w,r,r","",""
+"VUNPCKHPS xmm1, xmmV, xmm2/m128","VUNPCKHPS xmm2/m128, xmmV, xmm1","vunpckhps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 15 /r","V","V","AVX","","w,r,r","",""
+"VUNPCKHPS ymm1, ymmV, ymm2/m256","VUNPCKHPS ymm2/m256, ymmV, ymm1","vunpckhps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 15 /r","V","V","AVX","","w,r,r","",""
+"VUNPCKLPD xmm1, xmmV, xmm2/m128","VUNPCKLPD xmm2/m128, xmmV, xmm1","vunpcklpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 14 /r","V","V","AVX","","w,r,r","",""
+"VUNPCKLPD ymm1, ymmV, ymm2/m256","VUNPCKLPD ymm2/m256, ymmV, ymm1","vunpcklpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 14 /r","V","V","AVX","","w,r,r","",""
+"VUNPCKLPS xmm1, xmmV, xmm2/m128","VUNPCKLPS xmm2/m128, xmmV, xmm1","vunpcklps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 14 /r","V","V","AVX","","w,r,r","",""
+"VUNPCKLPS ymm1, ymmV, ymm2/m256","VUNPCKLPS ymm2/m256, ymmV, ymm1","vunpcklps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 14 /r","V","V","AVX","","w,r,r","",""
+"VXORPD xmm1, xmmV, xmm2/m128","VXORPD xmm2/m128, xmmV, xmm1","vxorpd xmm2/m128, xmmV, xmm1","VEX.NDS.128.66.0F.WIG 57 /r","V","V","AVX","","w,r,r","",""
+"VXORPD ymm1, ymmV, ymm2/m256","VXORPD ymm2/m256, ymmV, ymm1","vxorpd ymm2/m256, ymmV, ymm1","VEX.NDS.256.66.0F.WIG 57 /r","V","V","AVX","","w,r,r","",""
+"VXORPS xmm1, xmmV, xmm2/m128","VXORPS xmm2/m128, xmmV, xmm1","vxorps xmm2/m128, xmmV, xmm1","VEX.NDS.128.0F.WIG 57 /r","V","V","AVX","","w,r,r","",""
+"VXORPS ymm1, ymmV, ymm2/m256","VXORPS ymm2/m256, ymmV, ymm1","vxorps ymm2/m256, ymmV, ymm1","VEX.NDS.256.0F.WIG 57 /r","V","V","AVX","","w,r,r","",""
+"VZEROALL","VZEROALL","vzeroall","VEX.256.0F.WIG 77","V","V","AVX","","","",""
+"VZEROUPPER","VZEROUPPER","vzeroupper","VEX.128.0F.WIG 77","V","V","AVX","","","",""
+"WBINVD","WBINVD","wbinvd","0F 09","V","V","486","","","",""
+"WRFSBASE rmr32","WRFSBASE rmr32","wrfsbase rmr32","F3 0F AE /2","I","V","FSGSBASE","modrm_regonly,operand16,operand32","r","Y","32"
+"WRFSBASE rmr64","WRFSBASE rmr64","wrfsbase rmr64","F3 REX.W 0F AE /2","I","V","FSGSBASE","modrm_regonly","r","Y","64"
+"WRGSBASE rmr32","WRGSBASE rmr32","wrgsbase rmr32","F3 0F AE /3","I","V","FSGSBASE","modrm_regonly,operand16,operand32","r","Y","32"
+"WRGSBASE rmr64","WRGSBASE rmr64","wrgsbase rmr64","F3 REX.W 0F AE /3","I","V","FSGSBASE","modrm_regonly","r","Y","64"
+"WRMSR","WRMSR","wrmsr","0F 30","V","V","Pentium","","","",""
+"WRPKRU","WRPKRU","wrpkru","0F 01 EF","V","V","OSPKE","","","",""
+"XABORT imm8","XABORT imm8","xabort imm8","C6 F8 ib","V","V","RTM","","r","",""
+"XADD r/m16, r16","XADDW r16, r/m16","xaddw r16, r/m16","0F C1 /r","V","V","","operand16","rw,w","Y","16"
+"XADD r/m32, r32","XADDL r32, r/m32","xaddl r32, r/m32","0F C1 /r","V","V","","operand32","rw,w","Y","32"
+"XADD r/m64, r64","XADDQ r64, r/m64","xaddq r64, r/m64","REX.W 0F C1 /r","N.E.","V","","","rw,w","Y","64"
+"XADD r/m8, r8","XADDB r8, r/m8","xaddb r8, r/m8","0F C0 /r","V","V","","","rw,w","Y","8"
+"XADD r/m8, r8","XADDB r8, r/m8","xaddb r8, r/m8","REX 0F C0 /r","N.E.","V","","pseudo64","rw,w","Y","8"
+"XBEGIN rel16","XBEGIN rel16","xbegin rel16","C7 F8 cw","V","V","RTM","operand16","r","",""
+"XBEGIN rel32","XBEGIN rel32","xbegin rel32","C7 F8 cd","V","V","RTM","operand32,operand64","r","",""
+"XCHG AX, r16op","XCHGW r16op, AX","xchgw r16op, AX","90+rw","V","V","","operand16,pseudo","rw,rw","Y","16"
+"XCHG EAX, r32op","XCHGL r32op, EAX","xchgl r32op, EAX","90+rd","V","V","","operand32,pseudo","rw,rw","Y","32"
+"XCHG RAX, r64op","XCHGQ r64op, RAX","xchgq r64op, RAX","REX.W 90+rd","N.E.","V","","pseudo","rw,rw","Y","64"
+"XCHG r/m16, r16","XCHGW r16, r/m16","xchgw r16, r/m16","87 /r","V","V","","operand16","rw,r","Y","16"
+"XCHG r/m32, r32","XCHGL r32, r/m32","xchgl r32, r/m32","87 /r","V","V","","operand32","rw,r","Y","32"
+"XCHG r/m64, r64","XCHGQ r64, r/m64","xchgq r64, r/m64","REX.W 87 /r","N.E.","V","","","rw,r","Y","64"
+"XCHG r/m8, r8","XCHGB r8, r/m8","xchgb r8, r/m8","86 /r","V","V","","","rw,r","Y","8"
+"XCHG r/m8, r8","XCHGB r8, r/m8","xchgb r8, r/m8","REX 86 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"XCHG r16, r/m16","XCHGW r/m16, r16","xchgw r/m16, r16","87 /r","V","V","","operand16,pseudo","w,r","Y","16"
+"XCHG r16op, AX","XCHGW AX, r16op","xchgw AX, r16op","90+rw","V","V","","operand16","rw,rw","Y","16"
+"XCHG r32, r/m32","XCHGL r/m32, r32","xchgl r/m32, r32","87 /r","V","V","","operand32,pseudo","w,r","Y","32"
+"XCHG r32op, EAX","XCHGL EAX, r32op","xchgl EAX, r32op","90+rd","V","V","","operand32","rw,rw","Y","32"
+"XCHG r64, r/m64","XCHGQ r/m64, r64","xchgq r/m64, r64","REX.W 87 /r","N.E.","V","","pseudo","w,r","Y","64"
+"XCHG r64op, RAX","XCHGQ RAX, r64op","xchgq RAX, r64op","REX.W 90+rd","N.E.","V","","","rw,rw","Y","64"
+"XCHG r8, r/m8","XCHGB r/m8, r8","xchgb r/m8, r8","86 /r","V","V","","pseudo","w,r","Y","8"
+"XCHG r8, r/m8","XCHGB r/m8, r8","xchgb r/m8, r8","REX 86 /r","N.E.","V","","pseudo","w,r","Y","8"
+"XEND","XEND","xend","0F 01 D5","V","V","RTM","","","",""
+"XGETBV","XGETBV","xgetbv","0F 01 D0","V","V","","","","",""
+"XLATB","XLAT","xlat","REX.W D7","N.E.","V","","pseudo","","",""
+"XOR AL, imm8","XORB imm8, AL","xorb imm8, AL","34 ib","V","V","","","rw,r","Y","8"
+"XOR AX, imm16","XORW imm16, AX","xorw imm16, AX","35 iw","V","V","","operand16","rw,r","Y","16"
+"XOR EAX, imm32","XORL imm32, EAX","xorl imm32, EAX","35 id","V","V","","operand32","rw,r","Y","32"
+"XOR RAX, imm32","XORQ imm32, RAX","xorq imm32, RAX","REX.W 35 id","N.E.","V","","","rw,r","Y","64"
+"XOR r/m16, imm16","XORW imm16, r/m16","xorw imm16, r/m16","81 /6 iw","V","V","","operand16","rw,r","Y","16"
+"XOR r/m16, imm8","XORW imm8, r/m16","xorw imm8, r/m16","83 /6 ib","V","V","","operand16","rw,r","Y","16"
+"XOR r/m16, r16","XORW r16, r/m16","xorw r16, r/m16","31 /r","V","V","","operand16","rw,r","Y","16"
+"XOR r/m32, imm32","XORL imm32, r/m32","xorl imm32, r/m32","81 /6 id","V","V","","operand32","rw,r","Y","32"
+"XOR r/m32, imm8","XORL imm8, r/m32","xorl imm8, r/m32","83 /6 ib","V","V","","operand32","rw,r","Y","32"
+"XOR r/m32, r32","XORL r32, r/m32","xorl r32, r/m32","31 /r","V","V","","operand32","rw,r","Y","32"
+"XOR r/m64, imm32","XORQ imm32, r/m64","xorq imm32, r/m64","REX.W 81 /6 id","N.E.","V","","","rw,r","Y","64"
+"XOR r/m64, imm8","XORQ imm8, r/m64","xorq imm8, r/m64","REX.W 83 /6 ib","N.E.","V","","","rw,r","Y","64"
+"XOR r/m64, r64","XORQ r64, r/m64","xorq r64, r/m64","REX.W 31 /r","N.E.","V","","","rw,r","Y","64"
+"XOR r/m8, imm8","XORB imm8, r/m8","xorb imm8, r/m8","80 /6 ib","V","V","","","rw,r","Y","8"
+"XOR r/m8, imm8","XORB imm8, r/m8","xorb imm8, r/m8","REX 80 /6 ib","N.E.","V","","pseudo64","rw,r","Y","8"
+"XOR r/m8, r8","XORB r8, r/m8","xorb r8, r/m8","30 /r","V","V","","","rw,r","Y","8"
+"XOR r/m8, r8","XORB r8, r/m8","xorb r8, r/m8","REX 30 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"XOR r16, r/m16","XORW r/m16, r16","xorw r/m16, r16","33 /r","V","V","","operand16","rw,r","Y","16"
+"XOR r32, r/m32","XORL r/m32, r32","xorl r/m32, r32","33 /r","V","V","","operand32","rw,r","Y","32"
+"XOR r64, r/m64","XORQ r/m64, r64","xorq r/m64, r64","REX.W 33 /r","N.E.","V","","","rw,r","Y","64"
+"XOR r8, r/m8","XORB r/m8, r8","xorb r/m8, r8","32 /r","V","V","","","rw,r","Y","8"
+"XOR r8, r/m8","XORB r/m8, r8","xorb r/m8, r8","REX 32 /r","N.E.","V","","pseudo64","rw,r","Y","8"
+"XORPD xmm1, xmm2/m128","XORPD xmm2/m128, xmm1","xorpd xmm2/m128, xmm1","66 0F 57 /r","V","V","SSE2","","rw,r","",""
+"XORPS xmm1, xmm2/m128","XORPS xmm2/m128, xmm1","xorps xmm2/m128, xmm1","0F 57 /r","V","V","SSE","","rw,r","",""
+"XRSTOR mem","XRSTOR mem","xrstor mem","0F AE /5","V","V","","operand16,operand32","r","",""
+"XRSTOR64 mem","XRSTOR64 mem","xrstor64 mem","REX.W 0F AE /5","N.E.","V","","","r","",""
+"XRSTORS mem","XRSTORS mem","xrstors mem","0F C7 /3","V","V","","operand16,operand32","r","",""
+"XRSTORS64 mem","XRSTORS64 mem","xrstors64 mem","REX.W 0F C7 /3","N.E.","V","","","r","",""
+"XSAVE mem","XSAVE mem","xsave mem","0F AE /4","V","V","","operand16,operand32","w","",""
+"XSAVE64 mem","XSAVE64 mem","xsave64 mem","REX.W 0F AE /4","N.E.","V","","","w","",""
+"XSAVEC mem","XSAVEC mem","xsavec mem","0F C7 /4","V","V","","operand16,operand32","w","",""
+"XSAVEC64 mem","XSAVEC64 mem","xsavec64 mem","REX.W 0F C7 /4","N.E.","V","","","w","",""
+"XSAVEOPT mem","XSAVEOPT mem","xsaveopt mem","0F AE /6","V","V","XSAVEOPT","operand16,operand32","w","",""
+"XSAVEOPT64 mem","XSAVEOPT64 mem","xsaveopt64 mem","REX.W 0F AE /6","N.E.","V","XSAVEOPT","","w","",""
+"XSAVES mem","XSAVES mem","xsaves mem","0F C7 /5","V","V","","operand16,operand32","w","",""
+"XSAVES64 mem","XSAVES64 mem","xsaves64 mem","REX.W 0F C7 /5","N.E.","V","","","w","",""
+"XSETBV","XSETBV","xsetbv","0F 01 D1","V","V","","","","",""
+"XTEST","XTEST","xtest","0F 01 D6","V","V","HLE or RTM","","","",""
diff --git a/x86/x86spec/.gitignore b/x86/x86spec/.gitignore
new file mode 100644
index 0000000..4af6939
--- /dev/null
+++ b/x86/x86spec/.gitignore
@@ -0,0 +1 @@
diff --git a/x86/x86spec/cleanup.go b/x86/x86spec/cleanup.go
new file mode 100644
index 0000000..fd44f05
--- /dev/null
+++ b/x86/x86spec/cleanup.go
@@ -0,0 +1,1342 @@
+// Copyright 2016 The Go Authors.  All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+package main
+import (
+	"fmt"
+	"os"
+	"sort"
+	"strings"
+// Clean up the data from the Intel manual for correctness
+// and to annotate details relevant to decoding or encoding,
+// such as whether an instruction is valid only in certain
+// operand size modes.
+// encodeReplace maps (argument, encoding) pairs to the corrected argument.
+// We use a suffix 1 for the register and 2 for the r/m in the modrm byte.
+// We use a suffix V for a register number specified in the VEX.vvvv bits.
+var encodeReplace = map[[2]string]string{
+	{"mm", "ModRM:reg"}:        "mm1",
+	{"mm", "ModRM:r/m"}:        "mm2",
+	{"mm1", "ModRM:r/m"}:       "mm2",
+	{"mm2", "ModRM:reg"}:       "mm1",
+	{"mm/m32", "ModRM:r/m"}:    "mm2/m32",
+	{"mm/m64", "ModRM:r/m"}:    "mm2/m64",
+	{"xmm", "ModRM:reg"}:       "xmm1",
+	{"xmm", "ModRM:r/m"}:       "xmm2",
+	{"xmm/m64", "ModRM:r/m"}:   "xmm2/m64",
+	{"xmm0", "ModRM:reg"}:      "xmm1",
+	{"xmm1", "ModRM:r/m"}:      "xmm2",
+	{"xmm1/m16", "ModRM:r/m"}:  "xmm2/m16",
+	{"xmm1/m32", "ModRM:r/m"}:  "xmm2/m32",
+	{"xmm1/m64", "ModRM:r/m"}:  "xmm2/m64",
+	{"xmm1/m128", "ModRM:r/m"}: "xmm2/m128",
+	{"xmm1/m256", "ModRM:r/m"}: "xmm2/m256",
+	{"xmm/m16", "ModRM:r/m"}:   "xmm2/m16",
+	{"xmm/m32", "ModRM:r/m"}:   "xmm2/m32",
+	{"xmm/m64", "ModRM:r/m"}:   "xmm2/m64",
+	{"xmm/m128", "ModRM:r/m"}:  "xmm2/m128",
+	{"xmm/m256", "ModRM:r/m"}:  "xmm2/m256",
+	{"xmm3", "ModRM:reg"}:      "xmm1",
+	{"xmm3", "ModRM:r/m"}:      "xmm2",
+	{"xmm3/m16", "ModRM:r/m"}:  "xmm2/m16",
+	{"xmm3/m32", "ModRM:r/m"}:  "xmm2/m32",
+	{"xmm3/m64", "ModRM:r/m"}:  "xmm2/m64",
+	{"xmm3/m128", "ModRM:r/m"}: "xmm2/m128",
+	{"xmm3/m256", "ModRM:r/m"}: "xmm2/m256",
+	{"xmm2", "ModRM:reg"}:      "xmm1",
+	{"xmm2/m16", "ModRM:reg"}:  "xmm1/m16",
+	{"xmm2/m32", "ModRM:reg"}:  "xmm1/m32",
+	{"xmm2/m64", "ModRM:reg"}:  "xmm1/m64",
+	{"xmm2/m128", "ModRM:reg"}: "xmm1/m128",
+	{"xmm2/m256", "ModRM:reg"}: "xmm1/m256",
+	{"ymm", "ModRM:reg"}:       "ymm1",
+	{"ymm", "ModRM:r/m"}:       "ymm2",
+	{"ymm0", "ModRM:reg"}:      "ymm1",
+	{"ymm1", "ModRM:r/m"}:      "ymm2",
+	{"ymm1/m16", "ModRM:r/m"}:  "ymm2/m16",
+	{"ymm1/m32", "ModRM:r/m"}:  "ymm2/m32",
+	{"ymm1/m64", "ModRM:r/m"}:  "ymm2/m64",
+	{"ymm1/m128", "ModRM:r/m"}: "ymm2/m128",
+	{"ymm1/m256", "ModRM:r/m"}: "ymm2/m256",
+	{"ymm3", "ModRM:reg"}:      "ymm1",
+	{"ymm3", "ModRM:r/m"}:      "ymm2",
+	{"ymm3/m16", "ModRM:r/m"}:  "ymm2/m16",
+	{"ymm3/m32", "ModRM:r/m"}:  "ymm2/m32",
+	{"ymm3/m64", "ModRM:r/m"}:  "ymm2/m64",
+	{"ymm3/m128", "ModRM:r/m"}: "ymm2/m128",
+	{"ymm3/m256", "ModRM:r/m"}: "ymm2/m256",
+	{"ymm2", "ModRM:reg"}:      "ymm1",
+	{"ymm2/m16", "ModRM:reg"}:  "ymm1/m16",
+	{"ymm2/m32", "ModRM:reg"}:  "ymm1/m32",
+	{"ymm2/m64", "ModRM:reg"}:  "ymm1/m64",
+	{"ymm2/m128", "ModRM:reg"}: "ymm1/m128",
+	{"ymm2/m256", "ModRM:reg"}: "ymm1/m256",
+	{"xmm1", "VEX.vvvv"}:       "xmmV",
+	{"xmm2", "VEX.vvvv"}:       "xmmV",
+	{"ymm1", "VEX.vvvv"}:       "ymmV",
+	{"ymm2", "VEX.vvvv"}:       "ymmV",
+	{"xmm4", "imm8[7:4]"}:      "xmmIH",
+	{"ymm4", "imm8[7:4]"}:      "ymmIH",
+	{"r8", "opcode + rd"}:      "r8op",
+	{"r16", "opcode + rd"}:     "r16op",
+	{"r32", "opcode + rd"}:     "r32op",
+	{"r64", "opcode + rd"}:     "r64op",
+	{"reg/m32", "ModRM:r/m"}:   "r/m32",
+	{"reg/m16", "ModRM:r/m"}:   "r32/m16",
+	{"bnd", "ModRM:reg"}:       "bnd1",
+	{"bnd2", "ModRM:reg"}:      "bnd1",
+	{"bnd1/m64", "ModRM:r/m"}:  "bnd2/m64",
+	{"bnd1/m128", "ModRM:r/m"}: "bnd2/m128",
+	{"r32a", "ModRM:reg"}:      "r32",
+	{"r64a", "ModRM:reg"}:      "r64",
+	{"r32", "VEX.vvvv"}:        "r32V",
+	{"r64", "VEX.vvvv"}:        "r64V",
+	{"r32b", "VEX.vvvv"}:       "r32V",
+	{"r64b", "VEX.vvvv"}:       "r64V",
+	{"r64", "VEX.vvvv"}:        "r64V",
+	{"ST", "ST(0)"}:            "ST(0)",
+// A few instructions do not have the usual encoding descriptions.
+// Supply them.
+var encodings = map[string][]string{
+	"FADD m32fp":            {"ModRM:r/m (r)"},
+	"FADD m64fp":            {"ModRM:r/m (r)"},
+	"FADD ST(0), ST(i)":     {"ST(0) (r, w)", "ST(i) (r)"},
+	"FADD ST(i), ST(0)":     {"ST(i) (r, w)", "ST(0) (r)"},
+	"FADDP ST(i), ST(0)":    {"ST(i) (r, w)", "ST(0) (r)"},
+	"FIADD m32int":          {"ModRM:r/m (r)"},
+	"FIADD m16int":          {"ModRM:r/m (r)"},
+	"FBLD m80dec":           {"ModRM:r/m (r)"},
+	"FBSTP m80bcd":          {"ModRM:r/m (w)"},
+	"FCMOVB ST(0), ST(i)":   {"ST(0) (r, w)", "ST(i) (r)"},
+	"FCMOVE ST(0), ST(i)":   {"ST(0) (r, w)", "ST(i) (r)"},
+	"FCMOVBE ST(0), ST(i)":  {"ST(0) (r, w)", "ST(i) (r)"},
+	"FCMOVU ST(0), ST(i)":   {"ST(0) (r, w)", "ST(i) (r)"},
+	"FCMOVNB ST(0), ST(i)":  {"ST(0) (r, w)", "ST(i) (r)"},
+	"FCMOVNE ST(0), ST(i)":  {"ST(0) (r, w)", "ST(i) (r)"},
+	"FCMOVNBE ST(0), ST(i)": {"ST(0) (r, w)", "ST(i) (r)"},
+	"FCMOVNU ST(0), ST(i)":  {"ST(0) (r, w)", "ST(i) (r)"},
+	"FCOM m32fp":            {"ModRM:r/m (r)"},
+	"FCOM m64fp":            {"ModRM:r/m (r)"},
+	"FCOM ST(i)":            {"ST(i) (r)"},
+	"FCOMP m32fp":           {"ModRM:r/m (r)"},
+	"FCOMP m64fp":           {"ModRM:r/m (r)"},
+	"FCOMP ST(i)":           {"ST(i) (r)"},
+	"FCOMI ST, ST(i)":       {"ST(0) (r)", "ST(i) (r)"},
+	"FCOMIP ST, ST(i)":      {"ST(0) (r)", "ST(i) (r)"},
+	"FUCOMI ST, ST(i)":      {"ST(0) (r)", "ST(i) (r)"},
+	"FUCOMIP ST, ST(i)":     {"ST(0) (r)", "ST(i) (r)"},
+	"FDIV m32fp":            {"ModRM:r/m (r)"},
+	"FDIV m64fp":            {"ModRM:r/m (r)"},
+	"FDIV ST(0), ST(i)":     {"ST(0) (r, w)", "ST(i) (r)"},
+	"FDIV ST(i), ST(0)":     {"ST(i) (r, w)", "ST(0) (r)"},
+	"FDIVP ST(i), ST(0)":    {"ST(i) (r, w)", "ST(0) (r)"},
+	"FIDIV m16int":          {"ModRM:r/m (r)"},
+	"FIDIV m32int":          {"ModRM:r/m (r)"},
+	"FIDIV m64int":          {"ModRM:r/m (r)"},
+	"FDIVR m32fp":           {"ModRM:r/m (r)"},
+	"FDIVR m64fp":           {"ModRM:r/m (r)"},
+	"FDIVR ST(0), ST(i)":    {"ST(0) (r, w)", "ST(i) (r)"},
+	"FDIVR ST(i), ST(0)":    {"ST(i) (r, w)", "ST(0) (r)"},
+	"FDIVRP ST(i), ST(0)":   {"ST(i) (r, w)", "ST(0) (r)"},
+	"FIDIVR m16int":         {"ModRM:r/m (r)"},
+	"FIDIVR m32int":         {"ModRM:r/m (r)"},
+	"FIDIVR m64int":         {"ModRM:r/m (r)"},
+	"FFREE ST(i)":           {"ST(i) (w)"},
+	"FICOM m16int":          {"ModRM:r/m (r)"},
+	"FICOM m32int":          {"ModRM:r/m (r)"},
+	"FICOMP m16int":         {"ModRM:r/m (r)"},
+	"FICOMP m32int":         {"ModRM:r/m (r)"},
+	"FILD m16int":           {"ModRM:r/m (r)"},
+	"FILD m32int":           {"ModRM:r/m (r)"},
+	"FILD m64int":           {"ModRM:r/m (r)"},
+	"FIST m16int":           {"ModRM:r/m (w)"},
+	"FIST m32int":           {"ModRM:r/m (w)"},
+	"FISTP m16int":          {"ModRM:r/m (w)"},
+	"FISTP m32int":          {"ModRM:r/m (w)"},
+	"FISTP m64int":          {"ModRM:r/m (w)"},
+	"FISTTP m16int":         {"ModRM:r/m (w)"},
+	"FISTTP m32int":         {"ModRM:r/m (w)"},
+	"FISTTP m64int":         {"ModRM:r/m (w)"},
+	"FLD m32fp":             {"ModRM:r/m (r)"},
+	"FLD m64fp":             {"ModRM:r/m (r)"},
+	"FLD m80fp":             {"ModRM:r/m (r)"},
+	"FLD ST(i)":             {"ST(i) (r)"},
+	"FLDCW m2byte":          {"ModRM:r/m (r)"},
+	"FLDENV m14/28byte":     {"ModRM:r/m (r)"},
+	"FMUL m32fp":            {"ModRM:r/m (r)"},
+	"FMUL m64fp":            {"ModRM:r/m (r)"},
+	"FMUL ST(0), ST(i)":     {"ST(0) (r, w)", "ST(i) (r)"},
+	"FMUL ST(i), ST(0)":     {"ST(i) (r, w)", "ST(0) (r)"},
+	"FMULP ST(i), ST(0)":    {"ST(i) (r, w)", "ST(0) (r)"},
+	"FIMUL m16int":          {"ModRM:r/m (r)"},
+	"FIMUL m32int":          {"ModRM:r/m (r)"},
+	"FRSTOR m94/108byte":    {"ModRM:r/m (r)"},
+	"FSAVE m94/108byte":     {"ModRM:r/m (w)"},
+	"FNSAVE m94/108byte":    {"ModRM:r/m (w)"},
+	"FST m32fp":             {"ModRM:r/m (w)"},
+	"FST m64fp":             {"ModRM:r/m (w)"},
+	"FST m80fp":             {"ModRM:r/m (w)"},
+	"FST ST(i)":             {"ST(i) (w)"},
+	"FSTP m32fp":            {"ModRM:r/m (w)"},
+	"FSTP m64fp":            {"ModRM:r/m (w)"},
+	"FSTP m80fp":            {"ModRM:r/m (w)"},
+	"FSTP ST(i)":            {"ST(i) (w)"},
+	"FSTCW m2byte":          {"ModRM:r/m (w)"},
+	"FNSTCW m2byte":         {"ModRM:r/m (w)"},
+	"FSTENV m14/28byte":     {"ModRM:r/m (w)"},
+	"FNSTENV m14/28byte":    {"ModRM:r/m (w)"},
+	"FSTSW m2byte":          {"ModRM:r/m (w)"},
+	"FSTSW AX":              {"AX (w)"},
+	"FNSTSW m2byte":         {"ModRM:r/m (w)"},
+	"FNSTSW AX":             {"AX (w)"},
+	"FSUB m32fp":            {"ModRM:r/m (r)"},
+	"FSUB m64fp":            {"ModRM:r/m (r)"},
+	"FSUB ST(0), ST(i)":     {"ST(0) (r, w)", "ST(i) (r)"},
+	"FSUB ST(i), ST(0)":     {"ST(i) (r, w)", "ST(0) (r)"},
+	"FSUBP ST(i), ST(0)":    {"ST(i) (r, w)", "ST(0) (r)"},
+	"FISUB m16int":          {"ModRM:r/m (r)"},
+	"FISUB m32int":          {"ModRM:r/m (r)"},
+	"FSUBR m32fp":           {"ModRM:r/m (r)"},
+	"FSUBR m64fp":           {"ModRM:r/m (r)"},
+	"FSUBR ST(0), ST(i)":    {"ST(0) (r, w)", "ST(i) (r)"},
+	"FSUBR ST(i), ST(0)":    {"ST(i) (r, w)", "ST(0) (r)"},
+	"FSUBRP ST(i), ST(0)":   {"ST(i) (r, w)", "ST(0) (r)"},
+	"FISUBR m16int":         {"ModRM:r/m (r)"},
+	"FISUBR m32int":         {"ModRM:r/m (r)"},
+	"FISUBR m64int":         {"ModRM:r/m (r)"},
+	"FUCOM ST(i)":           {"ST(i) (r)"},
+	"FUCOMP ST(i)":          {"ST(i) (r)"},
+	"FXCH ST(i)":            {"ST(i) (r, w)"},
+	"POP DS":                {"DS (w)"},
+	"POP ES":                {"ES (w)"},
+	"POP FS":                {"FS (w)"},
+	"POP GS":                {"GS (w)"},
+	"POP SS":                {"SS (w)"},
+	"POP CS":                {"CS (w)"},
+	"PUSH CS":               {"CS (r)"},
+	"PUSH DS":               {"DS (r)"},
+	"PUSH ES":               {"ES (r)"},
+	"PUSH FS":               {"FS (r)"},
+	"PUSH GS":               {"GS (r)"},
+	"PUSH SS":               {"SS (r)"},
+	"INT 3":                 {"3 (r)"},
+	// In manual but hard to parse
+	"BNDLDX bnd, mib": {"ModRM:reg (w)", "ModRM:r/m (r)"},
+	"BNDSTX mib, bnd": {"ModRM:r/m (r)", "ModRM:reg (r)"},
+	// In manual but wrong
+	"CALL rel16":    {"Offset"},
+	"CALL rel32":    {"Offset"},
+	"IN AL, imm8":   {"AL (w)", "imm8 (r)"},
+	"IN AX, imm8":   {"AX (w)", "imm8 (r)"},
+	"IN EAX, imm8":  {"EAX (w)", "imm8 (r)"},
+	"IN AL, DX":     {"AL (w)", "DX (r)"},
+	"IN AX, DX":     {"AX (w)", "DX (r)"},
+	"IN EAX, DX":    {"EAX (w)", "DX (r)"},
+	"OUT DX, AL":    {"DX (r)", "AL (r)"},
+	"OUT DX, AX":    {"DX (r)", "AX (r)"},
+	"OUT DX, EAX":   {"DX (r)", "EAX (r)"},
+	"OUT imm8, AL":  {"imm8 (r)", "AL (r)"},
+	"OUT imm8, AX":  {"imm8 (r)", "AX (r)"},
+	"OUT imm8, EAX": {"imm8 (r)", "EAX (r)"},
+	"XCHG AX, r16":  {"AX (r, w)", "opcode + rd (r, w)"},
+	"XCHG EAX, r32": {"EAX (r, w)", "opcode + rd (r, w)"},
+	"XCHG RAX, r64": {"RAX (r, w)", "opcode + rd (r, w)"},
+	// Encoding not listed.
+	"INVEPT r32, m128":   {"ModRM:reg (r)", "ModRM:r/m (r)"},
+	"INVEPT r64, m128":   {"ModRM:reg (r)", "ModRM:r/m (r)"},
+	"INVVPID r32, m128":  {"ModRM:reg (r)", "ModRM:r/m (r)"},
+	"INVVPID r64, m128":  {"ModRM:reg (r)", "ModRM:r/m (r)"},
+	"VMREAD r/m32, r32":  {"ModRM:r/m (w)", "ModRM:reg (r)"},
+	"VMREAD r/m64, r64":  {"ModRM:r/m (w)", "ModRM:reg (r)"},
+	"VMWRITE r32, r/m32": {"ModRM:reg (r)", "ModRM:r/m (r)"},
+	"VMWRITE r64, r/m64": {"ModRM:reg (r)", "ModRM:r/m (r)"},
+	"VMCLEAR m64":        {"ModRM:r/m (w)"},
+	"VMPTRLD m64":        {"ModRM:r/m (r)"},
+	"VMPTRST m64":        {"ModRM:r/m (w)"},
+	"VMXON m64":          {"ModRM:r/m (r)"},
+// opAction lists the read/write actions for individual opcodes,
+// where the manual does not.
+var opAction = map[string][]string{
+	"ADC":         {"rw", "r"},
+	"ADD":         {"rw", "r"},
+	"AND":         {"rw", "r"},
+	"BLENDVPD":    {"rw", "r", "r"},
+	"BLENDVPS":    {"rw", "r", "r"},
+	"IN":          {"w", "r"},
+	"MOV":         {"w", "r"},
+	"OR":          {"rw", "r"},
+	"OUT":         {"r", "r"},
+	"PBLENDVB":    {"rw", "r", "r"},
+	"RCL":         {"rw", "r"},
+	"RCR":         {"rw", "r"},
+	"ROL":         {"rw", "r"},
+	"ROR":         {"rw", "r"},
+	"SAL":         {"rw", "r"},
+	"SAR":         {"rw", "r"},
+	"SBB":         {"rw", "r"},
+	"SHL":         {"rw", "r"},
+	"SHLD":        {"rw", "r", "r"},
+	"SHR":         {"rw", "r"},
+	"SHRD":        {"rw", "r", "r"},
+	"SUB":         {"rw", "r", "r"},
+	"TEST":        {"r", "r"},
+	"VBLENDVPD":   {"rw", "r", "r"},
+	"VBLENDVPS":   {"rw", "r", "r"},
+	"VPBLENDVB":   {"rw", "r", "r"},
+	"VPMASKMOVD":  {"w", "r", "r"},
+	"VPMASKMOVQ":  {"w", "r", "r"},
+	"VPSLLVD":     {"w", "r", "r"},
+	"VPSRAVD":     {"w", "r", "r"},
+	"VPSRLVD":     {"w", "r", "r"},
+	"VPSRLVQ":     {"w", "r", "r"},
+	"VINSERTI128": {"w", "r", "r"},
+	"VPBLENDD":    {"w", "r", "r"},
+	"VPERMD":      {"w", "r", "r"},
+	"VPERMPS":     {"w", "r", "r"},
+	"VPERM2I128":  {"w", "r", "r"},
+	"VPSLLVQ":     {"w", "r", "r"},
+	"XCHG":        {"rw", "rw"},
+	"XOR":         {"rw", "r"},
+// encodeOK lists valid arg, encoding pairs.
+// Any pair not listed gets a warning.
+var encodeOK = map[[2]string]bool{
+	{"0", "imm8"}:                true,
+	{"1", "1"}:                   true,
+	{"1", "imm8"}:                true,
+	{"<XMM0>", "<XMM0>"}:         true,
+	{"<XMM0>", "implicit XMM0"}:  true,
+	{"AL", "AL"}:                 true,
+	{"AL", "AL/AX/EAX/RAX"}:      true,
+	{"AX", "AL/AX/EAX/RAX"}:      true,
+	{"AX", "AX"}:                 true,
+	{"AX", "AX/EAX/RAX"}:         true,
+	{"CL", "CL"}:                 true,
+	{"CR0-CR7", "ModRM:reg"}:     true,
+	{"CR8", ""}:                  true,
+	{"CS", "CS"}:                 true,
+	{"DR0-DR7", "ModRM:reg"}:     true,
+	{"DS", "DS"}:                 true,
+	{"DX", "DX"}:                 true,
+	{"EAX", "AL/AX/EAX/RAX"}:     true,
+	{"EAX", "AX/EAX/RAX"}:        true,
+	{"EAX", "EAX"}:               true,
+	{"ES", "ES"}:                 true,
+	{"FS", "FS"}:                 true,
+	{"GS", "GS"}:                 true,
+	{"RAX", "AL/AX/EAX/RAX"}:     true,
+	{"RAX", "AX/EAX/RAX"}:        true,
+	{"RAX", "RAX"}:               true,
+	{"ST", "ST(0)"}:              true,
+	{"ST(0)", "ST(0)"}:           true,
+	{"ST(i)", "ST(i)"}:           true,
+	{"Sreg", "ModRM:reg"}:        true,
+	{"bnd1", "ModRM:reg"}:        true,
+	{"bnd2/m128", "ModRM:r/m"}:   true,
+	{"bnd2/m64", "ModRM:r/m"}:    true,
+	{"imm16", "imm16"}:           true,
+	{"imm16", "imm8"}:            true,
+	{"imm16", "imm8/16/32"}:      true,
+	{"imm16", "imm8/16/32"}:      true,
+	{"imm16", "imm8/16/32/64"}:   true,
+	{"imm16", "iw"}:              true,
+	{"imm32", "imm8"}:            true,
+	{"imm32", "imm8/16/32"}:      true,
+	{"imm32", "imm8/16/32"}:      true,
+	{"imm32", "imm8/16/32/64"}:   true,
+	{"imm64", "imm8/16/32/64"}:   true,
+	{"imm8", "imm8"}:             true,
+	{"imm8", "imm8/16/32"}:       true,
+	{"imm8", "imm8/16/32"}:       true,
+	{"imm8", "imm8/16/32/64"}:    true,
+	{"imm8", "imm8[3:0]"}:        true,
+	{"m", "ModRM:r/m"}:           true,
+	{"m128", "ModRM:r/m"}:        true,
+	{"m14/28byte", "ModRM:r/m"}:  true,
+	{"m16", "ModRM:r/m"}:         true,
+	{"m16&16", "ModRM:r/m"}:      true,
+	{"m16&32", "ModRM:r/m"}:      true,
+	{"m16&64", "ModRM:r/m"}:      true,
+	{"m16:16", "ModRM:r/m"}:      true,
+	{"m16:16", "Offset"}:         true,
+	{"m16:32", "ModRM:r/m"}:      true,
+	{"m16:32", "Offset"}:         true,
+	{"m16:64", "ModRM:r/m"}:      true,
+	{"m16:64", "Offset"}:         true,
+	{"m16int", "ModRM:r/m"}:      true,
+	{"m256", "ModRM:r/m"}:        true,
+	{"m2byte", "ModRM:r/m"}:      true,
+	{"m32", "ModRM:r/m"}:         true,
+	{"m32&32", "ModRM:r/m"}:      true,
+	{"m32fp", "ModRM:r/m"}:       true,
+	{"m32int", "ModRM:r/m"}:      true,
+	{"m512byte", "ModRM:r/m"}:    true,
+	{"m64", "ModRM:r/m"}:         true,
+	{"m64fp", "ModRM:r/m"}:       true,
+	{"m64int", "ModRM:r/m"}:      true,
+	{"m8", "ModRM:r/m"}:          true,
+	{"m80bcd", "ModRM:r/m"}:      true,
+	{"m80dec", "ModRM:r/m"}:      true,
+	{"m80fp", "ModRM:r/m"}:       true,
+	{"m94/108byte", "ModRM:r/m"}: true,
+	{"mem", "ModRM:r/m"}:         true,
+	{"mib", "ModRM:r/m"}:         true,
+	{"mm/m32", "ModRM:r/m"}:      true,
+	{"mm1", "ModRM:reg"}:         true,
+	{"mm2", "ModRM:r/m"}:         true,
+	{"mm2/m32", "ModRM:r/m"}:     true,
+	{"mm2/m64", "ModRM:r/m"}:     true,
+	{"moffs16", "Moffs"}:         true,
+	{"moffs32", "Moffs"}:         true,
+	{"moffs64", "Moffs"}:         true,
+	{"moffs8", "Moffs"}:          true,
+	{"ptr16:16", "Offset"}:       true,
+	{"ptr16:32", "Offset"}:       true,
+	{"r/m16", "ModRM:r/m"}:       true,
+	{"r/m32", "ModRM:r/m"}:       true,
+	{"r/m64", "ModRM:r/m"}:       true,
+	{"r/m8", "ModRM:r/m"}:        true,
+	{"r16", "ModRM:reg"}:         true,
+	{"r16op", "opcode + rd"}:     true,
+	{"r32", "ModRM:reg"}:         true,
+	{"r32", "VEX.vvvv"}:          true,
+	{"r32/m16", "ModRM:r/m"}:     true,
+	{"r32/m8", "ModRM:r/m"}:      true,
+	{"r32V", "VEX.vvvv"}:         true,
+	{"r32op", "opcode + rd"}:     true,
+	{"r64", "ModRM:reg"}:         true,
+	{"r64/m16", "ModRM:r/m"}:     true,
+	{"r64V", "VEX.vvvv"}:         true,
+	{"r64op", "opcode + rd"}:     true,
+	{"r8", "ModRM:reg"}:          true,
+	{"r8op", "opcode + rd"}:      true,
+	{"rel16", "Offset"}:          true,
+	{"rel32", "Offset"}:          true,
+	{"rel8", "Offset"}:           true,
+	{"rmr16", "ModRM:r/m"}:       true,
+	{"rmr32", "ModRM:r/m"}:       true,
+	{"rmr64", "ModRM:r/m"}:       true,
+	{"xmm/m128", "ModRM:r/m"}:    true,
+	{"xmm/m32", "ModRM:r/m"}:     true,
+	{"xmm1", "ModRM:reg"}:        true,
+	{"xmm2", "ModRM:r/m"}:        true,
+	{"xmm2/m128", "ModRM:r/m"}:   true,
+	{"xmm2/m16", "ModRM:r/m"}:    true,
+	{"xmm2/m32", "ModRM:r/m"}:    true,
+	{"xmm2/m64", "ModRM:r/m"}:    true,
+	{"xmm2/m8", "ModRM:r/m"}:     true,
+	{"xmmIH", "imm8[7:4]"}:       true,
+	{"xmmV", "VEX.vvvv"}:         true,
+	{"ymm1", "ModRM:reg"}:        true,
+	{"ymm2", "ModRM:r/m"}:        true,
+	{"ymm2/m256", "ModRM:r/m"}:   true,
+	{"ymmIH", "imm8[7:4]"}:       true,
+	{"ymmV", "VEX.vvvv"}:         true,
+	{"vm32x", "vsib"}:            true,
+	{"vm64x", "vsib"}:            true,
+	{"vm32y", "vsib"}:            true,
+	{"vm64y", "vsib"}:            true,
+	{"SS", "SS"}:                 true,
+	{"3", "3"}:                   true,
+// instBlacklist lists the instruction syntaxes to ignore when parsing.
+// We exclude Intel's general forms for these not-actually-general instructions.
+// The syntax makes it look like arbitrary memory operands can be used when in fact
+// the exact address is fixed in all cases - [DI] or [SI], for example
+var instBlacklist = map[string]bool{
+	"CMPS m16, m16":       true,
+	"CMPS m32, m32":       true,
+	"CMPS m64, m64":       true,
+	"CMPS m8, m8":         true,
+	"INS m16, DX":         true,
+	"INS m32, DX":         true,
+	"INS m8, DX":          true,
+	"LODS m16":            true,
+	"LODS m32":            true,
+	"LODS m64":            true,
+	"LODS m8":             true,
+	"MOVS m16, m16":       true,
+	"MOVS m32, m32":       true,
+	"MOVS m64, m64":       true,
+	"MOVS m8, m8":         true,
+	"OUTS DX, m16":        true,
+	"OUTS DX, m32":        true,
+	"OUTS DX, m8":         true,
+	"REP INS m16, DX":     true,
+	"REP INS m32, DX":     true,
+	"REP INS m8, DX":      true,
+	"REP INS r/m32, DX":   true,
+	"REP LODS AL":         true,
+	"REP LODS AX":         true,
+	"REP LODS EAX":        true,
+	"REP LODS RAX":        true,
+	"REP MOVS m16, m16":   true,
+	"REP MOVS m32, m32":   true,
+	"REP MOVS m64, m64":   true,
+	"REP MOVS m8, m8":     true,
+	"REP OUTS DX, m16":    true,
+	"REP OUTS DX, m32":    true,
+	"REP OUTS DX, m8":     true,
+	"REP OUTS DX, r/m16":  true,
+	"REP OUTS DX, r/m32":  true,
+	"REP OUTS DX, r/m8":   true,
+	"REP STOS m16":        true,
+	"REP STOS m32":        true,
+	"REP STOS m64":        true,
+	"REP STOS m8":         true,
+	"REPE CMPS m16, m16":  true,
+	"REPE CMPS m32, m32":  true,
+	"REPE CMPS m64, m64":  true,
+	"REPE CMPS m8, m8":    true,
+	"REPE SCAS m16":       true,
+	"REPE SCAS m32":       true,
+	"REPE SCAS m64":       true,
+	"REPE SCAS m8":        true,
+	"REPNE CMPS m16, m16": true,
+	"REPNE CMPS m32, m32": true,
+	"REPNE CMPS m64, m64": true,
+	"REPNE CMPS m8, m8":   true,
+	"REPNE SCAS m16":      true,
+	"REPNE SCAS m32":      true,
+	"REPNE SCAS m64":      true,
+	"REPNE SCAS m8":       true,
+	"SCAS m16":            true,
+	"SCAS m32":            true,
+	"SCAS m64":            true,
+	"SCAS m8":             true,
+	"STOS m16":            true,
+	"STOS m32":            true,
+	"STOS m64":            true,
+	"STOS m8":             true,
+	"XLAT m8":             true,
+	// Neither xed nor objdump decode VSIB plausibly.
+	// Too early to add these.
+	"VGATHERDPD xmm1, vm32x, xmm2": true,
+	"VGATHERDPD ymm1, vm32x, ymm2": true,
+	"VGATHERDPS xmm1, vm32x, xmm2": true,
+	"VGATHERDPS ymm1, vm32y, ymm2": true,
+	"VGATHERQPD xmm1, vm64x, xmm2": true,
+	"VGATHERQPD ymm1, vm64y, ymm2": true,
+	"VGATHERQPS xmm1, vm64x, xmm2": true,
+	"VGATHERQPS xmm1, vm64y, xmm2": true,
+	"VPGATHERDD xmm1, vm32x, xmm2": true,
+	"VPGATHERDD ymm1, vm32y, ymm2": true,
+	"VPGATHERDQ xmm1, vm32x, xmm2": true,
+	"VPGATHERDQ ymm1, vm32x, ymm2": true,
+	"VPGATHERQD xmm1, vm64x, xmm2": true,
+	"VPGATHERQD xmm1, vm64y, xmm2": true,
+	"VPGATHERQQ xmm1, vm64x, xmm2": true,
+	"VPGATHERQQ ymm1, vm64y, ymm2": true,
+// condPrefs lists preferences for condition code suffixes.
+// The first suffix in each pair takes priority over the second.
+var condPrefs = [][2]string{
+	{"B", "C"},
+	{"B", "NAE"},
+	{"AE", "NB"},
+	{"AE", "NC"},
+	{"E", "Z"},
+	{"NE", "NZ"},
+	{"BE", "NA"},
+	{"A", "NBE"},
+	{"P", "PE"},
+	{"NP", "PO"},
+	{"L", "NGE"},
+	{"GE", "NL"},
+	{"LE", "NG"},
+	{"G", "NLE"},
+// conv16 specifies replacements to turn a 16-bit syntax into a 32-bit syntax.
+// If the conv16 can be applied to one form to create a new form with the same
+// fixed instruction prefix, the pair is tagged as operand16 and operand32
+// respectively.
+var conv16 = strings.NewReplacer(
+	"16:16", "16:32",
+	"16", "32",
+	"AX", "EAX",
+	"CBW", "CWDE",
+	"CWD", "CDQ",
+	"INSW", "INSD",
+	"IRET", "IRETD",
+	"POPA", "POPAD",
+	"POPF", "POPFD",
+// fixup records additional modifications needed that are not derived
+// from the instructions in the manual. It is keyed by the syntax and opcode.
+var fixup = map[[2]string][]fixer{
+	// NOP is a very special case overloading XCHG AX, AX.
+	// The decoder handles it in custom code; exclude from the usual tables.
+	{"NOP", "90"}: {fixAddTag("pseudo")},
+	// PAUSE is a special case of NOP.
+	{"PAUSE", "F3 90"}: {fixAddTag("pseudo")}, // used to add 'keepop' tag but not sure what that means
+	// Far CALL, JMP, RET are given L prefix (long) for disambiguation.
+	{"CALL m16:16", "FF /3"}:       {fixRename("CALL_FAR")},
+	{"CALL m16:32", "FF /3"}:       {fixRename("CALL_FAR")},
+	{"CALL m16:64", "REX.W FF /3"}: {fixRename("CALL_FAR")},
+	{"CALL ptr16:16", "9A cd"}:     {fixRename("CALL_FAR")},
+	{"CALL ptr16:32", "9A cp"}:     {fixRename("CALL_FAR")},
+	{"JMP m16:16", "FF /5"}:        {fixRename("JMP_FAR")},
+	{"JMP m16:32", "FF /5"}:        {fixRename("JMP_FAR")},
+	{"JMP m16:64", "REX.W FF /5"}:  {fixRename("JMP_FAR")},
+	{"JMP ptr16:16", "EA cd"}:      {fixRename("JMP_FAR")},
+	{"JMP ptr16:32", "EA cp"}:      {fixRename("JMP_FAR")},
+	{"RET imm16", "CA iw"}:         {fixRename("RET_FAR"), fixArg(0, "imm16u")},
+	{"RET", "CB"}:                  {fixRename("RET_FAR")},
+	// Unsigned immediates. (RET far imm16 handled above.)
+	// Some of these are just preferences for disassembling.
+	{"ENTER imm16, imm8", "C8 iw ib"}:  {fixArg(1, "imm8b")},
+	{"RET imm16", "C2 iw"}:             {fixArg(0, "imm16u")},
+	{"IN AL, imm8", "E4 ib"}:           {fixArg(1, "imm8u")},
+	{"IN AX, imm8", "E5 ib"}:           {fixArg(1, "imm8u")},
+	{"IN EAX, imm8", "E5 ib"}:          {fixArg(1, "imm8u"), fixAddTag("operand64")},
+	{"OUT imm8, AL", "E6 ib"}:          {fixArg(0, "imm8u")},
+	{"OUT imm8, AX", "E7 ib"}:          {fixArg(0, "imm8u")},
+	{"OUT imm8, EAX", "E7 ib"}:         {fixArg(0, "imm8u"), fixAddTag("operand64")},
+	{"MOV r8op, imm8", "B0+rb ib"}:     {fixArg(1, "imm8u")},
+	{"MOV r8op, imm8", "REX B0+rb ib"}: {fixArg(1, "imm8u"), fixAddTag("pseudo64")},
+	{"MOV r/m8, imm8", "C6 /0 ib"}:     {fixArg(1, "imm8u")},
+	{"MOV r/m8, imm8", "REX C6 /0 ib"}: {fixArg(1, "imm8u"), fixAddTag("pseudo64")},
+	// The listings for MOVSX and MOVSXD do not list some variants that
+	// assemblers seem to allow.
+	// As a result, this instruction got the wrong tag.
+	// The other instructions are listed in extraInsts.
+	{"MOVSX r32, r/m16", "0F BF /r"}: {fixRemoveTag("operand16"), fixAddTag("operand32")},
+	{"MOVZX r32, r/m16", "0F B7 /r"}: {fixRemoveTag("operand16")},
+	// Listings are incomplete or incorrect. Fix tags to adjust for new instructions below.
+	{"SLDT r/m16", "0F 00 /0"}:             {fixRemoveTag("operand32")},
+	{"STR r/m16", "0F 00 /1"}:              {fixAddTag("operand16")},
+	{"BSWAP r32op", "0F C8+rd"}:            {fixRemoveTag("operand16")},
+	{"MOV Sreg, r/m16", "8E /r"}:           {fixRemoveTag("operand32")},
+	{"MOV Sreg, r/m64", "REX.W 8E /r"}:     {fixArg(1, "r/m16")},
+	{"MOV r/m64, Sreg", "REX.W 8C /r"}:     {fixArg(0, "r/m16")},
+	{"MOV r/m16, Sreg", "8C /r"}:           {fixRemoveTag("operand32")},
+	{"MOV r/m64, imm32", "REX.W C7 /0 io"}: {fixOpcode("REX.W C7 /0 id")},
+	// On 64-bit, these ignore 64-bit mode change.
+	{"POP FS", "0F A1"}: {fixIfValid("N.E.", "V", fixAddTag("operand64"))},
+	{"POP GS", "0F A9"}: {fixIfValid("N.E.", "V", fixAddTag("operand64"))},
+	{"LEAVE", "C9"}:     {fixIfValid("N.E.", "V", fixAddTag("operand64"))},
+	{"IN EAX, DX", "ED"}:         {fixAddTag("operand64")},
+	{"INSD", "6D"}:               {fixAddTag("operand64")},
+	{"OUT DX, EAX", "EF"}:        {fixAddTag("operand64")},
+	{"OUTSD", "6F"}:              {fixAddTag("operand64")},
+	{"XBEGIN rel32", "C7 F8 cd"}: {fixAddTag("operand64")},
+	// Treat FWAIT, not WAIT, as canonical.
+	{"FWAIT", "9B"}: {fixRemoveTag("pseudo")},
+	{"WAIT", "9B"}:  {fixAddTag("pseudo")},
+	// LAHF and SAHF are listed as "Invalid*" for 64-bit mode.
+	// They are actually defined, so Valid from our point of view.
+	// It's just that only a very few 64-bit processors allowed them.
+	{"LAHF", "9F"}: {fixValid("V", "V")},
+	{"SAHF", "9E"}: {fixValid("V", "V")},
+	// The JZ forms are listed twice in the table, which confuses things.
+	{"JZ rel16", "0F 84 cw"}: {fixAddTag("operand16"), fixRemoveTag("operand32")},
+	{"JZ rel32", "0F 84 cd"}: {fixAddTag("operand32"), fixRemoveTag("operand16")},
+	// XCHG has two of every instruction, which makes things bad.
+	// The XX hack below takes care of most problems but this one remains.
+	{"XCHG r/m16, r16", "87 /r"}: {fixRemoveTag("pseudo")},
+	// MOV CR8 is just the obvious extension of the MOV CR0-CR7 form.
+	{"MOV rmr64, CR8", "REX.R + 0F 20 /0"}: {fixAddTag("pseudo")},
+	{"MOV CR8, rmr64", "REX.R + 0F 22 /0"}: {fixAddTag("pseudo")},
+	{"ADCX r32, r/m32", "66 0F 38 F6 /r"}: {fixAddTag("operand16"), fixAddTag("operand32")},
+	{"ADOX r32, r/m32", "F3 0F 38 F6 /r"}: {fixAddTag("operand16"), fixAddTag("operand32")},
+	{"POPFQ", "9D"}:                       {fixAddTag("operand32"), fixAddTag("operand64")},
+	{"PUSHFQ", "9C"}:                      {fixAddTag("operand32"), fixAddTag("operand64")},
+	{"JCXZ rel8", "E3 cb"}:                {fixAddTag("address16")},
+	{"JECXZ rel8", "E3 cb"}:               {fixAddTag("address32")},
+	{"JRCXZ rel8", "E3 cb"}:               {fixAddTag("address64")},
+	{"PUSH r64op", "50+rd"}:               {fixAddTag("operand32"), fixAddTag("operand64")},
+	{"PUSH r/m64", "FF /6"}:               {fixAddTag("operand32"), fixAddTag("operand64")},
+	{"POP r64op", "58+rd"}:                {fixAddTag("operand32"), fixAddTag("operand64")},
+	{"POP r/m64", "8F /0"}:                {fixAddTag("operand32"), fixAddTag("operand64")},
+	{"SMSW r/m16", "0F 01 /4"}:            {fixAddTag("operand16")},
+	{"SMSW r32/m16", "0F 01 /4"}:          {fixRemoveTag("operand16"), fixAddTag("operand32")},
+	// Express to the decoder that the rel16 only applies in 16-bit operand mode.
+	{"JA rel16", "0F 87 cw"}:  {fixAddTag("operand16")},
+	{"JAE rel16", "0F 83 cw"}: {fixAddTag("operand16")},
+	{"JB rel16", "0F 82 cw"}:  {fixAddTag("operand16")},
+	{"JBE rel16", "0F 86 cw"}: {fixAddTag("operand16")},
+	{"JE rel16", "0F 84 cw"}:  {fixAddTag("operand16")},
+	{"JG rel16", "0F 8F cw"}:  {fixAddTag("operand16")},
+	{"JGE rel16", "0F 8D cw"}: {fixAddTag("operand16")},
+	{"JL rel16", "0F 8C cw"}:  {fixAddTag("operand16")},
+	{"JLE rel16", "0F 8E cw"}: {fixAddTag("operand16")},
+	{"JNE rel16", "0F 85 cw"}: {fixAddTag("operand16")},
+	{"JNO rel16", "0F 81 cw"}: {fixAddTag("operand16")},
+	{"JNP rel16", "0F 8B cw"}: {fixAddTag("operand16")},
+	{"JNS rel16", "0F 89 cw"}: {fixAddTag("operand16")},
+	{"JO rel16", "0F 80 cw"}:  {fixAddTag("operand16")},
+	{"JP rel16", "0F 8A cw"}:  {fixAddTag("operand16")},
+	{"JS rel16", "0F 88 cw"}:  {fixAddTag("operand16")},
+	{"JA rel32", "0F 87 cd"}:  {fixAddTag("operand32")},
+	{"JAE rel32", "0F 83 cd"}: {fixAddTag("operand32")},
+	{"JB rel32", "0F 82 cd"}:  {fixAddTag("operand32")},
+	{"JBE rel32", "0F 86 cd"}: {fixAddTag("operand32")},
+	{"JE rel32", "0F 84 cd"}:  {fixAddTag("operand32")},
+	{"JG rel32", "0F 8F cd"}:  {fixAddTag("operand32")},
+	{"JGE rel32", "0F 8D cd"}: {fixAddTag("operand32")},
+	{"JL rel32", "0F 8C cd"}:  {fixAddTag("operand32")},
+	{"JLE rel32", "0F 8E cd"}: {fixAddTag("operand32")},
+	{"JNE rel32", "0F 85 cd"}: {fixAddTag("operand32")},
+	{"JNO rel32", "0F 81 cd"}: {fixAddTag("operand32")},
+	{"JNP rel32", "0F 8B cd"}: {fixAddTag("operand32")},
+	{"JNS rel32", "0F 89 cd"}: {fixAddTag("operand32")},
+	{"JO rel32", "0F 80 cd"}:  {fixAddTag("operand32")},
+	{"JP rel32", "0F 8A cd"}:  {fixAddTag("operand32")},
+	{"JS rel32", "0F 88 cd"}:  {fixAddTag("operand32")},
+	{"LSL r16, r/m16", "0F 03 /r"}: {fixAddTag("operand16")},
+var extraInsts = []*instruction{
+	// Undocumented.
+	{syntax: "ICEBP", opcode: "F1", valid32: "V", valid64: "V"},
+	{syntax: "UD1", opcode: "0F B9", valid32: "V", valid64: "V"},
+	{syntax: "FFREEP ST(i)", opcode: "DF C0+i", valid32: "V", valid64: "V", action: "w"},
+	// Where did these come from? They were in version 0.01 of the csv table.
+	{syntax: "MOVNTSD m64, xmm1", opcode: "F2 0F 2B /r", valid32: "V", valid64: "V", cpuid: "SSE", action: "w,r"},
+	{syntax: "MOVNTSS m32, xmm1", opcode: "F3 0F 2B /r", valid32: "V", valid64: "V", cpuid: "SSE", action: "w,r"},
+	// These express to the decoder that in 64-bit mode
+	// an operand prefix does not affect the size of the relative offset.
+	{syntax: "CALL rel32", opcode: "E8 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JMP rel32", opcode: "E9 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JA rel32", opcode: "0F 87 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JAE rel32", opcode: "0F 83 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JB rel32", opcode: "0F 82 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JBE rel32", opcode: "0F 86 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JE rel32", opcode: "0F 84 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JG rel32", opcode: "0F 8F cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JGE rel32", opcode: "0F 8D cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JL rel32", opcode: "0F 8C cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JLE rel32", opcode: "0F 8E cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JNE rel32", opcode: "0F 85 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JNO rel32", opcode: "0F 81 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JNP rel32", opcode: "0F 8B cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JNS rel32", opcode: "0F 89 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JO rel32", opcode: "0F 80 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JP rel32", opcode: "0F 8A cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	{syntax: "JS rel32", opcode: "0F 88 cd", valid32: "N.S.", valid64: "V", tags: []string{"operand16", "operand64"}, action: "r"},
+	// Disassemblers recognize these, but they're not in the manual.
+	// Not sure if they really exist.
+	// The 16-16 and 32-32 forms don't really make sense since there's nothing to extend.
+	{syntax: "MOVSX r16, r/m16", opcode: "0F BF /r", valid32: "V", valid64: "V", tags: []string{"operand16"}, action: "w,r"},
+	{syntax: "MOVSXD r16, r/m32", opcode: "63 /r", valid32: "N.E.", valid64: "V", tags: []string{"operand16"}, action: "w,r"},
+	{syntax: "MOVSXD r32, r/m32", opcode: "63 /r", valid32: "N.E.", valid64: "V", tags: []string{"operand32"}, action: "w,r"},
+	{syntax: "MOVZX r16, r/m16", opcode: "0F B7 /r", valid32: "V", valid64: "V", tags: []string{"operand16"}, action: "w,r"},
+	{syntax: "LAR r64, r/m16", opcode: "REX.W 0F 02 /r", valid32: "N.E.", valid64: "V", action: "w,r"},
+	{syntax: "SLDT r32/m16", opcode: "0F 00 /0", valid32: "V", valid64: "V", tags: []string{"operand32"}, action: "w"},
+	{syntax: "STR r32/m16", opcode: "0F 00 /1", valid32: "V", valid64: "V", tags: []string{"operand32"}, action: "w"},
+	{syntax: "STR r64/m16", opcode: "REX.W 0F 00 /1", valid32: "N.E.", valid64: "V", action: "w"},
+	{syntax: "BSWAP r16op", opcode: "0F C8+rd", valid32: "V", valid64: "V", tags: []string{"operand16"}, action: "rw"},
+	// Do these exist?
+	// I am not sure where they came from, and xed doesn't recognize them.
+	//{syntax: "MOV TR0-TR7, rmr32", opcode: "0F 26 /r", valid32: "V", valid64: "N.E.", tags: []string{"modrm_regonly"}, action: "w,r"},
+	//{syntax: "MOV TR0-TR7, rmr64", opcode: "0F 26 /r", valid32: "N.E.", valid64: "V", tags: []string{"modrm_regonly"}, action: "w,r"},
+	//{syntax: "MOV rmr32, TR0-TR7", opcode: "0F 24 /r", valid32: "V", valid64: "N.E.", tags: []string{"modrm_regonly"}, action: "w,r"},
+	//{syntax: "MOV rmr64, TR0-TR7", opcode: "0F 24 /r", valid32: "N.E.", valid64: "V", tags: []string{"modrm_regonly"}, action: "w,r"},
+	{syntax: "MOV Sreg, r32/m16", opcode: "8E /r", valid32: "V", valid64: "V", tags: []string{"operand32"}, action: "w,r"},
+	{syntax: "MOV r/m32, Sreg", opcode: "8C /r", valid32: "V", valid64: "V", tags: []string{"operand32"}, action: "w,r"},
+type fixer func(*instruction)
+func fixAddTag(tag string) fixer {
+	return func(inst *instruction) {
+		addTag(inst, tag)
+	}
+func fixRemoveTag(tag string) fixer {
+	return func(inst *instruction) {
+		removeTag(inst, tag)
+	}
+func fixRename(op string) fixer {
+	return func(inst *instruction) {
+		_, args := splitSyntax(inst.syntax)
+		inst.syntax = joinSyntax(op, args)
+	}
+func fixArg(i int, arg string) fixer {
+	return func(inst *instruction) {
+		op, args := splitSyntax(inst.syntax)
+		args[i] = arg
+		inst.syntax = joinSyntax(op, args)
+	}
+func fixIfValid(valid32, valid64 string, fix fixer) fixer {
+	return func(inst *instruction) {
+		if inst.valid32 == valid32 && inst.valid64 == valid64 {
+			fix(inst)
+		}
+	}
+func fixValid(valid32, valid64 string) fixer {
+	return func(inst *instruction) {
+		inst.valid32 = valid32
+		inst.valid64 = valid64
+	}
+func fixOpcode(opcode string) fixer {
+	return func(inst *instruction) {
+		inst.opcode = opcode
+	}
+func cleanup(insts []*instruction) []*instruction {
+	var haveOp map[string]bool
+	if onlySomePages {
+		haveOp = map[string]bool{}
+	}
+	// Clean individual instruction encodings and opcode sequences.
+	sawJZ := map[string]bool{}
+	out := insts[:0]
+	for seq, inst := range insts {
+		inst.seq = seq
+		// There are two copies each of JZ rel16 and JZ rel32. Delete the second.
+		if strings.HasPrefix(inst.syntax, "JZ rel") {
+			if sawJZ[inst.syntax] {
+				continue
+			}
+			sawJZ[inst.syntax] = true
+		}
+		out = append(out, inst)
+		// Intel CMPXCHG16B and CMPXCHG8B have surprise "m64" or " m128" at end of encoding.
+		surprises := []string{
+			" m64",
+			" m128",
+		}
+		for _, s := range surprises {
+			if strings.HasSuffix(inst.syntax, s) && strings.HasSuffix(inst.opcode, s) {
+				inst.opcode = strings.TrimSuffix(inst.opcode, s)
+			}
+		}
+		op, args := splitSyntax(inst.syntax)
+		op = strings.TrimRight(op, "*")
+		inst.syntax = joinSyntax(op, args)
+		// Check argument names in syntax against encoding details.
+		if enc, ok := encodings[inst.syntax]; ok {
+			inst.args = enc
+		}
+		if len(args) == len(inst.args)+1 && args[len(args)-1] == "imm8" {
+			fixed := make([]string, len(args))
+			copy(fixed, inst.args)
+			fixed[len(args)-1] = "imm8"
+			inst.args = fixed
+		} else if len(args) == 0 && len(inst.args) == 1 && inst.args[0] == "NA" {
+			inst.args = []string{}
+		} else if len(args) != len(inst.args) {
+			fmt.Fprintf(os.Stderr, "p.%d: %s has %d args but %d encoding details:\n\t%s\n", inst.page, inst.syntax, len(args), len(inst.args), strings.Join(inst.args, "; "))
+			inst.syntax = joinSyntax(op, args)
+			continue
+		}
+		var action []string
+		for i, arg := range args {
+			arg = strings.TrimSpace(arg)
+			arg = strings.TrimRight(arg, "*")
+			if (arg == "reg" || strings.HasPrefix(arg, "reg/")) && containsAll(inst.desc, "upper bits", "r64", "zero") {
+				arg = "r32" + strings.TrimPrefix(arg, "reg")
+			}
+			enc := inst.args[i]
+			enc = strings.TrimSpace(enc)
+			switch {
+			case strings.HasSuffix(enc, " (r))"):
+				enc = strings.TrimSuffix(enc, ")")
+			case strings.HasSuffix(enc, " (R)"):
+				enc = strings.TrimSuffix(enc, " (R)") + " (r)"
+			case strings.HasSuffix(enc, " (W)"):
+				enc = strings.TrimSuffix(enc, " (W)") + " (w)"
+			case strings.HasSuffix(enc, " (r,w)"):
+				enc = strings.TrimSuffix(enc, " (r,w)") + " (r, w)"
+			case enc == "Imm8":
+				enc = "imm8"
+			case enc == "imm8/26/32":
+				enc = "imm8/16/32"
+			case enc == "BaseReg (R): VSIB:base, VectorReg(R): VSIB:index":
+				enc = "vsib (r)"
+			}
+			inst.args[i] = enc
+			switch {
+			case strings.HasSuffix(enc, " (r)"):
+				action = append(action, "r")
+				enc = strings.TrimSuffix(enc, " (r)")
+			case strings.HasSuffix(enc, " (w)"):
+				action = append(action, "w")
+				enc = strings.TrimSuffix(enc, " (w)")
+			case strings.HasSuffix(enc, " (r, w)"):
+				action = append(action, "rw")
+				enc = strings.TrimSuffix(enc, " (r, w)")
+			case strings.HasPrefix(enc, "imm"), enc == "Offset", enc == "iw", arg == "1", arg == "0", arg == "3":
+				action = append(action, "r")
+			case i < len(opAction[op]):
+				action = append(action, opAction[op][i])
+			default:
+				fmt.Fprintf(os.Stderr, "p.%d: %s has encoding %s for %s but no r/w annotations\n", inst.page, inst.syntax, enc, arg)
+				action = append(action, "?")
+			}
+			if arg == "mem" && op == "LDDQU" {
+				arg = "m128"
+			}
+			if arg == "reg" && op == "LAR" {
+				arg = "r32"
+			}
+			if actual := encodeReplace[[2]string{arg, enc}]; actual != "" {
+				arg = actual
+			}
+			if (arg == "r8" || arg == "r16" || arg == "r32" || arg == "r64") && enc == "ModRM:r/m" {
+				addTag(inst, "modrm_regonly")
+				arg = "rmr" + arg[1:]
+			}
+			if (arg == "xmm2" || arg == "ymm2") && enc == "ModRM:r/m" {
+				addTag(inst, "modrm_regonly")
+			}
+			if (arg == "m8" || arg == "m16" || arg == "m32" || arg == "m64" || arg == "m128" || arg == "m256") && enc == "ModRM:r/m" {
+				addTag(inst, "modrm_memonly")
+			}
+			if arg == "r64" && (inst.syntax == "MOV r64, CR8" || inst.syntax == "MOV CR8, r64") {
+				arg = "rmr64"
+				addTag(inst, "modrm_regonly")
+			}
+			if arg == "CR8" {
+				enc = ""
+			}
+			if !encodeOK[[2]string{arg, enc}] {
+				fmt.Fprintf(os.Stderr, "p.%d: %s has invalid encoding %s for %s\n\t{%q, %q}: true,\n", inst.page, inst.syntax, enc, arg, arg, enc)
+			}
+			args[i] = arg
+			// Intel SETcc and others are missing the /r.
+			// But CALL rel16 and CALL rel32 have a bad encoding table so ignore the ModRM there.
+			if strings.HasPrefix(enc, "ModRM") && !strings.Contains(inst.opcode, " /") && op != "CALL" {
+				inst.opcode += " /r"
+			}
+			if strings.HasPrefix(enc, "ModRM:reg") && !strings.Contains(inst.opcode, "/r") {
+				// The opcode is taken up with something else. Bug in table.
+				fmt.Fprintf(os.Stderr, "p.%d: %s has invalid encoding %s: no reg field in %s\n", inst.page, inst.syntax, arg, inst.opcode)
+			}
+			// XBEGIN is missing cw cd.
+			if enc == "Offset" && arg == "rel16" && !strings.Contains(inst.opcode, " cw") {
+				inst.opcode += " cw"
+			}
+			if enc == "Offset" && arg == "rel32" && !strings.Contains(inst.opcode, " cd") {
+				inst.opcode += " cd"
+			}
+			if enc == "Moffs" && !strings.Contains(inst.opcode, "cm") {
+				inst.opcode += " cm"
+			}
+			inst.action = strings.Join(action, ",")
+		}
+		inst.syntax = joinSyntax(op, args)
+		// The Intel manual lists each XCHG form with arguments in both orders.
+		// While this is technically correct, it confuses lots of the analysis.
+		// Change half of them to start with a fake "XX" byte.
+		if op == "XCHG" && !strings.HasPrefix(args[0], "r/") && !strings.HasSuffix(args[0], "op") {
+			inst.opcode = "XX " + inst.opcode
+		}
+		// Intel manual is not great about disabling REX instructions on 32-bit systems.
+		if strings.Contains(inst.opcode, "REX") && inst.valid32 == "V" {
+			inst.valid32 = "N.E."
+		}
+		if inst.valid32 == "V" {
+			switch {
+			case containsAll(inst.compat, "not supported", "earlier than the Intel486"):
+				inst.cpuid = "486"
+			case containsAll(inst.compat, "not supported", "earlier than the Pentium"),
+				containsAll(inst.compat, "were introduced", "with the Pentium"):
+				inst.cpuid = "Pentium"
+			case containsAll(inst.compat, "were introduced", "in the Pentium II"):
+				inst.cpuid = "PentiumII"
+			case containsAll(inst.compat, "were introduced", "in the P6 family"),
+				containsAll(inst.compat, "were introduced in P6 family"):
+				addTag(inst, "P6")
+			}
+		}
+		if onlySomePages {
+			op, _ := splitSyntax(inst.syntax)
+			haveOp[op] = true
+		}
+	}
+	insts = out
+	sort.Sort(byOpcode(insts))
+	// Detect operand size dependencies.
+	var last *instruction
+	for _, inst := range insts {
+		if last != nil {
+			f1, _ := splitOpcode(last.opcode)
+			f2, _ := splitOpcode(inst.opcode)
+			if f1 == f2 {
+				// Conflict: cannot distinguish instructions based on fixed prefix.
+				if is16vs32pair(last, inst) {
+					addTag(last, "operand16")
+					addTag(inst, "operand32")
+					continue
+				}
+				if is16vs32pair(inst, last) {
+					addTag(last, "operand32")
+					addTag(inst, "operand16")
+					last = inst
+					continue
+				}
+			}
+		}
+		last = inst
+	}
+	// Detect pseudo-ops, defined as opcode entries subsumed by more general ones.
+	seen := map[string]*instruction{}
+	for _, inst := range insts {
+		if strings.HasPrefix(inst.opcode, "9B ") { // FWAIT prefix
+			addTag(inst, "pseudo")
+			continue
+		}
+		if inst.opcode == "F0" || inst.opcode == "F2" || inst.opcode == "F3" {
+			addTag(inst, "pseudo")
+			continue
+		}
+		if strings.HasPrefix(inst.syntax, "REP ") || strings.HasPrefix(inst.syntax, "REPE ") || strings.HasPrefix(inst.syntax, "REPNE ") {
+			addTag(inst, "pseudo")
+			continue
+		}
+		if strings.HasPrefix(inst.syntax, "SAL ") { // SHL is canonical
+			addTag(inst, "pseudo")
+			continue
+		}
+		if old := seen[inst.opcode]; old != nil {
+			if condLess(old.syntax, inst.syntax) {
+				addTag(inst, "pseudo")
+				continue
+			}
+			if xchgLess(inst.syntax, old.syntax) {
+				old.tags = append(old.tags, "pseudo")
+				seen[inst.opcode] = inst
+				continue
+			}
+		}
+		seen[inst.opcode] = inst
+		if last != nil && canGenerate(last.opcode, inst.opcode) {
+			addTag(inst, "pseudo")
+			continue
+		}
+		last = inst
+	}
+	for _, inst := range insts {
+		if strings.Contains(inst.opcode, "REX ") {
+			if old := seen[strings.Replace(inst.opcode, "REX ", "", 1)]; old != nil && old.syntax == inst.syntax {
+				addTag(inst, "pseudo64")
+				continue
+			} else if old != nil && hasTag(old, "pseudo") {
+				addTag(inst, "pseudo")
+				continue
+			}
+		}
+		if strings.Contains(inst.opcode, "REX.W ") {
+			if old := seen[strings.Replace(inst.opcode, "REX.W ", "", -1)]; old != nil && old.syntax == inst.syntax {
+				addTag(old, "ignoreREXW")
+				addTag(inst, "pseudo")
+				continue
+			} else if old != nil && hasTag(old, "pseudo") {
+				addTag(inst, "pseudo")
+				continue
+			} else if old != nil && !hasTag(old, "operand16") && !hasTag(old, "operand32") {
+				// There is a 64-bit form of this instruction.
+				// Mark this one as only valid in the non-64-bit operand modes.
+				addTag(old, "operand16")
+				addTag(old, "operand32")
+				continue
+			}
+		}
+	}
+	// Undo XCHG hack above.
+	for _, inst := range insts {
+		if strings.HasPrefix(inst.opcode, "XX ") {
+			inst.opcode = strings.TrimPrefix(inst.opcode, "XX ")
+			addTag(inst, "pseudo")
+			removeTag(inst, "pseudo64")
+		}
+	}
+	// Last ditch effort. Manual fixes.
+	// Some things are too hard to infer.
+	for _, inst := range insts {
+		for _, fix := range fixup[[2]string{inst.syntax, inst.opcode}] {
+			fix(inst)
+		}
+		sort.Strings(inst.tags)
+	}
+	sort.Sort(bySeq(insts))
+	if onlySomePages {
+		for _, inst := range extraInsts {
+			op, _ := splitSyntax(inst.syntax)
+			if haveOp[op] {
+				insts = append(insts, inst)
+			}
+		}
+	} else {
+		insts = append(insts, extraInsts...)
+	}
+	return insts
+func hasTag(inst *instruction, tag string) bool {
+	for _, t := range inst.tags {
+		if t == tag {
+			return true
+		}
+	}
+	return false
+func removeTag(inst *instruction, tag string) {
+	if !hasTag(inst, tag) {
+		return
+	}
+	out := inst.tags[:0]
+	for _, t := range inst.tags {
+		if t != tag {
+			out = append(out, t)
+		}
+	}
+	inst.tags = out
+func addTag(inst *instruction, tag string) {
+	if !hasTag(inst, tag) {
+		inst.tags = append(inst.tags, tag)
+	}
+type byOpcode []*instruction
+func (x byOpcode) Len() int      { return len(x) }
+func (x byOpcode) Swap(i, j int) { x[i], x[j] = x[j], x[i] }
+func (x byOpcode) Less(i, j int) bool {
+	if x[i].opcode != x[j].opcode {
+		return opcodeLess(x[i].opcode, x[j].opcode)
+	}
+	if condLess(x[i].syntax, x[j].syntax) {
+		return true
+	}
+	if condLess(x[j].syntax, x[i].syntax) {
+		return false
+	}
+	if x[i].syntax != x[j].syntax {
+		return x[i].syntax < x[j].syntax
+	}
+	return x[i].seq < x[j].seq
+type bySeq []*instruction
+func (x bySeq) Len() int      { return len(x) }
+func (x bySeq) Swap(i, j int) { x[i], x[j] = x[j], x[i] }
+func (x bySeq) Less(i, j int) bool {
+	return x[i].seq < x[j].seq
+type bySyntax []*instruction
+func (x bySyntax) Len() int      { return len(x) }
+func (x bySyntax) Swap(i, j int) { x[i], x[j] = x[j], x[i] }
+func (x bySyntax) Less(i, j int) bool {
+	if x[i].syntax != x[j].syntax {
+		return x[i].syntax < x[j].syntax
+	}
+	return x[i].opcode < x[j].opcode
+// condLess reports whether the conditional instruction syntax
+// x should be considered less than y.
+// We sort condition codes we prefer ahead of condition codes we don't,
+// so that the latter are recorded as the pseudo-operations.
+func condLess(x, y string) bool {
+	x, _ = splitSyntax(x)
+	y, _ = splitSyntax(y)
+	for _, pref := range condPrefs {
+		if strings.HasSuffix(x, pref[0]) && strings.HasSuffix(y, pref[1]) && strings.TrimSuffix(x, pref[0]) == strings.TrimSuffix(y, pref[1]) {
+			return true
+		}
+	}
+	return false
+// xchgLess reports whether the xchg instruction x should be considered less than y.
+func xchgLess(x, y string) bool {
+	return strings.HasPrefix(x, "XCHG ") && x > y
+// opcodeLess reports whether opcode string x should be considered less than y.
+// We sort wildcard fields like "ib" before literal bytes like "0A".
+func opcodeLess(x, y string) bool {
+	for i := 0; i < len(x) || i < len(y); i++ {
+		if i >= len(x) {
+			return true
+		}
+		if i >= len(y) {
+			return false
+		}
+		if x[i] != y[i] {
+			// sort word before doubleword
+			if x[i] == 'w' && y[i] == 'd' {
+				return true
+			}
+			if x[i] == 'd' && y[i] == 'w' {
+				return false
+			}
+			// Sort lower-case before non-lower-case.
+			// This sorts "ib" before literal bytes like "0A", for example.
+			return x[i]-'a' < y[i]-'a'
+		}
+	}
+	return false
+// splitOpcode splits an opcode into its fixed and variable portions.
+// For example "05 iw" splits into "05" and "iw".
+func splitOpcode(x string) (fixed, variable string) {
+	i := 0
+	for i < len(x) {
+		c := x[i]
+		if '0' <= c && c <= '9' || 'A' <= c && c <= 'Z' || c == ' ' || c == '.' || c == '+' {
+			i++
+			continue
+		}
+		if i+2 <= len(x) && c == '/' {
+			i += 2
+			continue
+		}
+		break
+	}
+	return strings.TrimSpace(x[:i]), x[i:]
+// canGenerate reports whether opcode string x can generate opcode string y.
+// For example "D5 ib" can generate "D5 0A".
+// Any string x is not considered to generate itself.
+func canGenerate(x, y string) bool {
+	i := 0
+	for i < len(x) && i < len(y) && x[i] == y[i] {
+		i++
+	}
+	if i == len(x) || i == len(y) {
+		return false
+	}
+	switch x[i:] {
+	case "ib":
+		return len(y[i:]) == 2 && allHex(y[i:])
+	case "0+i":
+		return len(y[i:]) == 1 && '0' <= y[i] && y[i] <= '7'
+	case "8+i":
+		return len(y[i:]) == 1 && (y[i] == '8' || y[i] == '9' || 'A' <= y[i] && y[i] <= 'F')
+	}
+	return false
+// allHex reports whether s is entirely hex digits.
+func allHex(s string) bool {
+	for _, c := range s {
+		if '0' <= c && c <= '9' || 'A' <= c && c <= 'F' {
+			continue
+		}
+		return false
+	}
+	return true
+// is16vs32pair reports whether x and y are the 16- and 32-bit variants of the same instruction,
+// based on analysis of the mnemonic syntax.
+func is16vs32pair(x, y *instruction) bool {
+	return conv16.Replace(x.syntax) == y.syntax ||
+		strings.Replace(x.syntax, "r16, r/", "r32, r32/", -1) == y.syntax || // LSL etc
+		strings.Replace(x.syntax, "r16", "r32", 1) == y.syntax // MOVSXD, MOVSX, etc
+func containsAll(x string, targ ...string) bool {
+	for _, y := range targ {
+		i := strings.Index(x, y)
+		if i < 0 {
+			return false
+		}
+		x = x[i+len(y):]
+	}
+	return true
diff --git a/x86/x86spec/format.go b/x86/x86spec/format.go
new file mode 100644
index 0000000..ba56a6f
--- /dev/null
+++ b/x86/x86spec/format.go
@@ -0,0 +1,652 @@
+// Copyright 2016 The Go Authors.  All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+// Derive format specifications.
+package main
+import (
+	"sort"
+	"strings"
+func format(insts []*instruction) {
+	// Determine opcodes that come in multiple sizes
+	// and could need disambiguating suffixes.
+	// Mark those with multisize=true.
+	sort.Sort(bySyntax(insts))
+	needSize := make(map[string]bool)
+	for i := 0; i < 2; i++ {
+		seen := make(map[string]bool)
+		for _, inst := range insts {
+			if hasTag(inst, "pseudo") || hasTag(inst, "pseudo64") {
+				continue
+			}
+			switch i {
+			case 0:
+				if inst.valid32 != "V" {
+					continue
+				}
+			case 1:
+				if inst.valid64 != "V" {
+					continue
+				}
+			}
+			unsized := stripSize.Replace(inst.syntax)
+			if seen[unsized] {
+				op, _ := splitSyntax(inst.syntax)
+				needSize[op] = true
+			}
+			seen[unsized] = true
+		}
+	}
+	for _, inst := range insts {
+		op, _ := splitSyntax(inst.syntax)
+		if needSize[op] || forceNeedSize[op] {
+			inst.multisize = "Y"
+		}
+	}
+	// Assign data sizes.
+	for _, inst := range insts {
+		if inst.multisize != "Y" {
+			continue
+		}
+		op, args := splitSyntax(inst.syntax)
+	Args:
+		for i := startArg[op]; i < len(args); i++ {
+			switch args[i] {
+			case "AL", "r8", "r8op", "r/m8":
+				inst.datasize = 8
+				break Args
+			case "AX", "r16", "r16op", "r/m16":
+				inst.datasize = 16
+				break Args
+			case "EAX", "r32", "r32op", "r/m32", "rmr32", "m32fp", "m32int":
+				inst.datasize = 32
+				break Args
+			case "RAX", "r64", "r64op", "r/m64", "rmr64", "m64fp", "m64int":
+				inst.datasize = 64
+				break Args
+			case "m80fp":
+				inst.datasize = 80
+				break Args
+			case "xmm2/m128":
+				inst.datasize = 128
+				break Args
+			case "ymm2/m256":
+				inst.datasize = 256
+				break Args
+			}
+		}
+	}
+	// Determine GNU syntax for instructions.
+	// With a few exceptions, it's the Intel opcode plus an optional suffix,
+	// followed by the reversed argument list.
+	for _, inst := range insts {
+		op, args := splitSyntax(inst.syntax)
+		intelOp := op
+		op = strings.ToLower(op)
+		if custom, ok := gnuOpcode[inst.syntax]; ok {
+			op = custom
+		} else {
+			if inst.multisize == "Y" {
+				suffix := defaultSizeSuffix[inst.datasize]
+				if custom, ok := gnuSizeSuffix[op]; ok {
+					suffix = custom[inst.datasize]
+				}
+				op += suffix
+			}
+		}
+		switch intelOp {
+		case "BOUND", "ENTER":
+			// no reversal
+		default:
+			for i, j := 0, len(args)-1; i < j; i, j = i+1, j-1 {
+				args[i], args[j] = args[j], args[i]
+			}
+		}
+		inst.gnuSyntax = joinSyntax(op, args)
+	}
+	// Determine Go syntax for instructions.
+	// Similar to GNU syntax (really they are both similar to "AT&T" syntax)
+	// but upper case and not reversing the argument list for a few instructions,
+	// like comparisons.
+	for _, inst := range insts {
+		intelOp, args := splitSyntax(inst.syntax)
+		// start with GNU op, because it has suffixes already
+		op, _ := splitSyntax(inst.gnuSyntax)
+		op = strings.ToUpper(op)
+		if custom, ok := goOpcode[inst.syntax]; ok {
+			op = custom
+		} else if custom, ok := goOpcode[intelOp]; ok {
+			op = custom
+		} else if custom, ok := goOpcode[op]; ok {
+			op = custom
+		} else if suffix, ok := goSizeSuffix[op]; ok {
+			op += suffix[inst.datasize]
+		}
+		switch intelOp {
+		case "CMP":
+			// no reversal
+		case "CMPPD", "CMPPS", "CMPSD", "CMPSS":
+			// rotate destination to end but don't swap comparison operands
+			if len(args) == 3 {
+				args[0], args[1], args[2] = args[2], args[0], args[1]
+				break
+			}
+			fallthrough
+		default:
+			for i, j := 0, len(args)-1; i < j; i, j = i+1, j-1 {
+				args[i], args[j] = args[j], args[i]
+			}
+		}
+		inst.goSyntax = joinSyntax(op, args)
+	}
+var forceNeedSize = map[string]bool{
+	"SAL": true,
+var stripSize = strings.NewReplacer(
+	"rel8", "rel8", // leave these alone
+	"rel16", "rel16",
+	"rel32", "rel32",
+	"8", "#",
+	"16", "#",
+	"32", "#",
+	"64", "#",
+	"xmm2/m128", "xy/#",
+	"ymm2/m256", "xy/#",
+	"EAX", "AX",
+var defaultSizeSuffix = map[int]string{
+	8:  "b",
+	16: "w",
+	32: "l",
+	64: "q",
+var gnuSizeSuffix = map[string]map[int]string{
+	"cvtsd2si":   {64: "q"},
+	"cvtss2si":   {64: "q"},
+	"cvttsd2si":  {64: "q"},
+	"cvttss2si":  {64: "q"},
+	"vcvtsd2si":  {64: "q"},
+	"vcvtss2si":  {64: "q"},
+	"vcvttsd2si": {64: "q"},
+	"vcvttss2si": {64: "q"},
+	"vcvtpd2dq":  {128: "x", 256: "y"},
+	"vcvtpd2ps":  {128: "x", 256: "y"},
+	"vcvttpd2dq": {128: "x", 256: "y"},
+	"vcvttpd2ps": {128: "x", 256: "y"},
+	"fadd":  {32: "s", 64: "l"},
+	"fcom":  {32: "s", 64: "l"},
+	"fcomp": {32: "s", 64: "l"},
+	"fdiv":  {32: "s", 64: "l"},
+	"fdivr": {32: "s", 64: "l"},
+	"fmul":  {32: "s", 64: "l"},
+	"fsub":  {32: "s", 64: "l"},
+	"fsubr": {32: "s", 64: "l"},
+	"fld":  {32: "s", 64: "l", 80: "t"},
+	"fst":  {32: "s", 64: "l", 80: "t"},
+	"fstp": {32: "s", 64: "l", 80: "t"},
+	"fiadd":  {32: "l"},
+	"ficom":  {32: "l"},
+	"ficomp": {32: "l"},
+	"fidiv":  {32: "l"},
+	"fidivr": {32: "l"},
+	"fimul":  {32: "l"},
+	"fist":   {32: "l"},
+	"fisub":  {32: "l"},
+	"fisubr": {32: "l"},
+	"fild":   {32: "l", 64: "ll"},
+	"fistp":  {32: "l", 64: "ll"},
+	"fisttp": {32: "l", 64: "ll"},
+	"fldenv": {64: "l"},
+	// These can be distinguished by register name (%rcx vs %ecx)
+	// and objdump refuses to put suffixes on them.
+	"bswap":    {},
+	"rdfsbase": {},
+	"rdgsbase": {},
+	"rdrand":   {},
+	"rdseed":   {},
+	"wrfsbase": {},
+	"wrgsbase": {},
+var gnuOpcode = map[string]string{
+	// Simple name changes.
+	"CBW":    "cbtw",
+	"CDQ":    "cltd",
+	"CDQE":   "cltq",
+	"CMPSD":  "cmpsl",
+	"CQO":    "cqto",
+	"CWD":    "cwtd",
+	"CWDE":   "cwtl",
+	"INSD":   "insl",
+	"LODSD":  "lodsl",
+	"MOVSD":  "movsl",
+	"OUTSD":  "outsl",
+	"PUSHAD": "pushal",
+	"PUSHFD": "pushfl",
+	"POPAD":  "popal",
+	"POPFD":  "popfl",
+	"STOSD":  "stosl",
+	"XLATB":  "xlat",
+	"POPA":   "popaw",
+	"POPF":   "popfw",
+	"PUSHA":  "pushaw",
+	"PUSHF":  "pushfw",
+	"SCASD":  "scasl",
+	// Two-operand FDIV and FDIVR are inverted, but only for the ST(i), ST(0) form.
+	// I think this is a bug in the GNU tools but perhaps one that must be historically maintained.
+	"FDIV ST(i), ST(0)":   "fdivr",
+	"FDIVR ST(i), ST(0)":  "fdiv",
+	"FDIVP ST(i), ST(0)":  "fdivrp",
+	"FDIVRP ST(i), ST(0)": "fdivp",
+	"FSUB ST(i), ST(0)":   "fsubr",
+	"FSUBR ST(i), ST(0)":  "fsub",
+	"FSUBP ST(i), ST(0)":  "fsubrp",
+	"FSUBRP ST(i), ST(0)": "fsubp",
+	"MOV r64op, imm64": "movabsq",
+	"MOV moffs64, RAX": "movabsq",
+	"MOV RAX, moffs64": "movabsq",
+	"MOV moffs8, AL": "movb/movb/movabsb",
+	"MOV AL, moffs8": "movb/movb/movabsb",
+	"LGDT m16&32": "lgdtw/lgdtl",
+	"LIDT m16&32": "lidtw/lidtl",
+	"SGDT m":      "sgdtw/sgdtl/sgdt",
+	"SIDT m":      "sidtw/sidtl/sidt",
+	"LEAVE":       "leavew/leavel/leaveq",
+	"MOVBE r16, m16": "movbeww",
+	"MOVBE m16, r16": "movbeww",
+	"MOVBE m32, r32": "movbell",
+	"MOVBE r32, m32": "movbell",
+	"MOVBE m64, r64": "movbeqq",
+	"MOVBE r64, m64": "movbeqq",
+	"MOVSX r16, r/m16":  "movsww",
+	"MOVSX r16, r/m8":   "movsbw",
+	"MOVSX r32, r/m16":  "movswl",
+	"MOVSX r32, r/m8":   "movsbl",
+	"MOVSX r64, r/m16":  "movswq",
+	"MOVSX r64, r/m8":   "movsbq",
+	"MOVSXD r64, r/m32": "movslq",
+	"MOVZX r16, r/m16":  "movzww",
+	"MOVZX r16, r/m8":   "movzbw",
+	"MOVZX r32, r/m16":  "movzwl",
+	"MOVZX r32, r/m8":   "movzbl",
+	"MOVZX r64, r/m16":  "movzwq",
+	"MOVZX r64, r/m8":   "movzbq",
+	"CALL r/m16": "callw*",
+	"CALL r/m32": "calll*",
+	"CALL r/m64": "callq*",
+	"JMP r/m16": "jmpw*",
+	"JMP r/m32": "jmpl*",
+	"JMP r/m64": "jmpq*",
+	"CALL_FAR m16:16": "lcallw*",
+	"CALL_FAR m16:32": "lcalll*",
+	"CALL_FAR m16:64": "lcallq*",
+	"JMP_FAR m16:16": "ljmpw*",
+	"JMP_FAR m16:32": "ljmpl*",
+	"JMP_FAR m16:64": "ljmpq*",
+	"CALL_FAR ptr16:16": "lcallw",
+	"CALL_FAR ptr16:32": "lcalll",
+	"JMP_FAR ptr16:16":  "ljmpw",
+	"JMP_FAR ptr16:32":  "ljmpl",
+	"STR r32/m16":       "str{l/w}",
+	"SMSW r32/m16":      "smsw{l/w}",
+	"SLDT r32/m16":      "sldt{l/w}",
+	"MOV Sreg, r32/m16": "mov{l/w}",
+	"MOV r32/m16, Sreg": "mov{l/w}",
+	"STR r64/m16":       "str{q/w}",
+	"SMSW r64/m16":      "smsw{q/w}",
+	"SLDT r64/m16":      "sldt{q/w}",
+	"MOV Sreg, r64/m16": "mov{q/w}",
+	"MOV r64/m16, Sreg": "mov{q/w}",
+	"FLDENV m14/28byte":  "fldenvs/fldenvl",
+	"FNSAVE m94/108byte": "fnsaves/fnsavel",
+	"FNSTENV m14/28byte": "fnstenvs/fnstenvl",
+	"FRSTOR m94/108byte": "frstors/frstorl",
+	"IRETD":              "iretl",
+	"IRET":               "iretw",
+	"RET_FAR imm16u":     "lretw/lretl/lretl",
+	"RET_FAR":            "lretw/lretl/lretl",
+	"ENTER imm16, imm8b": "enterw/enterl/enterq",
+	"RET":                "retw/retl/retq",
+	"SYSRET":             "sysretw/sysretl/sysretl",
+	"RET imm16u": "retw/retl/retq",
+	"PUSH CS": "pushw/pushl/pushq",
+	"PUSH DS": "pushw/pushl/pushq",
+	"PUSH ES": "pushw/pushl/pushq",
+	"PUSH FS": "pushw/pushl/pushq",
+	"PUSH GS": "pushw/pushl/pushq",
+	"PUSH SS": "pushw/pushl/pushq",
+	"PUSH imm16": "pushw",
+	"POP CS": "popw/popl/popq",
+	"POP DS": "popw/popl/popq",
+	"POP ES": "popw/popl/popq",
+	"POP FS": "popw/popl/popq",
+	"POP GS": "popw/popl/popq",
+	"POP SS": "popw/popl/popq",
+	"PUSH imm32": "-/pushl/pushq",
+	"PUSH imm8":  "pushw/pushl/pushq",
+var startArg = map[string]int{
+	"CRC32": 1,
+var goSizeSuffix = map[string]map[int]string{
+	"BSWAP": {16: "W", 32: "L", 64: "Q"},
+var goOpcode = map[string]string{
+	// Overriding the GNU rewrites.
+	"CBW":     "CBW",
+	"CDQ":     "CDQ",
+	"CDQE":    "CDQE",
+	"CQO":     "CQO",
+	"CWD":     "CWD",
+	"CWDE":    "CWDE",
+	// Our own rewrites, of either GNU or Intel syntax.
+	"LOOPE":      "LOOPEQ",
+	"MOVDQA":     "MOVO",
+	"MOVDQU":     "MOVOU",
+	"MOVQ2DQ":    "MOVQOZX",
+	"MOVDQ2Q":    "MOVQ",
+	"MOVSBL":     "MOVBLSX",
+	"MOVSBQ":     "MOVBQSX",
+	"MOVSBW":     "MOVBWSX",
+	"MOVSLQ":     "MOVLQSX",
+	"MOVSWL":     "MOVWLSX",
+	"MOVSWQ":     "MOVWQSX",
+	"MOVZBL":     "MOVBLZX",
+	"MOVZBQ":     "MOVBQZX",
+	"MOVZBW":     "MOVBWZX",
+	"MOVZLQ":     "MOVLQZX",
+	"MOVZWL":     "MOVWLZX",
+	"MOVZWQ":     "MOVWQZX",
+	"PADDD":      "PADDL",
+	"PSLLD":      "PSLLL",
+	"PSLLDQ":     "PSLLO",
+	"PSRAD":      "PSRAL",
+	"PSRLD":      "PSRLL",
+	"PSRLDQ":     "PSRLO",
+	"PSUBD":      "PSUBL",
+	"PUSHA":      "PUSHAW",
+	"PUSHAD":     "PUSHAL",
+	"PUSHF":      "PUSHFW",
+	"PUSHFD":     "PUSHFL",
+	"CALLQ":      "CALL",
+	"CALLL":      "CALL",
+	"CALLW":      "CALL",
+	"SHLDW": "SHLW",
+	"SHLDL": "SHLL",
+	"SHLDQ": "SHLQ",
+	"SHRDW": "SHRW",
+	"SHRDL": "SHRL",
+	"SHRDQ": "SHRQ",
+	"SETA":   "SETHI",
+	"SETAE":  "SETCC",
+	"SETB":   "SETCS",
+	"SETBE":  "SETLS",
+	"SETC":   "SETCS",
+	"SETCC":  "SETCC",
+	"SETCS":  "SETCS",
+	"SETE":   "SETEQ",
+	"SETEQ":  "SETEQ",
+	"SETG":   "SETGT",
+	"SETGE":  "SETGE",
+	"SETGT":  "SETGT",
+	"SETHI":  "SETHI",
+	"SETHS":  "SETCC",
+	"SETL":   "SETLT",
+	"SETLE":  "SETLE",
+	"SETLS":  "SETLS",
+	"SETLT":  "SETLT",
+	"SETLO":  "SETCS",
+	"SETMI":  "SETMI",
+	"SETNA":  "SETLS",
+	"SETNB":  "SETCC",
+	"SETNC":  "SETCC",
+	"SETNE":  "SETNE",
+	"SETNG":  "SETLE",
+	"SETNL":  "SETGE",
+	"SETNO":  "SETOC",
+	"SETNP":  "SETPC",
+	"SETNS":  "SETPL",
+	"SETNZ":  "SETNE",
+	"SETO":   "SETOS",
+	"SETOC":  "SETOC",
+	"SETOS":  "SETOS",
+	"SETP":   "SETPS",
+	"SETPC":  "SETPC",
+	"SETPE":  "SETPS",
+	"SETPO":  "SETPC",
+	"SETPS":  "SETPS",
+	"SETS":   "SETMI",
+	"SETZ":   "SETEQ",
+	"FADD":   "FADDD",
+	"FADDS":  "FADDF",
+	"FCOM":   "FCOMD",
+	"FCOMS":  "FCOMF",
+	"FDIV":   "FDIVD",
+	"FDIVS":  "FDIVF",
diff --git a/x86/x86spec/parse.go b/x86/x86spec/parse.go
new file mode 100644
index 0000000..e5324be
--- /dev/null
+++ b/x86/x86spec/parse.go
@@ -0,0 +1,989 @@
+// Copyright 2016 The Go Authors.  All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+package main
+import (
+	"bytes"
+	"errors"
+	"fmt"
+	"io"
+	"log"
+	"math"
+	"os"
+	"reflect"
+	"regexp"
+	"sort"
+	"strconv"
+	"strings"
+	"time"
+	"rsc.io/pdf"
+// listing holds information about one or more parsed manual pages
+// concerning a single instruction listing.
+type listing struct {
+	pageNum   int
+	name      string       // instruction heading
+	mtables   [][][]string // mnemonic tables (at most one per page)
+	enctables [][][]string // encoding tables (at most one per page)
+	compat    string
+type logReaderAt struct {
+	f io.ReaderAt
+func (l *logReaderAt) ReadAt(x []byte, off int64) (int, error) {
+	log.Printf("read %d @ %d", len(x), off)
+	return l.f.ReadAt(x, off)
+const (
+	cacheBlockSize = 64 * 1024
+	numCacheBlock  = 16
+type cachedReaderAt struct {
+	r     io.ReaderAt
+	cache *cacheBlock
+type cacheBlock struct {
+	next   *cacheBlock
+	buf    []byte
+	offset int64
+	err    error
+func newCachedReaderAt(r io.ReaderAt) *cachedReaderAt {
+	c := &cachedReaderAt{
+		r: r,
+	}
+	for i := 0; i < numCacheBlock; i++ {
+		c.cache = &cacheBlock{next: c.cache}
+	}
+	return c
+func (c *cachedReaderAt) ReadAt(p []byte, offset int64) (n int, err error) {
+	// Assume large reads indicate a caller that doesn't need caching.
+	if len(p) >= cacheBlockSize {
+		return c.r.ReadAt(p, offset)
+	}
+	for n < len(p) {
+		o := offset + int64(n)
+		f := o & (cacheBlockSize - 1)
+		b := c.readBlock(o - f)
+		n += copy(p[n:], b.buf[f:])
+		if n < len(p) && b.err != nil {
+			return n, b.err
+		}
+	}
+	return n, nil
+var errShortRead = errors.New("short read")
+func (c *cachedReaderAt) readBlock(offset int64) *cacheBlock {
+	if offset&(cacheBlockSize-1) != 0 {
+		panic("misuse of cachedReaderAt.readBlock")
+	}
+	// Look in cache.
+	var b, prev *cacheBlock
+	for b = c.cache; ; prev, b = b, b.next {
+		if b.buf != nil && b.offset == offset {
+			// Move to front.
+			if prev != nil {
+				prev.next = b.next
+				b.next = c.cache
+				c.cache = b
+			}
+			return b
+		}
+		if b.next == nil {
+			break
+		}
+	}
+	// Otherwise b is LRU block in cache, prev points at b.
+	if b.buf == nil {
+		b.buf = make([]byte, cacheBlockSize)
+	}
+	b.offset = offset
+	n, err := c.r.ReadAt(b.buf[:cacheBlockSize], offset)
+	b.buf = b.buf[:n]
+	b.err = err
+	if n > 0 {
+		// Move to front.
+		prev.next = nil
+		b.next = c.cache
+		c.cache = b
+	}
+	return b
+func pdfOpen(name string) (*pdf.Reader, error) {
+	f, err := os.Open(name)
+	if err != nil {
+		return nil, err
+	}
+	fi, err := f.Stat()
+	if err != nil {
+		f.Close()
+		return nil, err
+	}
+	return pdf.NewReader(newCachedReaderAt(f), fi.Size())
+func parse() []*instruction {
+	var insts []*instruction
+	f, err := pdfOpen(*flagFile)
+	if err != nil {
+		log.Fatal(err)
+	}
+	// Find instruction set reference in outline, to build instruction list.
+	instList := instHeadings(f.Outline())
+	if len(instList) < 200 {
+		log.Fatalf("only found %d instructions in table of contents", len(instList))
+	}
+	// Scan document looking for instructions.
+	// Must find exactly the ones in the outline.
+	n := f.NumPage()
+	var current *listing
+	finishInstruction := func() {
+		if current == nil {
+			return
+		}
+		if len(current.mtables) == 0 || len(current.mtables[0]) <= 1 {
+			fmt.Fprintf(os.Stderr, "p.%d: no mnemonics for instruction %q\n", current.pageNum, current.name)
+		}
+		processListing(current, &insts)
+		current = nil
+	}
+	for pageNum := 1; pageNum <= n; pageNum++ {
+		if onlySomePages && !isDebugPage(pageNum) {
+			continue
+		}
+		p := f.Page(pageNum)
+		parsed := parsePage(p, pageNum)
+		if parsed.name != "" {
+			finishInstruction()
+			for j, headline := range instList {
+				if parsed.name == headline {
+					instList[j] = ""
+					current = parsed
+					break
+				}
+			}
+			if current == nil {
+				fmt.Fprintf(os.Stderr, "p.%d: unexpected instruction %q\n", pageNum, parsed.name)
+			}
+			continue
+		}
+		if current != nil {
+			merge(current, parsed)
+			continue
+		}
+		if parsed.mtables != nil {
+			fmt.Fprintf(os.Stderr, "p.%d: unexpected mnemonic table\n", pageNum)
+		}
+		if parsed.enctables != nil {
+			fmt.Fprintf(os.Stderr, "p.%d: unexpected encoding table\n", pageNum)
+		}
+		if parsed.compat != "" {
+			fmt.Fprintf(os.Stderr, "p.%d: unexpected compatibility statement\n", pageNum)
+		}
+	}
+	finishInstruction()
+	if !onlySomePages {
+		for _, headline := range instList {
+			if headline != "" {
+				fmt.Fprintf(os.Stderr, "missing instruction %q\n", headline)
+			}
+		}
+	}
+	return insts
+// isDebugPage reports whether the -debugpage flag mentions page n.
+// The argument is a comma-separated list of pages.
+// Maybe some day it will support ranges.
+func isDebugPage(n int) bool {
+	s := *flagDebugPage
+	var k int
+	for i := 0; ; i++ {
+		if i == len(s) || s[i] == ',' {
+			if n == k {
+				return true
+			}
+			k = 0
+		}
+		if i == len(s) {
+			break
+		}
+		if '0' <= s[i] && s[i] <= '9' {
+			k = k*10 + int(s[i]) - '0'
+		}
+	}
+	return false
+// merge merges the content of y into the running collection in x.
+func merge(x, y *listing) {
+	if y.name != "" {
+		fmt.Fprintf(os.Stderr, "p.%d: merging page incorrectly\n", y.pageNum)
+		return
+	}
+	x.mtables = append(x.mtables, y.mtables...)
+	x.enctables = append(x.enctables, y.enctables...)
+	x.compat += y.compat
+// instHeadings returns the list of instruction headings from the table of contents.
+// When we parse the pages we expect to find every one of these.
+func instHeadings(outline pdf.Outline) []string {
+	return appendInstHeadings(outline, nil)
+var instRE = regexp.MustCompile(`\d Instructions \([A-Z]-[A-Z]\)|VMX Instructions|Instruction SET Reference|SHA Extensions Reference`)
+// The headings are inconsistent about dash and superscript usage. Normalize.
+var fixDash = strings.NewReplacer(
+	"Compute 2 –1", "Compute 2^x-1",
+	"Compute 2x-1", "Compute 2^x-1",
+	"Compute 2x–1", "Compute 2^x-1",
+	"/ FUCOMI", "/FUCOMI",
+	"Compute y ∗ log x", "Compute y * log₂x",
+	"Compute y * log2x", "Compute y * log₂x",
+	"Compute y * log2(x +1)", "Compute y * log₂(x+1)",
+	"Compute y ∗ log (x +1)", "Compute y * log₂(x+1)",
+	" — ", "-",
+	"— ", "-",
+	" —", "-",
+	"—", "-",
+	" – ", "-",
+	" –", "-",
+	"– ", "-",
+	"–", "-",
+	" - ", "-",
+	"- ", "-",
+	" -", "-",
+func appendInstHeadings(outline pdf.Outline, list []string) []string {
+	if instRE.MatchString(outline.Title) {
+		for _, child := range outline.Child {
+			list = append(list, fixDash.Replace(child.Title))
+		}
+	}
+	for _, child := range outline.Child {
+		list = appendInstHeadings(child, list)
+	}
+	return list
+var dateRE = regexp.MustCompile(`\b(January|February|March|April|May|June|July|August|September|October|November|December) ((19|20)[0-9][0-9])\b`)
+// parsePage parses a single PDF page and returns the content it found.
+func parsePage(p pdf.Page, pageNum int) *listing {
+	if debugging {
+		fmt.Fprintf(os.Stderr, "DEBUG: parsing page %d\n", pageNum)
+	}
+	parsed := new(listing)
+	parsed.pageNum = pageNum
+	content := p.Content()
+	for i, t := range content.Text {
+		if match(t, "Symbol", 11, "≠") {
+			t.Font = "NeoSansIntel"
+			t.FontSize = 9
+			content.Text[i] = t
+		}
+		if t.S == "*" || t.S == "**" || t.S == "***" || t.S == "," && t.Font == "Arial" && t.FontSize < 9 || t.S == "1" && t.Font == "Arial" {
+			t.Font = "NeoSansIntel"
+			t.FontSize = 9
+			if i+1 < len(content.Text) {
+				t.Y = content.Text[i+1].Y
+			}
+			content.Text[i] = t
+		}
+	}
+	text := findWords(content.Text)
+	for i, t := range text {
+		if match(t, "NeoSansIntel", 8, ".WIG") || match(t, "NeoSansIntel", 8, "AVX2") {
+			t.FontSize = 9
+			text[i] = t
+		}
+		if t.Font == "NeoSansIntel-Medium" {
+			t.Font = "NeoSansIntelMedium"
+			text[i] = t
+		}
+		if t.Font == "NeoSansIntel-Italic" {
+			t.Font = "NeoSansIntel,Italic"
+			text[i] = t
+		}
+	}
+	if debugging {
+		for _, t := range text {
+			fmt.Println(t)
+		}
+	}
+	if pageNum == 1 {
+		var buf bytes.Buffer
+		for _, t := range text {
+			buf.WriteString(t.S + "\n")
+		}
+		all := buf.String()
+		m := regexp.MustCompile(`Order Number: ([\w-\-]+)`).FindStringSubmatch(all)
+		num := "???"
+		if m != nil {
+			num = m[1]
+		}
+		date := dateRE.FindString(all)
+		if date == "" {
+			date = "???"
+		}
+		fmt.Printf("# x86 instruction set description version %s, %s\n",
+			specFormatVersion, time.Now().Format("2006-01-02"))
+		fmt.Printf("# Based on Intel Instruction Set Reference #%s, %s.\n", num, date)
+		fmt.Printf("# https://golang.org/x/arch/x86/x86spec\n")
+	}
+	// Remove text we should ignore.
+	out := text[:0]
+	for _, t := range text {
+		if shouldIgnore(t) {
+			continue
+		}
+		out = append(out, t)
+	}
+	text = out
+	// Page header must say instruction set reference.
+	if len(text) == 0 {
+		return parsed
+	}
+	if (!match(text[0], "NeoSansIntel", 9, "INSTRUCTION") || !match(text[0], "NeoSansIntel", 9, "REFERENCE")) &&
+		!match(text[0], "NeoSansIntel", 9, "EXTENSIONS") {
+		return parsed
+	}
+	text = text[1:]
+	enctable := findEncodingTable(text)
+	if enctable != nil {
+		parsed.enctables = append(parsed.enctables, enctable)
+	}
+	parsed.compat = findCompat(text)
+	// Narrow scope for finding mnemonic table.
+	// Must be last, since it trims text.
+	// Next line is headline. Can wrap to multiple lines.
+	if len(text) == 0 || !match(text[0], "NeoSansIntelMedium", 12, "") || !isInstHeadline(text[0].S) {
+		if debugging {
+			fmt.Fprintf(os.Stderr, "non-inst-headline: %v\n", text[0])
+		}
+	} else {
+		parsed.name = text[0].S
+		text = text[1:]
+		for len(text) > 0 && match(text[0], "NeoSansIntelMedium", 12, "") {
+			parsed.name += " " + text[0].S
+			text = text[1:]
+		}
+		parsed.name = fixDash.Replace(parsed.name)
+	}
+	// Table follows; heading is NeoSansIntelMedium and rows are NeoSansIntel.
+	i := 0
+	for i < len(text) && match(text[i], "NeoSansIntelMedium", 9, "") {
+		i++
+	}
+	for i < len(text) && match(text[i], "NeoSansIntel", 9, "") && text[i].S != "NOTES:" {
+		i++
+	}
+	mtable := findMnemonicTable(text[:i])
+	if mtable != nil {
+		parsed.mtables = append(parsed.mtables, mtable)
+	}
+	return parsed
+func match(t pdf.Text, font string, size float64, substr string) bool {
+	return t.Font == font && math.Abs(t.FontSize-size) < 0.1 && strings.Contains(t.S, substr)
+func shouldIgnore(t pdf.Text) bool {
+	// Ignore footnote stars, which are in Arial.
+	// Also, the page describing MOVS has a tiny 2pt Arial backslash.
+	if (t.S == "*" || t.S == "\\") && strings.HasPrefix(t.Font, "Arial") {
+		return true
+	}
+	// Ignore superscript numbers, superscript ST(0), and superscript x.
+	if len(t.S) == 1 && '1' <= t.S[0] && t.S[0] <= '9' || t.S == "ST(0)" || t.S == "x" {
+		if match(t, "NeoSansIntel", 7.2, "") || match(t, "NeoSansIntel", 5.6, "") || match(t, "NeoSansIntelMedium", 8, "") || match(t, "NeoSansIntelMedium", 9.6, "") {
+			return true
+		}
+	}
+	return false
+func isInstHeadline(s string) bool {
+	return strings.Contains(s, "—") ||
+		strings.Contains(s, " - ") ||
+		strings.Contains(s, "PTEST- Logical Compare")
+func findWords(chars []pdf.Text) (words []pdf.Text) {
+	// Sort by Y coordinate and normalize.
+	const nudge = 1
+	sort.Sort(pdf.TextVertical(chars))
+	old := -100000.0
+	for i, c := range chars {
+		if c.Y != old && math.Abs(old-c.Y) < nudge {
+			chars[i].Y = old
+		} else {
+			old = c.Y
+		}
+	}
+	// Sort by Y coordinate, breaking ties with X.
+	// This will bring letters in a single word together.
+	sort.Sort(pdf.TextVertical(chars))
+	// Loop over chars.
+	for i := 0; i < len(chars); {
+		// Find all chars on line.
+		j := i + 1
+		for j < len(chars) && chars[j].Y == chars[i].Y {
+			j++
+		}
+		var end float64
+		// Split line into words (really, phrases).
+		for k := i; k < j; {
+			ck := &chars[k]
+			s := ck.S
+			end = ck.X + ck.W
+			charSpace := ck.FontSize / 6
+			wordSpace := ck.FontSize * 2 / 3
+			l := k + 1
+			for l < j {
+				// Grow word.
+				cl := &chars[l]
+				if sameFont(cl.Font, ck.Font) && cl.FontSize == ck.FontSize && cl.X <= end+charSpace {
+					s += cl.S
+					end = cl.X + cl.W
+					l++
+					continue
+				}
+				// Add space to phrase before next word.
+				if sameFont(cl.Font, ck.Font) && cl.FontSize == ck.FontSize && cl.X <= end+wordSpace {
+					s += " " + cl.S
+					end = cl.X + cl.W
+					l++
+					continue
+				}
+				break
+			}
+			f := ck.Font
+			f = strings.TrimSuffix(f, ",Italic")
+			f = strings.TrimSuffix(f, "-Italic")
+			words = append(words, pdf.Text{f, ck.FontSize, ck.X, ck.Y, end, s})
+			k = l
+		}
+		i = j
+	}
+	return words
+func sameFont(f1, f2 string) bool {
+	f1 = strings.TrimSuffix(f1, ",Italic")
+	f1 = strings.TrimSuffix(f1, "-Italic")
+	f2 = strings.TrimSuffix(f1, ",Italic")
+	f2 = strings.TrimSuffix(f1, "-Italic")
+	return strings.TrimSuffix(f1, ",Italic") == strings.TrimSuffix(f2, ",Italic") || f1 == "Symbol" || f2 == "Symbol" || f1 == "TimesNewRoman" || f2 == "TimesNewRoman"
+func findMnemonicTable(text []pdf.Text) [][]string {
+	sort.Sort(pdf.TextHorizontal(text))
+	const nudge = 1
+	old := -100000.0
+	var col []float64
+	for i, t := range text {
+		if t.Font != "NeoSansIntelMedium" { // only headings count
+			continue
+		}
+		if t.X != old && math.Abs(old-t.X) < nudge {
+			text[i].X = old
+		} else if t.X != old {
+			old = t.X
+			col = append(col, old)
+		}
+	}
+	sort.Sort(pdf.TextVertical(text))
+	if len(col) == 0 {
+		return nil
+	}
+	y := -100000.0
+	var table [][]string
+	var line []string
+	bold := -1
+	for _, t := range text {
+		if t.Y != y {
+			table = append(table, make([]string, len(col)))
+			line = table[len(table)-1]
+			y = t.Y
+			if t.Font == "NeoSansIntelMedium" {
+				bold = len(table) - 1
+			}
+		}
+		i := 0
+		for i+1 < len(col) && col[i+1] <= t.X+nudge {
+			i++
+		}
+		if line[i] != "" {
+			line[i] += " "
+		}
+		line[i] += t.S
+	}
+	var mtable [][]string
+	for i, t := range table {
+		if 0 < i && i <= bold || bold < i && halfMissing(t) {
+			// merge with earlier line
+			last := mtable[len(mtable)-1]
+			for j, s := range t {
+				if s != "" {
+					last[j] += "\n" + s
+				}
+			}
+		} else {
+			mtable = append(mtable, t)
+		}
+	}
+	if bold >= 0 {
+		heading := mtable[0]
+		for i, x := range heading {
+			heading[i] = fixHeading.Replace(x)
+		}
+	}
+	return mtable
+var fixHeading = strings.NewReplacer(
+	"64/32-\nbit\nMode", "64/32-Bit Mode",
+	"64/32-\nbit Mode", "64/32-Bit Mode",
+	"64/32-bit\nMode", "64/32-Bit Mode",
+	"64/3\n2-bit\nMode", "64/32-Bit Mode",
+	"64/32 bit\nMode\nSupport", "64/32-Bit Mode",
+	"64/32bit\nMode\nSupport", "64/32-Bit Mode",
+	"64/32\n-bit\nMode", "64/32-Bit Mode",
+	"64/32\nbit Mode\nSupport", "64/32-Bit Mode",
+	"64-Bit\nMode", "64-Bit Mode",
+	"64-bit\nMode", "64-Bit Mode",
+	"Op/ En", "Op/En",
+	"Op/\nEn", "Op/En",
+	"Op/\nEN", "Op/En",
+	"Op /\nEn", "Op/En",
+	"Opcode***", "Opcode",
+	"Opcode**", "Opcode",
+	"Opcode*", "Opcode",
+	"/\nInstruction", "/Instruction",
+	"CPUID Fea-\nture Flag", "CPUID Feature Flag",
+	"CPUID\nFeature\nFlag", "CPUID Feature Flag",
+	"CPUID\nFeature Flag", "CPUID Feature Flag",
+	"CPUIDFeature\nFlag", "CPUID Feature Flag",
+	"Compat/\nLeg Mode*", "Compat/Leg Mode",
+	"Compat/\nLeg Mode", "Compat/Leg Mode",
+	"Compat/ *\nLeg Mode", "Compat/Leg Mode",
+func halfMissing(x []string) bool {
+	n := 0
+	for _, s := range x {
+		if s == "" {
+			n++
+		}
+	}
+	return n >= len(x)/2
+func findEncodingTable(text []pdf.Text) [][]string {
+	// Look for operand encoding table.
+	sort.Sort(pdf.TextVertical(text))
+	var col []float64
+	sawTitle := false
+	center := func(t pdf.Text) float64 {
+		return t.X + t.W/2
+	}
+	start := 0
+	end := len(text)
+	for i, t := range text {
+		if match(t, "NeoSansIntelMedium", 10, "Instruction Operand Encoding") {
+			sawTitle = true
+			start = i + 1
+			continue
+		}
+		if !sawTitle {
+			continue
+		}
+		if match(t, "NeoSansIntel", 9, "Op/En") || match(t, "NeoSansIntel", 9, "Operand") {
+			if debugging {
+				fmt.Printf("column %d at %.2f: %v\n", len(col), center(t), t)
+			}
+			col = append(col, center(t))
+		}
+		if match(t, "NeoSansIntelMedium", 10, "Description") {
+			end = i
+			break
+		}
+	}
+	text = text[start:end]
+	if len(col) == 0 {
+		return nil
+	}
+	const nudge = 20
+	y := -100000.0
+	var table [][]string
+	var line []string
+	for _, t := range text {
+		if t.Y != y {
+			table = append(table, make([]string, len(col)))
+			line = table[len(table)-1]
+			y = t.Y
+		}
+		i := 0
+		x := center(t)
+		for i+1 < len(col) && col[i+1] <= x+nudge {
+			i++
+		}
+		if debugging {
+			fmt.Printf("text at %.2f: %v => %d\n", x, t, i)
+		}
+		if line[i] != "" {
+			line[i] += " "
+		}
+		line[i] += t.S
+	}
+	out := table[:0]
+	for _, line := range table {
+		if strings.HasPrefix(line[len(line)-1], "Vol. 2") { // page footer
+			continue
+		}
+		if line[0] == "" && len(out) > 0 {
+			last := out[len(out)-1]
+			for i, col := range line {
+				if col != "" {
+					last[i] += " " + col
+				}
+			}
+			continue
+		}
+		out = append(out, line)
+	}
+	table = out
+	return table
+func findCompat(text []pdf.Text) string {
+	sort.Sort(pdf.TextVertical(text))
+	inCompat := false
+	out := ""
+	for _, t := range text {
+		if match(t, "NeoSansIntelMedium", 10, "") {
+			inCompat = strings.Contains(t.S, "Architecture Compatibility")
+			if inCompat {
+				out += t.S + "\n"
+			}
+		}
+		if inCompat && match(t, "Verdana", 9, "") || strings.Contains(t.S, "were introduced") {
+			out += t.S + "\n"
+		}
+	}
+	return out
+func processListing(p *listing, insts *[]*instruction) {
+	if debugging {
+		for _, table := range p.mtables {
+			fmt.Printf("table:\n")
+			for _, row := range table {
+				fmt.Printf("%q\n", row)
+			}
+		}
+		fmt.Printf("enctable:\n")
+		for _, table := range p.enctables {
+			for _, row := range table {
+				fmt.Printf("%q\n", row)
+			}
+		}
+		fmt.Printf("compat:\n%s", p.compat)
+	}
+	if *flagCompat && p.compat != "" {
+		fmt.Printf("# p.%d: %s\n#\t%s\n", p.pageNum, p.name, strings.Replace(p.compat, "\n", "\n#\t", -1))
+	}
+	encs := make(map[string][]string)
+	for _, table := range p.enctables {
+		for _, row := range table[1:] {
+			for len(row) > 1 && (row[len(row)-1] == "NA" || row[len(row)-1] == "" || row[len(row)-1] == " source") {
+				row = row[:len(row)-1]
+			}
+			encs[row[0]] = row[1:]
+		}
+	}
+	var wrong string
+	for _, table := range p.mtables {
+		heading := table[0]
+		for _, row := range table[1:] {
+			if row[0] == heading[0] && reflect.DeepEqual(row, heading) {
+				continue
+			}
+			if len(row) >= 5 && row[1] == "CMOVG r64, r/m64" && row[3] == "V/N.E." && row[4] == "NA" {
+				row[3] = "V"
+				row[4] = "N.E."
+			}
+			inst := new(instruction)
+			inst.page = p.pageNum
+			inst.compat = strings.Join(strings.Fields(p.compat), " ")
+			for i, hdr := range heading {
+				x := row[i]
+				x = strings.Replace(x, "\n", " ", -1)
+				switch strings.TrimSpace(hdr) {
+				default:
+					wrong = "unexpected header: " + strconv.Quote(hdr)
+					goto BadTable
+				case "Opcode/Instruction":
+					x = row[i]
+					if strings.HasPrefix(x, "\nVEX") {
+						x = x[1:]
+						row[i] = x
+					}
+					if strings.Contains(x, "\n/r ") {
+						x = strings.Replace(x, "\n/r ", " /r ", -1)
+						row[i] = x
+					}
+					if strings.Contains(x, ",\nimm") {
+						x = strings.Replace(x, ",\nimm", ", imm", -1)
+						row[i] = x
+					}
+					if strings.Count(x, "\n") < 1 {
+						wrong = "bad Opcode/Instruction pairing: " + strconv.Quote(x)
+						goto BadTable
+					}
+					i := strings.Index(x, "\n")
+					inst.opcode = x[:i]
+					inst.syntax = strings.Replace(x[i+1:], "\n", " ", -1)
+				case "Opcode":
+					inst.opcode = x
+				case "Instruction":
+					inst.syntax = x
+				case "Op/En":
+					inst.args = encs[x]
+					if inst.args == nil && len(encs) == 1 && encs["A"] != nil {
+						inst.args = encs["A"]
+					}
+					// In the December 2015 manual, PREFETCHW says
+					// encoding A but the table gives encoding M.
+					if inst.args == nil && inst.syntax == "PREFETCHW m8" && x == "A" && len(encs) == 1 && encs["M"] != nil {
+						inst.args = encs["M"]
+					}
+				case "64-Bit Mode":
+					x, ok := parseMode(x)
+					if !ok {
+						wrong = "unexpected value for 64-Bit Mode column: " + x
+						goto BadTable
+					}
+					inst.valid64 = x
+				case "Compat/Leg Mode":
+					x, ok := parseMode(x)
+					if !ok {
+						wrong = "unexpected value for Compat/Leg Mode column: " + x
+						goto BadTable
+					}
+					inst.valid32 = x
+				case "64/32-Bit Mode":
+					i := strings.Index(x, "/")
+					if i < 0 {
+						wrong = "unexpected value for 64/32-Bit Mode column: " + x
+						goto BadTable
+					}
+					x1, ok1 := parseMode(x[:i])
+					x2, ok2 := parseMode(x[i+1:])
+					if !ok1 || !ok2 {
+						wrong = "unexpected value for 64/32-Bit Mode column: " + x
+						goto BadTable
+					}
+					inst.valid64 = x1
+					inst.valid32 = x2
+				case "CPUID Feature Flag":
+					inst.cpuid = x
+				case "Description":
+					if inst.desc != "" {
+						inst.desc += " "
+					}
+					inst.desc += x
+				}
+			}
+			// Fixup various typos or bugs in opcode descriptions.
+			if inst.opcode == "VEX.128.66.0F.W0 6E /" {
+				inst.opcode += "r"
+			}
+			fix := func(old, new string) {
+				inst.opcode = strings.Replace(inst.opcode, old, new, -1)
+			}
+			fix(" imm8", " ib")
+			fix("REX.w", "REX.W")
+			fix("REX.W+", "REX.W +")
+			fix(" 0f ", " 0F ")
+			fix(". 0F38", ".0F38")
+			fix("0F .WIG", "0F.WIG")
+			fix("0F38 .WIG", "0F38.WIG")
+			fix("NDS .LZ", "NDS.LZ")
+			fix("58+ r", "58+r")
+			fix("B0+ ", "B0+")
+			fix("B8+ ", "B8+")
+			fix("40+ ", "40+")
+			fix("*", "")
+			fix(",", " ")
+			fix("/", " /")
+			fix("REX.W +", "REX.W")
+			fix("REX +", "REX")
+			fix("REX 0F BE", "REX.W 0F BE")
+			fix("REX 0F B2", "REX.W 0F B2")
+			fix("REX 0F B4", "REX.W 0F B4")
+			fix("REX 0F B5", "REX.W 0F B5")
+			fix("0F38.0", "0F38.W0")
+			fix(".660F.", ".66.0F.")
+			fix("VEX128", "VEX.128")
+			fix("0F3A.W0.1D", "0F3A.W0 1D")
+			inst.opcode = strings.Join(strings.Fields(inst.opcode), " ")
+			fix = func(old, new string) {
+				inst.syntax = strings.Replace(inst.syntax, old, new, -1)
+			}
+			fix("xmm1 xmm2", "xmm1, xmm2")
+			fix("r16/m16", "r/m16")
+			fix("r32/m161", "r32/m16") // really r32/m16¹ (footnote)
+			fix("r32/m32", "r/m32")
+			fix("r64/m64", "r/m64")
+			fix("\u2013", "-")
+			fix("mm3 /m", "mm3/m")
+			fix("mm3/.m", "mm3/m")
+			inst.syntax = joinSyntax(splitSyntax(inst.syntax))
+			fix = func(old, new string) {
+				inst.cpuid = strings.Replace(inst.cpuid, old, new, -1)
+			}
+			fix("Both PCLMULQDQ and AVX flags", "PCLMULQDQ+AVX")
+			if !instBlacklist[inst.syntax] {
+				*insts = append(*insts, inst)
+			}
+		}
+	}
+	return
+	fmt.Fprintf(os.Stderr, "p.%d: reading %v: %v\n", p.pageNum, p.name, wrong)
+	for _, table := range p.mtables {
+		for _, t := range table {
+			fmt.Fprintf(os.Stderr, "\t%q\n", t)
+		}
+	}
+	fmt.Fprintf(os.Stderr, "\n")
+func parseMode(s string) (string, bool) {
+	switch strings.TrimSpace(s) {
+	case "Invalid", "Invalid*", "Inv.", "I", "i":
+		return "I", true
+	case "Valid", "Valid*", "V":
+		return "V", true
+	case "N.E.", "NE", "N. E.":
+		return "N.E.", true
+	case "N.P.", "N. P.":
+		return "N.P.", true
+	case "N.S.", "N. S.":
+		return "N.S.", true
+	case "N.I.", "N. I.":
+		return "N.I.", true
+	}
+	return s, false
+func splitSyntax(syntax string) (op string, args []string) {
+	i := strings.Index(syntax, " ")
+	if i < 0 {
+		return syntax, nil
+	}
+	op, syntax = syntax[:i], syntax[i+1:]
+	args = strings.Split(syntax, ",")
+	for i, arg := range args {
+		arg = strings.TrimSpace(arg)
+		arg = strings.TrimRight(arg, "*")
+		args[i] = arg
+	}
+	return
+func joinSyntax(op string, args []string) string {
+	if len(args) == 0 {
+		return op
+	}
+	return op + " " + strings.Join(args, ", ")
diff --git a/x86/x86spec/spec.go b/x86/x86spec/spec.go
new file mode 100644
index 0000000..b49e006
--- /dev/null
+++ b/x86/x86spec/spec.go
@@ -0,0 +1,321 @@
+// Copyright 2016 The Go Authors.  All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+// X86spec reads the ``Intel® 64 and IA-32 Architectures Software Developer's Manual''
+// to collect instruction encoding details and writes those details to standard output
+// in CSV format.
+// Usage:
+//	x86spec [-f file] [-u url] >x86.csv
+// The -f flag specifies the input file (default x86manual.pdf), the Intel instruction
+// set reference manual in PDF form.
+// If the input file does not exist, it will be created by downloading the manual.
+// The -u flag specifies the URL from which to download the manual
+// (default https://golang.org/s/x86manual, which redirects to Intel's site).
+// The URL is downloaded only when the file named by the -f flag is missing.
+// There are additional debugging flags, not shown. Run x86spec -help for the list.
+// File Format
+// TODO: Mention comments at top of file.
+// TODO: Mention that this is version 0.2 of the file.
+// TODO: Mention that file format will change incompatibly until version 1.0.
+// Each CSV line contains these fields:
+// 1. The Intel manual instruction mnemonic. For example, "SHR r/m32, imm8".
+// 2. The Go assembler instruction mnemonic. For example, "SHRL imm8, r/m32".
+// 3. The GNU binutils instruction mnemonic. For example, "shrl imm8, r/m32".
+// 4. The instruction encoding. For example, "C1 /4 ib".
+// 5. The validity of the instruction in 32-bit (aka compatiblity, legacy) mode.
+// 6. The validity of the instruction in 64-bit mode.
+// 7. The CPUID feature flags that signal support for the instruction.
+// 8. Additional comma-separated tags containing hints about the instruction.
+// 9. The read/write actions of the instruction on the arguments used in
+// the Intel mnemonic. For example, "rw,r" to denote that "SHR r/m32, imm8"
+// reads and writes its first argument but only reads its second argument.
+// 10. Whether the opcode used in the Intel mnemonic has encoding forms
+// distinguished only by operand size, like most arithmetic instructions.
+// The string "Y" indicates yes, the string "" indicates no.
+// 11. The data size of the operation in bits. In general this is the size corresponding
+// to the Go and GNU assembler opcode suffix.
+// The complete line used for the above examples is:
+//	"SHR r/m32, imm8","SHRL imm8, r/m32","shrl imm8, r/m32","C1 /5 ib","V","V","","operand32","rw,r","Y","32"
+// Mnemonics
+// The instruction mnemonics are as used in the Intel manual, with a few exceptions.
+// Mnemonics claiming general memory forms but that really require fixed addressing modes
+// are omitted in favor of their equivalents with implicit arguments..
+// For example, "CMPS m16, m16" (really CMPS [SI], [DI]) is omitted in favor of "CMPSW".
+// Instruction forms with an explicit REP, REPE, or REPNE prefix are also omitted.
+// Encoders and decoders are expected to handle those prefixes separately.
+// Perhaps most significantly, the argument syntaxes used in the mnemonic indicate
+// exactly how to derive the argument from the instruction encoding, or vice versa.
+// Immediate values: imm8, imm8u, imm16, imm16u, imm32, imm64.
+// Immediates are signed by default; the u suffixes indicates an unsigned value.
+// Memory operands. The forms m, m128, m14/28byte, m16, m16&16, m16&32, m16&64, m16:16, m16:32,
+// m16:64, m16int, m256, m2byte, m32, m32&32, m32fp, m32int, m512byte, m64, m64fp, m64int,
+// m8, m80bcd, m80dec, m80fp, m94/108byte. These operands always correspond to the
+// memory address specified by the r/m half of the modrm encoding.
+// Integer registers.
+// The forms r8, r16, r32, r64 indicate a register selected by the modrm reg encoding.
+// The forms rmr16, rmr32, rmr64 indicate a register (never memory) selected by the modrm r/m encoding.
+// The forms r/m8, r/m16, r/m32, and r/m64 indicate a register or memory selected by the modrm r/m encoding.
+// Forms with two sizes, like r32/m16 also indicate a register or memory selected by the modrm r/m encodng,
+// but the size for a register argument differs from the size of a memory argument.
+// The forms r8V, r16V, r32V, r64V indicate a register selected by the VEX.vvvv bits.
+// Multimedia registers.
+// The forms mm1, xmm1, and ymm1 indicate a multimedia register selected by the
+// modrm reg encoding.
+// The forms mm2, xmm2, and ymm2 indicate a register (never memory) selected by
+// the modrm r/m encoding.
+// The forms mm2/m64, xmm2/m128, and so on indicate a register or memory
+// selected by the modrm r/m encoding.
+// The forms xmmV and ymmV indicate a register selected by the VEX.vvvv bits.
+// The forms xmmI and ymmI indicate a register selected by the top four bits of an /is4 immediate byte.
+// Bound registers.
+// The form bnd1 indicate a  bound register selected by the modrm reg encoding.
+// The form bnd2 indicates a bound register (never memory) selected by the modrm r/m encoding.
+// The forms bnd2/m64 and bnd2/m128 indicate a register or memorys selected by the modrm r/m encoding.
+// TODO: Describe mib.
+// One-of-a-kind operands: rel8, rel16, rel32, ptr16:16, ptr16:32,
+// moffs8, moffs16, moffs32, moffs64, vm32x, vm32y, vm64x, and vm64y
+// are all as in the Intel manual.
+// Encodings
+// The encodings are also as used in the Intel manual, with automated corrections.
+// For example, the Intel manual sometimes omits the modrm /r indicator or other trailing bytes,
+// and it also contains typographical errors.
+// These problems are corrected so that the CSV data may be used to generate
+// tools for processing x86 machine code.
+// See https://golang.org/x/arch/x86/x86map for one such generator.
+// Valid32 and Valid64
+// These columns hold validity abbreviations as defined in the Intel manual:
+// V, I, N.E., N.P., N.S., or N.I.
+// Tools processing the data are typically only concerned with whether the
+// column is "V" (valid) or not.
+// This data is also corrected compared to the manual.
+// For example, the manual lists many instruction forms using REX bytes
+// with an incorrect "V" in the Valid32 column.
+// CPUID Feature Flags
+// This column specifies CPUID feature flags that must be present in order
+// to use the instruction. If multiple flags are required,
+// they are listed separated by plus signs, as in PCLMULQDQ+AVX.
+// The column can also list one of the values 486, Pentium, PentiumII, and P6,
+// indicating that the instruction was introduced on that architecture version.
+// Tags
+// The tag column does not correspond to a traditional column in the Intel manual tables.
+// Instead, it is itself a comma-separated list of tags or hints derived by analysis
+// of the instruction set or the instruction encodings.
+// The tags address16, address32, and address64 indicate that the instruction form
+// applies when using the specified addressing size. It may therefore be necessary to use an
+// address size prefix byte to access the instruction.
+// If two address tags are listed, the instruction can be used with either of those
+// address sizes. An instruction will never list all three address sizes.
+// (In fact, today, no instruction lists two address sizes, but that may change.)
+// The tags operand16, operand32, and operand64 indicate that the instruction form
+// applies when using the specified operand size. It may therefore be necessary to use an
+// operand size prefix byte to access the instruction.
+// If two operand tags are listed,  the instruction can be used with either of those
+// operand sizes. An instruction will never list all three operand sizes.
+// The tags modrm_regonly or modrm_memonly indicate that the modrm byte's
+// r/m encoding must specify a register or memory, respectively.
+// Especially in newer instructions, the modrm constraint may be the only way
+// to distinguish two instruction forms. For example the MOVHLPS and MOVLPS
+// instructions share the same encoding, except that the former requires the
+// modrm byte's r/m to indicate a register, while the latter requires it to indicate memory.
+// The tags pseudo and pseudo64 indicate that this instruction form is redundant
+// with others listed in the table and should be ignored when generating disassembly
+// or instruction scanning programs. The pseudo64 tag is reserved for the case where
+// the manual lists an instruction twice, once with the optional 64-bit mode REX byte.
+// Since most decoders will handle the REX byte separately, the form with the
+// unnecessary REX is tagged pseudo64.
+// Corrections and Additions
+// The x86spec program makes various corrections to the Intel manual data
+// as part of extracting the information. Those corrections are described above.
+// The x86spec program also adds a few well-known undocumented instructions,
+// such as UD1 and FFREEP.
+// Examples
+// The latest version of the CSV file is available in this Git repository and also
+// online at https://golang.org/s/x86.csv. It is meant to be human-readable for
+// quick reference and also to be input for generating tools that operate on
+// x86 machine code.
+// To print instruction syntaxes introduced by the Pentium II and P6,
+// using https://rsc.io/csv2tsv to prepare the table for processing by awk:
+//	csv2tsv x86.csv | awk -F'\t' '$5 == "PentiumII" || $5 == "P6" { print $1 }'
+// The x86map program (https://golang.org/x/arch/x86/x86map)
+// reads the CSV file and generates an x86 instruction decoder in the form
+// of a simple byte-code program. This decoder is the core of the disassembler
+// in the x86asm package (https://golang.org/x/arch/x86/x86asm).
+package main
+import (
+	"bufio"
+	"flag"
+	"fmt"
+	"io"
+	"log"
+	"net/http"
+	"os"
+	"sort"
+	"strings"
+const (
+	specFormatVersion = "0.2"
+var (
+	flagDebugPage = flag.String("debugpage", "", "debug page `n` of the manual (can be comma-separated list)")
+	flagURL       = flag.String("u", "https://golang.org/s/x86manual", "use `url` for download if needed")
+	flagFile      = flag.String("f", "x86manual.pdf", "read manual from `file`, downloading if necessary")
+	flagCompat    = flag.Bool("compat", false, "print compatibility statements")
+	debugging     bool
+	onlySomePages bool
+type instruction struct {
+	page      int
+	opcode    string
+	syntax    string
+	valid64   string
+	valid32   string
+	cpuid     string
+	desc      string
+	tags      []string
+	args      []string
+	seq       int // for use by cleanup
+	compat    string
+	action    string
+	multisize string
+	datasize  int
+	gnuSyntax string
+	goSyntax  string
+func main() {
+	log.SetFlags(0)
+	log.SetPrefix("x86spec: ")
+	flags()
+	download()
+	insts := parse()
+	insts = cleanup(insts)
+	format(insts)
+	sort.Sort(bySyntax(insts))
+	write(os.Stdout, insts)
+func flags() {
+	flag.Usage = func() {
+		fmt.Fprintf(os.Stderr, "usage: x86spec [options]\n")
+		flag.PrintDefaults()
+		os.Exit(2)
+	}
+	flag.Parse()
+	if flag.NArg() != 0 {
+		flag.Usage()
+	}
+	debugging = *flagDebugPage != ""
+	onlySomePages = *flagDebugPage != ""
+func download() {
+	_, err := os.Stat(*flagFile)
+	if !os.IsNotExist(err) {
+		return
+	}
+	// Try downloading.
+	log.Printf("downloading manual to %s", *flagFile)
+	resp, err := http.Get(*flagURL)
+	if err != nil {
+		log.Fatal(err)
+	}
+	if resp.StatusCode != 200 {
+		log.Fatal(resp.Status)
+	}
+	f, err := os.Create(*flagFile)
+	if err != nil {
+		log.Fatal(err)
+	}
+	_, err = io.Copy(f, resp.Body)
+	if err != nil {
+		log.Fatal(err)
+	}
+	if err := f.Close(); err != nil {
+		log.Fatal(err)
+	}
+func write(w io.Writer, insts []*instruction) {
+	bw := bufio.NewWriter(w)
+	defer bw.Flush()
+	for _, inst := range insts {
+		datasize := ""
+		if inst.datasize != 0 {
+			datasize = fmt.Sprint(inst.datasize)
+		}
+		writeCSV(bw, inst.syntax, inst.goSyntax, inst.gnuSyntax, inst.opcode, inst.valid32, inst.valid64, inst.cpuid, strings.Join(inst.tags, ","), inst.action, inst.multisize, datasize)
+	}
+// Note: not using encoding/csv because we want the CSV to use quotes always,
+// so that it is a little easier to process with non-CSV tools like grep,
+// but the encoding/csv package does not have an "always quote" writing mode.
+func writeCSV(w io.Writer, args ...string) {
+	for i, arg := range args {
+		if i > 0 {
+			fmt.Fprintf(w, ",")
+		}
+		fmt.Fprintf(w, `"%s"`, strings.Replace(arg, `"`, `""`, -1))
+	}
+	fmt.Fprintf(w, "\n")
diff --git a/x86/x86spec/spec_test.go b/x86/x86spec/spec_test.go
new file mode 100644
index 0000000..46a12fa
--- /dev/null
+++ b/x86/x86spec/spec_test.go
@@ -0,0 +1,939 @@
+// Copyright 2016 The Go Authors.  All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+package main
+import (
+	"bytes"
+	"fmt"
+	"os"
+	"sort"
+	"strings"
+	"testing"
+var tests = []struct {
+	pages  string
+	output string
+	// TODO: If we get page information out of the table of contents,
+	// we could avoid hard-coding page numbers that need updating with each manual.
+	// Trivial.
+	{"82", `
+		"AAA","37","V","I","",""
+	`},
+	// Pseudo detection.
+	{"84", `
+		"AAD","D5 0A","V","I","","pseudo"
+		"AAD imm8","D5 ib","V","I","",""
+	`},
+	// Operand-size and pseudo64 detection.
+	{"95", `
+		"ADD AL, imm8","04 ib","V","V","",""
+		"ADD AX, imm16","05 iw","V","V","","operand16"
+		"ADD EAX, imm32","05 id","V","V","","operand32"
+		"ADD RAX, imm32","REX.W 05 id","N.E.","V","",""
+		"ADD r/m8, imm8","80 /0 ib","V","V","",""
+		"ADD r/m8, imm8","REX 80 /0 ib","N.E.","V","","pseudo64"
+		"ADD r/m16, imm16","81 /0 iw","V","V","","operand16"
+		"ADD r/m32, imm32","81 /0 id","V","V","","operand32"
+		"ADD r/m64, imm32","REX.W 81 /0 id","N.E.","V","",""
+		"ADD r/m16, imm8","83 /0 ib","V","V","","operand16"
+		"ADD r/m32, imm8","83 /0 ib","V","V","","operand32"
+		"ADD r/m64, imm8","REX.W 83 /0 ib","N.E.","V","",""
+		"ADD r/m8, r8","00 /r","V","V","",""
+		"ADD r/m8, r8","REX 00 /r","N.E.","V","","pseudo64"
+		"ADD r/m16, r16","01 /r","V","V","","operand16"
+		"ADD r/m32, r32","01 /r","V","V","","operand32"
+		"ADD r/m64, r64","REX.W 01 /r","N.E.","V","",""
+		"ADD r8, r/m8","02 /r","V","V","",""
+		"ADD r8, r/m8","REX 02 /r","N.E.","V","","pseudo64"
+		"ADD r16, r/m16","03 /r","V","V","","operand16"
+		"ADD r32, r/m32","03 /r","V","V","","operand32"
+		"ADD r64, r/m64","REX.W 03 /r","N.E.","V","",""
+	`},
+	{"961", `
+		"PUSH r/m16","FF /6","V","V","","operand16"
+		"PUSH r/m32","FF /6","V","N.E.","","operand32"
+		"PUSH r/m64","FF /6","N.E.","V","","operand32,operand64"
+		"PUSH r16op","50+rw","V","V","","operand16"
+		"PUSH r32op","50+rd","V","N.E.","","operand32"
+		"PUSH r64op","50+rd","N.E.","V","","operand32,operand64"
+		"PUSH imm8","6A ib","V","V","",""
+		"PUSH imm16","68 iw","V","V","","operand16"
+		"PUSH imm32","68 id","V","V","","operand32"
+		"PUSH CS","0E","V","I","",""
+		"PUSH SS","16","V","I","",""
+		"PUSH DS","1E","V","I","",""
+		"PUSH ES","06","V","I","",""
+		"PUSH FS","0F A0","V","V","",""
+		"PUSH GS","0F A8","V","V","",""
+	`},
+	{"964", `
+		"PUSHA","60","V","I","","operand16"
+		"PUSHAD","60","V","I","","operand32"
+	`},
+	{"966", `
+		"PUSHF","9C","V","V","","operand16"
+		"PUSHFD","9C","V","N.E.","","operand32"
+		"PUSHFQ","9C","N.E.","V","","operand32,operand64"
+	`},
+	{"872", `
+		"POP r/m16","8F /0","V","V","","operand16"
+		"POP r/m32","8F /0","V","N.E.","","operand32"
+		"POP r/m64","8F /0","N.E.","V","","operand32,operand64"
+		"POP r16op","58+rw","V","V","","operand16"
+		"POP r32op","58+rd","V","N.E.","","operand32"
+		"POP r64op","58+rd","N.E.","V","","operand32,operand64"
+		"POP DS","1F","V","I","",""
+		"POP ES","07","V","I","",""
+		"POP SS","17","V","I","",""
+		"POP FS","0F A1","V","V","","operand16"
+		"POP FS","0F A1","V","N.E.","","operand32"
+		"POP FS","0F A1","N.E.","V","","operand32,operand64"
+		"POP GS","0F A9","V","V","","operand16"
+		"POP GS","0F A9","V","N.E.","","operand32"
+		"POP GS","0F A9","N.E.","V","","operand32,operand64"
+	`},
+	{"224", `
+		"CMPSB","A6","V","V","",""
+		"CMPSW","A7","V","V","","operand16"
+		"CMPSD","A7","V","V","","operand32"
+		"CMPSQ","REX.W A7","N.E.","V","",""
+	`},
+	{"228,654", `
+		"CMPSD xmm1, xmm2/m64, imm8","F2 0F C2 /r ib","V","V","SSE2",""
+		"VCMPSD xmm1, xmmV, xmm2/m64, imm8","VEX.NDS.LIG.F2.0F.WIG C2 /r ib","V","V","AVX",""
+		"MOVSD xmm1, xmm2/m64","F2 0F 10 /r","V","V","SSE2",""
+		"VMOVSD xmm1, xmmV, xmm2","VEX.NDS.LIG.F2.0F.WIG 10 /r","V","V","AVX","modrm_regonly"
+		"VMOVSD xmm1, m64","VEX.LIG.F2.0F.WIG 10 /r","V","V","AVX","modrm_memonly"
+		"MOVSD xmm2/m64, xmm1","F2 0F 11 /r","V","V","SSE2",""
+		"VMOVSD xmm2, xmmV, xmm1","VEX.NDS.LIG.F2.0F.WIG 11 /r","V","V","AVX","modrm_regonly"
+		"VMOVSD m64, xmm1","VEX.LIG.F2.0F.WIG 11 /r","V","V","AVX","modrm_memonly"
+	`},
+	{"277", `
+		"CRC32 r32, r/m8","F2 0F 38 F0 /r","V","V","","operand16,operand32"
+		"CRC32 r32, r/m8","F2 REX 0F 38 F0 /r","N.E.","V","","pseudo64"
+		"CRC32 r32, r/m16","F2 0F 38 F1 /r","V","V","","operand16"
+		"CRC32 r32, r/m32","F2 0F 38 F1 /r","V","V","","operand32"
+		"CRC32 r64, r/m8","F2 REX.W 0F 38 F0 /r","N.E.","V","",""
+		"CRC32 r64, r/m64","F2 REX.W 0F 38 F1 /r","N.E.","V","",""
+	`},
+	{"540", `
+		"LDS r16, m16:16","C5 /r","V","I","","operand16"
+		"LDS r32, m16:32","C5 /r","V","I","","operand32"
+		"LSS r16, m16:16","0F B2 /r","V","V","","operand16"
+		"LSS r32, m16:32","0F B2 /r","V","V","","operand32"
+		"LSS r64, m16:64","REX.W 0F B2 /r","N.E.","V","",""
+		"LES r16, m16:16","C4 /r","V","I","","operand16"
+		"LES r32, m16:32","C4 /r","V","I","","operand32"
+		"LFS r16, m16:16","0F B4 /r","V","V","","operand16"
+		"LFS r32, m16:32","0F B4 /r","V","V","","operand32"
+		"LFS r64, m16:64","REX.W 0F B4 /r","N.E.","V","",""
+		"LGS r16, m16:16","0F B5 /r","V","V","","operand16"
+		"LGS r32, m16:32","0F B5 /r","V","V","","operand32"
+		"LGS r64, m16:64","REX.W 0F B5 /r","N.E.","V","",""
+	`},
+	// Condition code preferences.
+	{"205,206,207", `
+		"CMOVA r16, r/m16","0F 47 /r","V","V","","operand16"
+		"CMOVA r32, r/m32","0F 47 /r","V","V","","operand32"
+		"CMOVA r64, r/m64","REX.W 0F 47 /r","N.E.","V","",""
+		"CMOVAE r16, r/m16","0F 43 /r","V","V","","operand16"
+		"CMOVAE r32, r/m32","0F 43 /r","V","V","","operand32"
+		"CMOVAE r64, r/m64","REX.W 0F 43 /r","N.E.","V","",""
+		"CMOVB r16, r/m16","0F 42 /r","V","V","","operand16"
+		"CMOVB r32, r/m32","0F 42 /r","V","V","","operand32"
+		"CMOVB r64, r/m64","REX.W 0F 42 /r","N.E.","V","",""
+		"CMOVBE r16, r/m16","0F 46 /r","V","V","","operand16"
+		"CMOVBE r32, r/m32","0F 46 /r","V","V","","operand32"
+		"CMOVBE r64, r/m64","REX.W 0F 46 /r","N.E.","V","",""
+		"CMOVC r16, r/m16","0F 42 /r","V","V","","operand16,pseudo"
+		"CMOVC r32, r/m32","0F 42 /r","V","V","","operand32,pseudo"
+		"CMOVC r64, r/m64","REX.W 0F 42 /r","N.E.","V","","pseudo"
+		"CMOVE r16, r/m16","0F 44 /r","V","V","","operand16"
+		"CMOVE r32, r/m32","0F 44 /r","V","V","","operand32"
+		"CMOVE r64, r/m64","REX.W 0F 44 /r","N.E.","V","",""
+		"CMOVG r16, r/m16","0F 4F /r","V","V","","operand16"
+		"CMOVG r32, r/m32","0F 4F /r","V","V","","operand32"
+		"CMOVG r64, r/m64","REX.W 0F 4F /r","N.E.","V","",""
+		"CMOVGE r16, r/m16","0F 4D /r","V","V","","operand16"
+		"CMOVGE r32, r/m32","0F 4D /r","V","V","","operand32"
+		"CMOVGE r64, r/m64","REX.W 0F 4D /r","N.E.","V","",""
+		"CMOVL r16, r/m16","0F 4C /r","V","V","","operand16"
+		"CMOVL r32, r/m32","0F 4C /r","V","V","","operand32"
+		"CMOVL r64, r/m64","REX.W 0F 4C /r","N.E.","V","",""
+		"CMOVLE r16, r/m16","0F 4E /r","V","V","","operand16"
+		"CMOVLE r32, r/m32","0F 4E /r","V","V","","operand32"
+		"CMOVLE r64, r/m64","REX.W 0F 4E /r","N.E.","V","",""
+		"CMOVNA r16, r/m16","0F 46 /r","V","V","","operand16,pseudo"
+		"CMOVNA r32, r/m32","0F 46 /r","V","V","","operand32,pseudo"
+		"CMOVNA r64, r/m64","REX.W 0F 46 /r","N.E.","V","","pseudo"
+		"CMOVNAE r16, r/m16","0F 42 /r","V","V","","operand16,pseudo"
+		"CMOVNAE r32, r/m32","0F 42 /r","V","V","","operand32,pseudo"
+		"CMOVNAE r64, r/m64","REX.W 0F 42 /r","N.E.","V","","pseudo"
+		"CMOVNB r16, r/m16","0F 43 /r","V","V","","operand16,pseudo"
+		"CMOVNB r32, r/m32","0F 43 /r","V","V","","operand32,pseudo"
+		"CMOVNB r64, r/m64","REX.W 0F 43 /r","N.E.","V","","pseudo"
+		"CMOVNBE r16, r/m16","0F 47 /r","V","V","","operand16,pseudo"
+		"CMOVNBE r32, r/m32","0F 47 /r","V","V","","operand32,pseudo"
+		"CMOVNBE r64, r/m64","REX.W 0F 47 /r","N.E.","V","","pseudo"
+		"CMOVNC r16, r/m16","0F 43 /r","V","V","","operand16,pseudo"
+		"CMOVNC r32, r/m32","0F 43 /r","V","V","","operand32,pseudo"
+		"CMOVNC r64, r/m64","REX.W 0F 43 /r","N.E.","V","","pseudo"
+		"CMOVNE r16, r/m16","0F 45 /r","V","V","","operand16"
+		"CMOVNE r32, r/m32","0F 45 /r","V","V","","operand32"
+		"CMOVNE r64, r/m64","REX.W 0F 45 /r","N.E.","V","",""
+		"CMOVNG r16, r/m16","0F 4E /r","V","V","","operand16,pseudo"
+		"CMOVNG r32, r/m32","0F 4E /r","V","V","","operand32,pseudo"
+		"CMOVNG r64, r/m64","REX.W 0F 4E /r","N.E.","V","","pseudo"
+		"CMOVNGE r16, r/m16","0F 4C /r","V","V","","operand16,pseudo"
+		"CMOVNGE r32, r/m32","0F 4C /r","V","V","","operand32,pseudo"
+		"CMOVNGE r64, r/m64","REX.W 0F 4C /r","N.E.","V","","pseudo"
+		"CMOVNL r16, r/m16","0F 4D /r","V","V","","operand16,pseudo"
+		"CMOVNL r32, r/m32","0F 4D /r","V","V","","operand32,pseudo"
+		"CMOVNL r64, r/m64","REX.W 0F 4D /r","N.E.","V","","pseudo"
+		"CMOVNLE r16, r/m16","0F 4F /r","V","V","","operand16,pseudo"
+		"CMOVNLE r32, r/m32","0F 4F /r","V","V","","operand32,pseudo"
+		"CMOVNLE r64, r/m64","REX.W 0F 4F /r","N.E.","V","","pseudo"
+		"CMOVNO r16, r/m16","0F 41 /r","V","V","","operand16"
+		"CMOVNO r32, r/m32","0F 41 /r","V","V","","operand32"
+		"CMOVNO r64, r/m64","REX.W 0F 41 /r","N.E.","V","",""
+		"CMOVNP r16, r/m16","0F 4B /r","V","V","","operand16"
+		"CMOVNP r32, r/m32","0F 4B /r","V","V","","operand32"
+		"CMOVNP r64, r/m64","REX.W 0F 4B /r","N.E.","V","",""
+		"CMOVNS r16, r/m16","0F 49 /r","V","V","","operand16"
+		"CMOVNS r32, r/m32","0F 49 /r","V","V","","operand32"
+		"CMOVNS r64, r/m64","REX.W 0F 49 /r","N.E.","V","",""
+		"CMOVNZ r16, r/m16","0F 45 /r","V","V","","operand16,pseudo"
+		"CMOVNZ r32, r/m32","0F 45 /r","V","V","","operand32,pseudo"
+		"CMOVNZ r64, r/m64","REX.W 0F 45 /r","N.E.","V","","pseudo"
+		"CMOVO r16, r/m16","0F 40 /r","V","V","","operand16"
+		"CMOVO r32, r/m32","0F 40 /r","V","V","","operand32"
+		"CMOVO r64, r/m64","REX.W 0F 40 /r","N.E.","V","",""
+		"CMOVP r16, r/m16","0F 4A /r","V","V","","operand16"
+		"CMOVP r32, r/m32","0F 4A /r","V","V","","operand32"
+		"CMOVP r64, r/m64","REX.W 0F 4A /r","N.E.","V","",""
+		"CMOVPE r16, r/m16","0F 4A /r","V","V","","operand16,pseudo"
+		"CMOVPE r32, r/m32","0F 4A /r","V","V","","operand32,pseudo"
+		"CMOVPE r64, r/m64","REX.W 0F 4A /r","N.E.","V","","pseudo"
+		"CMOVPO r16, r/m16","0F 4B /r","V","V","","operand16,pseudo"
+		"CMOVPO r32, r/m32","0F 4B /r","V","V","","operand32,pseudo"
+		"CMOVPO r64, r/m64","REX.W 0F 4B /r","N.E.","V","","pseudo"
+		"CMOVS r16, r/m16","0F 48 /r","V","V","","operand16"
+		"CMOVS r32, r/m32","0F 48 /r","V","V","","operand32"
+		"CMOVS r64, r/m64","REX.W 0F 48 /r","N.E.","V","",""
+		"CMOVZ r16, r/m16","0F 44 /r","V","V","","operand16,pseudo"
+		"CMOVZ r32, r/m32","0F 44 /r","V","V","","operand32,pseudo"
+		"CMOVZ r64, r/m64","REX.W 0F 44 /r","N.E.","V","","pseudo"
+	`},
+	// Condition code preferences, but also Intel manual is also missing /r in the syntax lines.
+	{"1043,1044", `
+		"SETA r/m8","0F 97 /r","V","V","",""
+		"SETA r/m8","REX 0F 97 /r","N.E.","V","","pseudo64"
+		"SETAE r/m8","0F 93 /r","V","V","",""
+		"SETAE r/m8","REX 0F 93 /r","N.E.","V","","pseudo64"
+		"SETB r/m8","0F 92 /r","V","V","",""
+		"SETB r/m8","REX 0F 92 /r","N.E.","V","","pseudo64"
+		"SETBE r/m8","0F 96 /r","V","V","",""
+		"SETBE r/m8","REX 0F 96 /r","N.E.","V","","pseudo64"
+		"SETC r/m8","0F 92 /r","V","V","","pseudo"
+		"SETC r/m8","REX 0F 92 /r","N.E.","V","","pseudo"
+		"SETE r/m8","0F 94 /r","V","V","",""
+		"SETE r/m8","REX 0F 94 /r","N.E.","V","","pseudo64"
+		"SETG r/m8","0F 9F /r","V","V","",""
+		"SETG r/m8","REX 0F 9F /r","N.E.","V","","pseudo64"
+		"SETGE r/m8","0F 9D /r","V","V","",""
+		"SETGE r/m8","REX 0F 9D /r","N.E.","V","","pseudo64"
+		"SETL r/m8","0F 9C /r","V","V","",""
+		"SETL r/m8","REX 0F 9C /r","N.E.","V","","pseudo64"
+		"SETLE r/m8","0F 9E /r","V","V","",""
+		"SETLE r/m8","REX 0F 9E /r","N.E.","V","","pseudo64"
+		"SETNA r/m8","0F 96 /r","V","V","","pseudo"
+		"SETNA r/m8","REX 0F 96 /r","N.E.","V","","pseudo"
+		"SETNAE r/m8","0F 92 /r","V","V","","pseudo"
+		"SETNAE r/m8","REX 0F 92 /r","N.E.","V","","pseudo"
+		"SETNB r/m8","0F 93 /r","V","V","","pseudo"
+		"SETNB r/m8","REX 0F 93 /r","N.E.","V","","pseudo"
+		"SETNBE r/m8","0F 97 /r","V","V","","pseudo"
+		"SETNBE r/m8","REX 0F 97 /r","N.E.","V","","pseudo"
+		"SETNC r/m8","0F 93 /r","V","V","","pseudo"
+		"SETNC r/m8","REX 0F 93 /r","N.E.","V","","pseudo"
+		"SETNE r/m8","0F 95 /r","V","V","",""
+		"SETNE r/m8","REX 0F 95 /r","N.E.","V","","pseudo64"
+		"SETNG r/m8","0F 9E /r","V","V","","pseudo"
+		"SETNG r/m8","REX 0F 9E /r","N.E.","V","","pseudo"
+		"SETNGE r/m8","0F 9C /r","V","V","","pseudo"
+		"SETNGE r/m8","REX 0F 9C /r","N.E.","V","","pseudo"
+		"SETNL r/m8","0F 9D /r","V","V","","pseudo"
+		"SETNL r/m8","REX 0F 9D /r","N.E.","V","","pseudo"
+		"SETNLE r/m8","0F 9F /r","V","V","","pseudo"
+		"SETNLE r/m8","REX 0F 9F /r","N.E.","V","","pseudo"
+		"SETNO r/m8","0F 91 /r","V","V","",""
+		"SETNO r/m8","REX 0F 91 /r","N.E.","V","","pseudo64"
+		"SETNP r/m8","0F 9B /r","V","V","",""
+		"SETNP r/m8","REX 0F 9B /r","N.E.","V","","pseudo64"
+		"SETNS r/m8","0F 99 /r","V","V","",""
+		"SETNS r/m8","REX 0F 99 /r","N.E.","V","","pseudo64"
+		"SETNZ r/m8","0F 95 /r","V","V","","pseudo"
+		"SETNZ r/m8","REX 0F 95 /r","N.E.","V","","pseudo"
+		"SETO r/m8","0F 90 /r","V","V","",""
+		"SETO r/m8","REX 0F 90 /r","N.E.","V","","pseudo64"
+		"SETP r/m8","0F 9A /r","V","V","",""
+		"SETP r/m8","REX 0F 9A /r","N.E.","V","","pseudo64"
+		"SETPE r/m8","0F 9A /r","V","V","","pseudo"
+		"SETPE r/m8","REX 0F 9A /r","N.E.","V","","pseudo"
+		"SETPO r/m8","0F 9B /r","V","V","","pseudo"
+		"SETPO r/m8","REX 0F 9B /r","N.E.","V","","pseudo"
+		"SETS r/m8","0F 98 /r","V","V","",""
+		"SETS r/m8","REX 0F 98 /r","N.E.","V","","pseudo64"
+		"SETZ r/m8","0F 94 /r","V","V","","pseudo"
+		"SETZ r/m8","REX 0F 94 /r","N.E.","V","","pseudo"
+	`},
+	{"520,521,522,523", `
+		"JA rel8","77 cb","V","V","",""
+		"JAE rel8","73 cb","V","V","",""
+		"JB rel8","72 cb","V","V","",""
+		"JBE rel8","76 cb","V","V","",""
+		"JC rel8","72 cb","V","V","","pseudo"
+		"JCXZ rel8","E3 cb","V","N.E.","","address16"
+		"JECXZ rel8","E3 cb","V","V","","address32"
+		"JRCXZ rel8","E3 cb","N.E.","V","","address64"
+		"JE rel8","74 cb","V","V","",""
+		"JG rel8","7F cb","V","V","",""
+		"JGE rel8","7D cb","V","V","",""
+		"JL rel8","7C cb","V","V","",""
+		"JLE rel8","7E cb","V","V","",""
+		"JNA rel8","76 cb","V","V","","pseudo"
+		"JNAE rel8","72 cb","V","V","","pseudo"
+		"JNB rel8","73 cb","V","V","","pseudo"
+		"JNBE rel8","77 cb","V","V","","pseudo"
+		"JNC rel8","73 cb","V","V","","pseudo"
+		"JNE rel8","75 cb","V","V","",""
+		"JNG rel8","7E cb","V","V","","pseudo"
+		"JNGE rel8","7C cb","V","V","","pseudo"
+		"JNL rel8","7D cb","V","V","","pseudo"
+		"JNLE rel8","7F cb","V","V","","pseudo"
+		"JNO rel8","71 cb","V","V","",""
+		"JNP rel8","7B cb","V","V","",""
+		"JNS rel8","79 cb","V","V","",""
+		"JNZ rel8","75 cb","V","V","","pseudo"
+		"JO rel8","70 cb","V","V","",""
+		"JP rel8","7A cb","V","V","",""
+		"JPE rel8","7A cb","V","V","","pseudo"
+		"JPO rel8","7B cb","V","V","","pseudo"
+		"JS rel8","78 cb","V","V","",""
+		"JZ rel8","74 cb","V","V","","pseudo"
+		"JA rel16","0F 87 cw","V","N.S.","","operand16"
+		"JA rel32","0F 87 cd","V","V","","operand32"
+		"JAE rel16","0F 83 cw","V","N.S.","","operand16"
+		"JAE rel32","0F 83 cd","V","V","","operand32"
+		"JB rel16","0F 82 cw","V","N.S.","","operand16"
+		"JB rel32","0F 82 cd","V","V","","operand32"
+		"JBE rel16","0F 86 cw","V","N.S.","","operand16"
+		"JBE rel32","0F 86 cd","V","V","","operand32"
+		"JC rel16","0F 82 cw","V","N.S.","","pseudo"
+		"JC rel32","0F 82 cd","V","V","","pseudo"
+		"JE rel16","0F 84 cw","V","N.S.","","operand16"
+		"JE rel32","0F 84 cd","V","V","","operand32"
+		"JZ rel16","0F 84 cw","V","N.S.","","operand16,pseudo"
+		"JZ rel32","0F 84 cd","V","V","","operand32,pseudo"
+		"JG rel16","0F 8F cw","V","N.S.","","operand16"
+		"JG rel32","0F 8F cd","V","V","","operand32"
+		"JGE rel16","0F 8D cw","V","N.S.","","operand16"
+		"JGE rel32","0F 8D cd","V","V","","operand32"
+		"JL rel16","0F 8C cw","V","N.S.","","operand16"
+		"JL rel32","0F 8C cd","V","V","","operand32"
+		"JLE rel16","0F 8E cw","V","N.S.","","operand16"
+		"JLE rel32","0F 8E cd","V","V","","operand32"
+		"JNA rel16","0F 86 cw","V","N.S.","","pseudo"
+		"JNA rel32","0F 86 cd","V","V","","pseudo"
+		"JNAE rel16","0F 82 cw","V","N.S.","","pseudo"
+		"JNAE rel32","0F 82 cd","V","V","","pseudo"
+		"JNB rel16","0F 83 cw","V","N.S.","","pseudo"
+		"JNB rel32","0F 83 cd","V","V","","pseudo"
+		"JNBE rel16","0F 87 cw","V","N.S.","","pseudo"
+		"JNBE rel32","0F 87 cd","V","V","","pseudo"
+		"JNC rel16","0F 83 cw","V","N.S.","","pseudo"
+		"JNC rel32","0F 83 cd","V","V","","pseudo"
+		"JNE rel16","0F 85 cw","V","N.S.","","operand16"
+		"JNE rel32","0F 85 cd","V","V","","operand32"
+		"JNG rel16","0F 8E cw","V","N.S.","","pseudo"
+		"JNG rel32","0F 8E cd","V","V","","pseudo"
+		"JNGE rel16","0F 8C cw","V","N.S.","","pseudo"
+		"JNGE rel32","0F 8C cd","V","V","","pseudo"
+		"JNL rel16","0F 8D cw","V","N.S.","","pseudo"
+		"JNL rel32","0F 8D cd","V","V","","pseudo"
+		"JNLE rel16","0F 8F cw","V","N.S.","","pseudo"
+		"JNLE rel32","0F 8F cd","V","V","","pseudo"
+		"JNO rel16","0F 81 cw","V","N.S.","","operand16"
+		"JNO rel32","0F 81 cd","V","V","","operand32"
+		"JNP rel16","0F 8B cw","V","N.S.","","operand16"
+		"JNP rel32","0F 8B cd","V","V","","operand32"
+		"JNS rel16","0F 89 cw","V","N.S.","","operand16"
+		"JNS rel32","0F 89 cd","V","V","","operand32"
+		"JNZ rel16","0F 85 cw","V","N.S.","","pseudo"
+		"JNZ rel32","0F 85 cd","V","V","","pseudo"
+		"JO rel16","0F 80 cw","V","N.S.","","operand16"
+		"JO rel32","0F 80 cd","V","V","","operand32"
+		"JP rel16","0F 8A cw","V","N.S.","","operand16"
+		"JP rel32","0F 8A cd","V","V","","operand32"
+		"JPE rel16","0F 8A cw","V","N.S.","","pseudo"
+		"JPE rel32","0F 8A cd","V","V","","pseudo"
+		"JPO rel16","0F 8B cw","V","N.S.","","pseudo"
+		"JPO rel32","0F 8B cd","V","V","","pseudo"
+		"JS rel16","0F 88 cw","V","N.S.","","operand16"
+		"JS rel32","0F 88 cd","V","V","","operand32"
+		"JA rel32","0F 87 cd","N.S.","V","","operand16,operand64"
+		"JAE rel32","0F 83 cd","N.S.","V","","operand16,operand64"
+		"JB rel32","0F 82 cd","N.S.","V","","operand16,operand64"
+		"JBE rel32","0F 86 cd","N.S.","V","","operand16,operand64"
+		"JE rel32","0F 84 cd","N.S.","V","","operand16,operand64"
+		"JG rel32","0F 8F cd","N.S.","V","","operand16,operand64"
+		"JGE rel32","0F 8D cd","N.S.","V","","operand16,operand64"
+		"JL rel32","0F 8C cd","N.S.","V","","operand16,operand64"
+		"JLE rel32","0F 8E cd","N.S.","V","","operand16,operand64"
+		"JNE rel32","0F 85 cd","N.S.","V","","operand16,operand64"
+		"JNO rel32","0F 81 cd","N.S.","V","","operand16,operand64"
+		"JNP rel32","0F 8B cd","N.S.","V","","operand16,operand64"
+		"JNS rel32","0F 89 cd","N.S.","V","","operand16,operand64"
+		"JO rel32","0F 80 cd","N.S.","V","","operand16,operand64"
+		"JP rel32","0F 8A cd","N.S.","V","","operand16,operand64"
+		"JS rel32","0F 88 cd","N.S.","V","","operand16,operand64"
+	`},
+	// Pseudo-ops in floating point.
+	{"362", `
+		"FCOM m32fp","D8 /2","V","V","",""
+		"FCOM m64fp","DC /2","V","V","",""
+		"FCOM ST(i)","D8 D0+i","V","V","",""
+		"FCOM","D8 D1","V","V","","pseudo"
+		"FCOMP m32fp","D8 /3","V","V","",""
+		"FCOMP m64fp","DC /3","V","V","",""
+		"FCOMP ST(i)","D8 D8+i","V","V","",""
+		"FCOMP","D8 D9","V","V","","pseudo"
+		"FCOMPP","DE D9","V","V","",""
+	`},
+	{"358", `
+		"FCLEX","9B DB E2","V","V","","pseudo"
+		"FNCLEX","DB E2","V","V","",""
+	`},
+	// Unsigned immediates.
+	{"340,", `
+		"ENTER imm16u, 0","C8 iw 00","V","V","","pseudo"
+		"ENTER imm16u, 1","C8 iw 01","V","V","","pseudo"
+		"ENTER imm16u, imm8","C8 iw ib","V","V","",""
+	`},
+	// Rewriting of arguments to match encoding (xmm1 vs xmm2).
+	{"785", `
+		"PEXTRB r32/m8, xmm1, imm8","66 0F 3A 14 /r ib","V","V","SSE4_1",""
+		"PEXTRD r/m32, xmm1, imm8","66 0F 3A 16 /r ib","V","V","SSE4_1","operand16,operand32"
+		"PEXTRQ r/m64, xmm1, imm8","66 REX.W 0F 3A 16 /r ib","N.E.","V","SSE4_1",""
+		"VPEXTRB r32/m8, xmm1, imm8","VEX.128.66.0F3A.W0 14 /r ib","V","V","AVX",""
+		"VPEXTRD r32/m32, xmm1, imm8","VEX.128.66.0F3A.W0 16 /r ib","V","V","AVX",""
+		"VPEXTRQ r64/m64, xmm1, imm8","VEX.128.66.0F3A.W1 16 /r ib","I","V","AVX",""
+	`},
+	{"843", `
+		"PMOVMSKB r32, mm2","0F D7 /r","V","V","SSE",""
+		"PMOVMSKB r32, xmm2","66 0F D7 /r","V","V","SSE2","modrm_regonly"
+		"VPMOVMSKB r32, xmm2","VEX.128.66.0F.WIG D7 /r","V","V","AVX","modrm_regonly"
+		"VPMOVMSKB r32, ymm2","VEX.256.66.0F.WIG D7 /r","V","V","AVX2","modrm_regonly"
+	`},
+	{"343", `
+		"EXTRACTPS r/m32, xmm1, imm8","66 0F 3A 17 /r ib","V","V","SSE4_1",""
+		"VEXTRACTPS r/m32, xmm1, imm8","VEX.128.66.0F3A.WIG 17 /r ib","V","V","AVX",""
+	`},
+	{"624", `
+		"MOVHPS xmm1, m64","0F 16 /r","V","V","SSE","modrm_memonly"
+		"MOVHPS m64, xmm1","0F 17 /r","V","V","SSE","modrm_memonly"
+		"VMOVHPS xmm1, xmmV, m64","VEX.NDS.128.0F.WIG 16 /r","V","V","AVX","modrm_memonly"
+		"VMOVHPS m64, xmm1","VEX.128.0F.WIG 17 /r","V","V","AVX","modrm_memonly"
+	`},
+	{"979", `
+		"RDFSBASE rmr32","F3 0F AE /0","I","V","FSGSBASE","modrm_regonly,operand16,operand32"
+		"RDFSBASE rmr64","F3 REX.W 0F AE /0","I","V","FSGSBASE","modrm_regonly"
+		"RDGSBASE rmr32","F3 0F AE /1","I","V","FSGSBASE","modrm_regonly,operand16,operand32"
+		"RDGSBASE rmr64","F3 REX.W 0F AE /1","I","V","FSGSBASE","modrm_regonly"
+	`},
+	{"988", `
+		"RDRAND rmr16","0F C7 /6","V","V","RDRAND","modrm_regonly,operand16"
+		"RDRAND rmr32","0F C7 /6","V","V","RDRAND","modrm_regonly,operand32"
+		"RDRAND rmr64","REX.W 0F C7 /6","I","V","RDRAND","modrm_regonly"
+	`},
+	{"1135", `
+		"VEXTRACTI128 xmm2/m128, ymm1, imm8","VEX.256.66.0F3A.W0 39 /r ib","V","V","AVX2",""
+	`},
+	{"1248", `
+		"WRFSBASE rmr32","F3 0F AE /2","I","V","FSGSBASE","modrm_regonly,operand16,operand32"
+		"WRFSBASE rmr64","F3 REX.W 0F AE /2","I","V","FSGSBASE","modrm_regonly"
+		"WRGSBASE rmr32","F3 0F AE /3","I","V","FSGSBASE","modrm_regonly,operand16,operand32"
+		"WRGSBASE rmr64","F3 REX.W 0F AE /3","I","V","FSGSBASE","modrm_regonly"
+	`},
+	{"1229", `
+		"VPMASKMOVD xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W0 8C /r","V","V","AVX2","modrm_memonly"
+		"VPMASKMOVD ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W0 8C /r","V","V","AVX2","modrm_memonly"
+		"VPMASKMOVQ xmm1, xmmV, m128","VEX.NDS.128.66.0F38.W1 8C /r","V","V","AVX2","modrm_memonly"
+		"VPMASKMOVQ ymm1, ymmV, m256","VEX.NDS.256.66.0F38.W1 8C /r","V","V","AVX2","modrm_memonly"
+		"VPMASKMOVD m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W0 8E /r","V","V","AVX2","modrm_memonly"
+		"VPMASKMOVD m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W0 8E /r","V","V","AVX2","modrm_memonly"
+		"VPMASKMOVQ m128, xmmV, xmm1","VEX.NDS.128.66.0F38.W1 8E /r","V","V","AVX2","modrm_memonly"
+		"VPMASKMOVQ m256, ymmV, ymm1","VEX.NDS.256.66.0F38.W1 8E /r","V","V","AVX2","modrm_memonly"
+	`},
+	{"537", `
+		"LDDQU xmm1, m128","F2 0F F0 /r","V","V","SSE3","modrm_memonly"
+		"VLDDQU xmm1, m128","VEX.128.F2.0F.WIG F0 /r","V","V","AVX","modrm_memonly"
+		"VLDDQU ymm1, m256","VEX.256.F2.0F.WIG F0 /r","V","V","AVX","modrm_memonly"
+	`},
+	{"624,626", `
+		"MOVHPS xmm1, m64","0F 16 /r","V","V","SSE","modrm_memonly"
+		"MOVHPS m64, xmm1","0F 17 /r","V","V","SSE","modrm_memonly"
+		"VMOVHPS xmm1, xmmV, m64","VEX.NDS.128.0F.WIG 16 /r","V","V","AVX","modrm_memonly"
+		"VMOVHPS m64, xmm1","VEX.128.0F.WIG 17 /r","V","V","AVX","modrm_memonly"
+		"MOVLHPS xmm1, xmm2","0F 16 /r","V","V","SSE","modrm_regonly"
+		"VMOVLHPS xmm1, xmmV, xmm2","VEX.NDS.128.0F.WIG 16 /r","V","V","AVX","modrm_regonly"
+	`},
+	// CPU features
+	{"758", `
+		"PCLMULQDQ xmm1, xmm2/m128, imm8","66 0F 3A 44 /r ib","V","V","PCLMULQDQ",""
+		"VPCLMULQDQ xmm1, xmmV, xmm2/m128, imm8","VEX.NDS.128.66.0F3A.WIG 44 /r ib","V","V","PCLMULQDQ+AVX",""
+	`},
+	// Fonts
+	{"486", `
+		"INC r/m8","FE /0","V","V","",""
+		"INC r/m8","REX FE /0","N.E.","V","","pseudo64"
+		"INC r/m16","FF /0","V","V","","operand16"
+		"INC r/m32","FF /0","V","V","","operand32"
+		"INC r/m64","REX.W FF /0","N.E.","V","",""
+		"INC r16op","40+rw","V","N.E.","","operand16"
+		"INC r32op","40+rd","V","N.E.","","operand32"
+	`},
+	// Intel manual has spurious trailing "m64" and "m128" in the opcode.
+	{"238", `
+		"CMPXCHG8B m64","0F C7 /1","V","V","","modrm_memonly,operand16,operand32"
+		"CMPXCHG16B m128","REX.W 0F C7 /1","N.E.","V","","modrm_memonly"
+	`},
+	// Intel manual missing cw and cd in opcode.
+	{"1260", `
+		"XBEGIN rel16","C7 F8 cw","V","V","RTM","operand16"
+		"XBEGIN rel32","C7 F8 cd","V","V","RTM","operand32,operand64"
+	`},
+	// Special cases
+	{"180", `
+		"CALL rel16","E8 cw","V","N.S.","","operand16"
+		"CALL rel32","E8 cd","V","V","","operand32"
+		"CALL r/m16","FF /2","V","N.E.","","operand16"
+		"CALL r/m32","FF /2","V","N.E.","","operand32"
+		"CALL r/m64","FF /2","N.E.","V","",""
+		"CALL_FAR ptr16:16","9A cd","V","I","","operand16"
+		"CALL_FAR ptr16:32","9A cp","V","I","","operand32"
+		"CALL_FAR m16:16","FF /3","V","V","","operand16"
+		"CALL_FAR m16:32","FF /3","V","V","","operand32"
+		"CALL_FAR m16:64","REX.W FF /3","N.E.","V","",""
+		"CALL rel32","E8 cd","N.S.","V","","operand16,operand64"
+	`},
+	{"525", `
+		"JMP rel8","EB cb","V","V","",""
+		"JMP rel16","E9 cw","V","N.S.","","operand16"
+		"JMP rel32","E9 cd","V","V","","operand32"
+		"JMP r/m16","FF /4","V","N.S.","","operand16"
+		"JMP r/m32","FF /4","V","N.S.","","operand32"
+		"JMP r/m64","FF /4","N.E.","V","",""
+		"JMP_FAR ptr16:16","EA cd","V","I","","operand16"
+		"JMP_FAR ptr16:32","EA cp","V","I","","operand32"
+		"JMP_FAR m16:16","FF /5","V","V","","operand16"
+		"JMP_FAR m16:32","FF /5","V","V","","operand32"
+		"JMP_FAR m16:64","REX.W FF /5","N.E.","V","",""
+		"JMP rel32","E9 cd","N.S.","V","","operand16,operand64"
+	`},
+	{"698", `
+		"NOP","90","V","V","","pseudo"
+		"NOP r/m16","0F 1F /0","V","V","","operand16"
+		"NOP r/m32","0F 1F /0","V","V","","operand32"
+	`},
+	{"747", `
+		"PAUSE","F3 90","V","V","","pseudo"
+	`},
+	{"1029,1030", `
+		"SAL r/m8, 1","D0 /4","V","V","","pseudo"
+		"SAL r/m8, 1","REX D0 /4","N.E.","V","","pseudo"
+		"SAL r/m8, CL","D2 /4","V","V","","pseudo"
+		"SAL r/m8, CL","REX D2 /4","N.E.","V","","pseudo"
+		"SAL r/m8, imm8","C0 /4 ib","V","V","","pseudo"
+		"SAL r/m8, imm8","REX C0 /4 ib","N.E.","V","","pseudo"
+		"SAL r/m16, 1","D1 /4","V","V","","operand16,pseudo"
+		"SAL r/m16, CL","D3 /4","V","V","","operand16,pseudo"
+		"SAL r/m16, imm8","C1 /4 ib","V","V","","operand16,pseudo"
+		"SAL r/m32, 1","D1 /4","V","V","","operand32,pseudo"
+		"SAL r/m64, 1","REX.W D1 /4","N.E.","V","","pseudo"
+		"SAL r/m32, CL","D3 /4","V","V","","operand32,pseudo"
+		"SAL r/m64, CL","REX.W D3 /4","N.E.","V","","pseudo"
+		"SAL r/m32, imm8","C1 /4 ib","V","V","","operand32,pseudo"
+		"SAL r/m64, imm8","REX.W C1 /4 ib","N.E.","V","","pseudo"
+		"SAR r/m8, 1","D0 /7","V","V","",""
+		"SAR r/m8, 1","REX D0 /7","N.E.","V","","pseudo64"
+		"SAR r/m8, CL","D2 /7","V","V","",""
+		"SAR r/m8, CL","REX D2 /7","N.E.","V","","pseudo64"
+		"SAR r/m8, imm8","C0 /7 ib","V","V","",""
+		"SAR r/m8, imm8","REX C0 /7 ib","N.E.","V","","pseudo64"
+		"SAR r/m16, 1","D1 /7","V","V","","operand16"
+		"SAR r/m16, CL","D3 /7","V","V","","operand16"
+		"SAR r/m16, imm8","C1 /7 ib","V","V","","operand16"
+		"SAR r/m32, 1","D1 /7","V","V","","operand32"
+		"SAR r/m64, 1","REX.W D1 /7","N.E.","V","",""
+		"SAR r/m32, CL","D3 /7","V","V","","operand32"
+		"SAR r/m64, CL","REX.W D3 /7","N.E.","V","",""
+		"SAR r/m32, imm8","C1 /7 ib","V","V","","operand32"
+		"SAR r/m64, imm8","REX.W C1 /7 ib","N.E.","V","",""
+		"SHL r/m8, 1","D0 /4","V","V","",""
+		"SHL r/m8, 1","REX D0 /4","N.E.","V","","pseudo64"
+		"SHL r/m8, CL","D2 /4","V","V","",""
+		"SHL r/m8, CL","REX D2 /4","N.E.","V","","pseudo64"
+		"SHL r/m8, imm8","C0 /4 ib","V","V","",""
+		"SHL r/m8, imm8","REX C0 /4 ib","N.E.","V","","pseudo64"
+		"SHL r/m16, 1","D1 /4","V","V","","operand16"
+		"SHL r/m16, CL","D3 /4","V","V","","operand16"
+		"SHL r/m16, imm8","C1 /4 ib","V","V","","operand16"
+		"SHL r/m32, 1","D1 /4","V","V","","operand32"
+		"SHL r/m64, 1","REX.W D1 /4","N.E.","V","",""
+		"SHL r/m32, CL","D3 /4","V","V","","operand32"
+		"SHL r/m64, CL","REX.W D3 /4","N.E.","V","",""
+		"SHL r/m32, imm8","C1 /4 ib","V","V","","operand32"
+		"SHL r/m64, imm8","REX.W C1 /4 ib","N.E.","V","",""
+		"SHR r/m8, 1","D0 /5","V","V","",""
+		"SHR r/m8, 1","REX D0 /5","N.E.","V","","pseudo64"
+		"SHR r/m8, CL","D2 /5","V","V","",""
+		"SHR r/m8, CL","REX D2 /5","N.E.","V","","pseudo64"
+		"SHR r/m8, imm8","C0 /5 ib","V","V","",""
+		"SHR r/m8, imm8","REX C0 /5 ib","N.E.","V","","pseudo64"
+		"SHR r/m16, 1","D1 /5","V","V","","operand16"
+		"SHR r/m16, CL","D3 /5","V","V","","operand16"
+		"SHR r/m16, imm8","C1 /5 ib","V","V","","operand16"
+		"SHR r/m32, 1","D1 /5","V","V","","operand32"
+		"SHR r/m64, 1","REX.W D1 /5","N.E.","V","",""
+		"SHR r/m32, CL","D3 /5","V","V","","operand32"
+		"SHR r/m64, CL","REX.W D3 /5","N.E.","V","",""
+		"SHR r/m32, imm8","C1 /5 ib","V","V","","operand32"
+		"SHR r/m64, imm8","REX.W C1 /5 ib","N.E.","V","",""
+	`},
+	{"564", `
+		"LSL r16, r/m16","0F 03 /r","V","V","","operand16"
+		"LSL r32, r32/m16","0F 03 /r","V","V","","operand32"
+		"LSL r64, r32/m16","REX.W 0F 03 /r","N.E.","V","",""
+	`},
+	{"1000", `
+		"RET","C3","V","V","",""
+		"RET_FAR","CB","V","V","",""
+		"RET imm16u","C2 iw","V","V","",""
+		"RET_FAR imm16u","CA iw","V","V","",""
+	`},
+	{"1245", `
+		"WAIT","9B","V","V","","pseudo"
+		"FWAIT","9B","V","V","",""
+	`},
+	{"1263", `
+		"XCHG AX, r16op","90+rw","V","V","","operand16,pseudo"
+		"XCHG r16op, AX","90+rw","V","V","","operand16"
+		"XCHG EAX, r32op","90+rd","V","V","","operand32,pseudo"
+		"XCHG RAX, r64op","REX.W 90+rd","N.E.","V","","pseudo"
+		"XCHG r32op, EAX","90+rd","V","V","","operand32"
+		"XCHG r64op, RAX","REX.W 90+rd","N.E.","V","",""
+		"XCHG r/m8, r8","86 /r","V","V","",""
+		"XCHG r/m8, r8","REX 86 /r","N.E.","V","","pseudo64"
+		"XCHG r8, r/m8","86 /r","V","V","","pseudo"
+		"XCHG r8, r/m8","REX 86 /r","N.E.","V","","pseudo"
+		"XCHG r/m16, r16","87 /r","V","V","","operand16"
+		"XCHG r16, r/m16","87 /r","V","V","","operand16,pseudo"
+		"XCHG r/m32, r32","87 /r","V","V","","operand32"
+		"XCHG r/m64, r64","REX.W 87 /r","N.E.","V","",""
+		"XCHG r32, r/m32","87 /r","V","V","","operand32,pseudo"
+		"XCHG r64, r/m64","REX.W 87 /r","N.E.","V","","pseudo"
+	`},
+	{"1063", `
+		"SLDT r/m16","0F 00 /0","V","V","","operand16"
+		"SLDT r64/m16","REX.W 0F 00 /0","N.E.","V","",""
+		"SLDT r32/m16","0F 00 /0","V","V","","operand32"
+	`},
+	{"1065", `
+		"SMSW r/m16","0F 01 /4","V","V","","operand16"
+		"SMSW r32/m16","0F 01 /4","V","V","","operand32"
+		"SMSW r64/m16","REX.W 0F 01 /4","N.E.","V","",""
+	`},
+	{"1083", `
+		"STR r/m16","0F 00 /1","V","V","","operand16"
+		"STR r32/m16","0F 00 /1","V","V","","operand32"
+		"STR r64/m16","REX.W 0F 00 /1","N.E.","V","",""
+	`},
+	{"533,1027", `
+		"LAHF","9F","V","V","",""
+		"SAHF","9E","V","V","",""
+	`},
+	{"662", `
+		"MOVSX r16, r/m8","0F BE /r","V","V","","operand16"
+		"MOVSX r32, r/m8","0F BE /r","V","V","","operand32"
+		"MOVSX r64, r/m8","REX.W 0F BE /r","N.E.","V","",""
+		"MOVSX r32, r/m16","0F BF /r","V","V","","operand32"
+		"MOVSX r64, r/m16","REX.W 0F BF /r","N.E.","V","",""
+		"MOVSXD r64, r/m32","REX.W 63 /r","N.E.","V","",""
+		"MOVSX r16, r/m16","0F BF /r","V","V","","operand16"
+		"MOVSXD r16, r/m32","63 /r","N.E.","V","","operand16"
+		"MOVSXD r32, r/m32","63 /r","N.E.","V","","operand32"
+	`},
+	{"668", `
+		"MOVZX r16, r/m8","0F B6 /r","V","V","","operand16"
+		"MOVZX r32, r/m8","0F B6 /r","V","V","","operand32"
+		"MOVZX r64, r/m8","REX.W 0F B6 /r","N.E.","V","",""
+		"MOVZX r32, r/m16","0F B7 /r","V","V","","operand32"
+		"MOVZX r64, r/m16","REX.W 0F B7 /r","N.E.","V","",""
+		"MOVZX r16, r/m16","0F B7 /r","V","V","","operand16"
+	`},
+	{"1253,1260", `
+		"XACQUIRE","F2","V","V","HLE","pseudo"
+		"XRELEASE","F3","V","V","HLE","pseudo"
+		"XBEGIN rel16","C7 F8 cw","V","V","RTM","operand16"
+		"XBEGIN rel32","C7 F8 cd","V","V","RTM","operand32,operand64"
+	`},
+	{"547", `
+		"LEAVE","C9","V","V","","operand16"
+		"LEAVE","C9","V","N.E.","","operand32"
+		"LEAVE","C9","N.E.","V","","operand32,operand64"
+	`},
+	{"484", `
+		"IN AL, imm8u","E4 ib","V","V","",""
+		"IN AX, imm8u","E5 ib","V","V","","operand16"
+		"IN EAX, imm8u","E5 ib","V","V","","operand32,operand64"
+		"IN AL, DX","EC","V","V","",""
+		"IN AX, DX","ED","V","V","","operand16"
+		"IN EAX, DX","ED","V","V","","operand32,operand64"
+	`},
+	{"488", `
+		"INSB","6C","V","V","",""
+		"INSW","6D","V","V","","operand16"
+		"INSD","6D","V","V","","operand32,operand64"
+	`},
+	{"707", `
+		"OUT imm8u, AL","E6 ib","V","V","",""
+		"OUT imm8u, AX","E7 ib","V","V","","operand16"
+		"OUT imm8u, EAX","E7 ib","V","V","","operand32,operand64"
+		"OUT DX, AL","EE","V","V","",""
+		"OUT DX, AX","EF","V","V","","operand16"
+		"OUT DX, EAX","EF","V","V","","operand32,operand64"
+	`},
+	{"709", `
+		"OUTSB","6E","V","V","",""
+		"OUTSW","6F","V","V","","operand16"
+		"OUTSD","6F","V","V","","operand32,operand64"
+	`},
+	{"881,966", `
+		"POPF","9D","V","V","","operand16"
+		"POPFD","9D","V","N.E.","","operand32"
+		"POPFQ","9D","N.E.","V","","operand32,operand64"
+		"PUSHF","9C","V","V","","operand16"
+		"PUSHFD","9C","V","N.E.","","operand32"
+		"PUSHFQ","9C","N.E.","V","","operand32,operand64"
+	`},
+	{"610", `
+		"MOVD mm1, r/m32","0F 6E /r","V","V","MMX","operand16,operand32"
+		"MOVQ mm1, r/m64","REX.W 0F 6E /r","N.E.","V","MMX",""
+		"MOVD r/m32, mm1","0F 7E /r","V","V","MMX","operand16,operand32"
+		"MOVQ r/m64, mm1","REX.W 0F 7E /r","N.E.","V","MMX",""
+		"VMOVD xmm1, r32/m32","VEX.128.66.0F.W0 6E /r","V","V","AVX",""
+		"VMOVQ xmm1, r64/m64","VEX.128.66.0F.W1 6E /r","N.E.","V","AVX",""
+		"MOVD xmm1, r/m32","66 0F 6E /r","V","V","SSE2","operand16,operand32"
+		"MOVQ xmm1, r/m64","66 REX.W 0F 6E /r","N.E.","V","SSE2",""
+		"MOVD r/m32, xmm1","66 0F 7E /r","V","V","SSE2","operand16,operand32"
+		"MOVQ r/m64, xmm1","66 REX.W 0F 7E /r","N.E.","V","SSE2",""
+		"VMOVD r32/m32, xmm1","VEX.128.66.0F.W0 7E /r","V","V","AVX",""
+		"VMOVQ r64/m64, xmm1","VEX.128.66.0F.W1 7E /r","N.E.","V","AVX",""
+	`},
+	{"534", `
+		"LAR r16, r/m16","0F 02 /r","V","V","","operand16"
+		"LAR r32, r32/m16","0F 02 /r","V","V","","operand32"
+		"LAR r64, r64/m16","REX.W 0F 02 /r","N.E.","V","",""
+	`},
+	{"360", `
+		"FCMOVB ST(0), ST(i)","DA C0+i","V","V","",""
+		"FCMOVE ST(0), ST(i)","DA C8+i","V","V","",""
+		"FCMOVBE ST(0), ST(i)","DA D0+i","V","V","",""
+		"FCMOVU ST(0), ST(i)","DA D8+i","V","V","",""
+		"FCMOVNB ST(0), ST(i)","DB C0+i","V","V","",""
+		"FCMOVNE ST(0), ST(i)","DB C8+i","V","V","",""
+		"FCMOVNBE ST(0), ST(i)","DB D0+i","V","V","",""
+		"FCMOVNU ST(0), ST(i)","DB D8+i","V","V","",""
+	`},
+	{"413", `
+		"FSAVE m94/108byte","9B DD /6","V","V","","pseudo"
+		"FNSAVE m94/108byte","DD /6","V","V","",""
+	`},
+	{"446,449", `
+		"FXRSTOR m512byte","0F AE /1","V","V","","operand16,operand32"
+		"FXRSTOR64 m512byte","REX.W 0F AE /1","N.E.","V","",""
+		"FXSAVE m512byte","0F AE /0","V","V","","operand16,operand32"
+		"FXSAVE64 m512byte","REX.W 0F AE /0","N.E.","V","",""
+	`},
+	// The way extra instructions are inserted, the MOV TR and MOV Sreg extra instructions
+	// appear in every test of a page containing MOV instructions.
+	// So be it: we definitely won't lose them!
+	{"594,595", `
+		"MOV r/m8, r8","88 /r","V","V","",""
+		"MOV r/m8, r8","REX 88 /r","N.E.","V","","pseudo64"
+		"MOV r/m16, r16","89 /r","V","V","","operand16"
+		"MOV r/m32, r32","89 /r","V","V","","operand32"
+		"MOV r/m64, r64","REX.W 89 /r","N.E.","V","",""
+		"MOV r8, r/m8","8A /r","V","V","",""
+		"MOV r8, r/m8","REX 8A /r","N.E.","V","","pseudo64"
+		"MOV r16, r/m16","8B /r","V","V","","operand16"
+		"MOV r32, r/m32","8B /r","V","V","","operand32"
+		"MOV r64, r/m64","REX.W 8B /r","N.E.","V","",""
+		"MOV r/m16, Sreg","8C /r","V","V","","operand16"
+		"MOV r/m64, Sreg","REX.W 8C /r","N.E.","V","",""
+		"MOV Sreg, r/m16","8E /r","V","V","","operand16"
+		"MOV Sreg, r64/m16","REX.W 8E /r","N.E.","V","",""
+		"MOV AL, moffs8","A0 cm","V","V","","ignoreREXW"
+		"MOV AL, moffs8","REX.W A0 cm","N.E.","V","","pseudo"
+		"MOV AX, moffs16","A1 cm","V","V","","operand16"
+		"MOV EAX, moffs32","A1 cm","V","V","","operand32"
+		"MOV RAX, moffs64","REX.W A1 cm","N.E.","V","",""
+		"MOV moffs8, AL","A2 cm","V","V","","ignoreREXW"
+		"MOV moffs8, AL","REX.W A2 cm","N.E.","V","","pseudo"
+		"MOV moffs16, AX","A3 cm","V","V","","operand16"
+		"MOV moffs32, EAX","A3 cm","V","V","","operand32"
+		"MOV moffs64, RAX","REX.W A3 cm","N.E.","V","",""
+		"MOV r8op, imm8u","B0+rb ib","V","V","",""
+		"MOV r8op, imm8u","REX B0+rb ib","N.E.","V","","pseudo64"
+		"MOV r16op, imm16","B8+rw iw","V","V","","operand16"
+		"MOV r32op, imm32","B8+rd id","V","V","","operand32"
+		"MOV r64op, imm64","REX.W B8+rd io","N.E.","V","",""
+		"MOV r/m8, imm8u","C6 /0 ib","V","V","",""
+		"MOV r/m8, imm8u","REX C6 /0 ib","N.E.","V","","pseudo64"
+		"MOV r/m16, imm16","C7 /0 iw","V","V","","operand16"
+		"MOV r/m32, imm32","C7 /0 id","V","V","","operand32"
+		"MOV r/m64, imm32","REX.W C7 /0 id","N.E.","V","",""
+		"MOV TR0-TR7, rmr32","0F 26 /r","V","N.E.","","modrm_regonly"
+		"MOV TR0-TR7, rmr64","0F 26 /r","N.E.","V","","modrm_regonly"
+		"MOV rmr32, TR0-TR7","0F 24 /r","V","N.E.","","modrm_regonly"
+		"MOV rmr64, TR0-TR7","0F 24 /r","N.E.","V","","modrm_regonly"
+		"MOV Sreg, r32/m16","8E /r","V","V","","operand32"
+		"MOV r/m32, Sreg","8C /r","V","V","","operand32"
+	`},
+	{"599", `
+		"MOV rmr32, CR0-CR7","0F 20 /r","V","N.E.","","modrm_regonly"
+		"MOV rmr64, CR0-CR7","0F 20 /r","N.E.","V","","modrm_regonly"
+		"MOV rmr64, CR8","REX.R + 0F 20 /0","N.E.","V","","modrm_regonly,pseudo"
+		"MOV CR0-CR7, rmr32","0F 22 /r","V","N.E.","","modrm_regonly"
+		"MOV CR0-CR7, rmr64","0F 22 /r","N.E.","V","","modrm_regonly"
+		"MOV CR8, rmr64","REX.R + 0F 22 /0","N.E.","V","","modrm_regonly,pseudo"
+		"MOV TR0-TR7, rmr32","0F 26 /r","V","N.E.","","modrm_regonly"
+		"MOV TR0-TR7, rmr64","0F 26 /r","N.E.","V","","modrm_regonly"
+		"MOV rmr32, TR0-TR7","0F 24 /r","V","N.E.","","modrm_regonly"
+		"MOV rmr64, TR0-TR7","0F 24 /r","N.E.","V","","modrm_regonly"
+		"MOV Sreg, r32/m16","8E /r","V","V","","operand32"
+		"MOV r/m32, Sreg","8C /r","V","V","","operand32"
+	`},
+	{"602", `
+		"MOV rmr32, DR0-DR7","0F 21 /r","V","N.E.","","modrm_regonly"
+		"MOV rmr64, DR0-DR7","0F 21 /r","N.E.","V","","modrm_regonly"
+		"MOV DR0-DR7, rmr32","0F 23 /r","V","N.E.","","modrm_regonly"
+		"MOV DR0-DR7, rmr64","0F 23 /r","N.E.","V","","modrm_regonly"
+		"MOV TR0-TR7, rmr32","0F 26 /r","V","N.E.","","modrm_regonly"
+		"MOV TR0-TR7, rmr64","0F 26 /r","N.E.","V","","modrm_regonly"
+		"MOV rmr32, TR0-TR7","0F 24 /r","V","N.E.","","modrm_regonly"
+		"MOV rmr64, TR0-TR7","0F 24 /r","N.E.","V","","modrm_regonly"
+		"MOV Sreg, r32/m16","8E /r","V","V","","operand32"
+		"MOV r/m32, Sreg","8C /r","V","V","","operand32"
+	`},
+	{"148,150,155,157,160", `
+		"BNDCL bnd1, r/m32","F3 0F 1A /r","V","N.E.","MPX",""
+		"BNDCL bnd1, r/m64","F3 0F 1A /r","N.E.","V","MPX",""
+		"BNDCU bnd1, r/m32","F2 0F 1A /r","V","N.E.","MPX",""
+		"BNDCU bnd1, r/m64","F2 0F 1A /r","N.E.","V","MPX",""
+		"BNDCN bnd1, r/m32","F2 0F 1B /r","V","N.E.","MPX",""
+		"BNDCN bnd1, r/m64","F2 0F 1B /r","N.E.","V","MPX",""
+		"BNDMK bnd1, m32","F3 0F 1B /r","V","N.E.","MPX","modrm_memonly"
+		"BNDMK bnd1, m64","F3 0F 1B /r","N.E.","V","MPX","modrm_memonly"
+		"BNDMOV bnd1, bnd2/m64","66 0F 1A /r","V","N.E.","MPX",""
+		"BNDMOV bnd1, bnd2/m128","66 0F 1A /r","N.E.","V","MPX",""
+		"BNDMOV bnd2/m64, bnd1","66 0F 1B /r","V","N.E.","MPX",""
+		"BNDMOV bnd2/m128, bnd1","66 0F 1B /r","N.E.","V","MPX",""
+		"BNDSTX mib, bnd1","0F 1B /r","V","V","MPX",""
+	`},
+	{"169", `
+		"BSWAP r32op","0F C8+rd","V","V","","operand32"
+		"BSWAP r64op","REX.W 0F C8+rd","N.E.","V","",""
+		"BSWAP r16op","0F C8+rd","V","V","","operand16"
+	`},
+	{"296,300", `
+		"CVTSD2SI r32, xmm2/m64","F2 0F 2D /r","V","V","SSE2","operand16,operand32"
+		"CVTSD2SI r64, xmm2/m64","F2 REX.W 0F 2D /r","N.E.","V","SSE2",""
+		"VCVTSD2SI r32, xmm2/m64","VEX.LIG.F2.0F.W0 2D /r","V","V","AVX",""
+		"VCVTSD2SI r64, xmm2/m64","VEX.LIG.F2.0F.W1 2D /r","N.E.","V","AVX",""
+		"CVTSI2SD xmm1, r/m32","F2 0F 2A /r","V","V","SSE2","operand16,operand32"
+		"CVTSI2SD xmm1, r/m64","F2 REX.W 0F 2A /r","N.E.","V","SSE2",""
+		"VCVTSI2SD xmm1, xmmV, r/m32","VEX.NDS.LIG.F2.0F.W0 2A /r","V","V","AVX",""
+		"VCVTSI2SD xmm1, xmmV, r/m64","VEX.NDS.LIG.F2.0F.W1 2A /r","N.E.","V","AVX",""
+	`},
+	{"686", `
+		"MULX r32, r32V, r/m32","VEX.NDD.LZ.F2.0F38.W0 F6 /r","V","V","BMI2",""
+		"MULX r64, r64V, r/m64","VEX.NDD.LZ.F2.0F38.W1 F6 /r","N.E.","V","BMI2",""
+	`},
+func TestOutput(t *testing.T) {
+	if _, err := os.Stat(*flagFile); os.IsNotExist(err) {
+		t.Skipf("no x86manual: %v", err)
+	}
+	for _, tt := range tests {
+		*flagDebugPage = tt.pages
+		onlySomePages = true
+		insts := parse()
+		insts = cleanup(insts)
+		out := new(bytes.Buffer)
+		write(out, insts)
+		have := out.String()
+		want := reformat(tt.output)
+		if have != want {
+			t.Errorf("p.%v: incorrect output\nhave:\n%s\nwant:\n%s\ndiffs:\n%s", tt.pages, strings.TrimRight(have, "\n"), strings.TrimRight(want, "\n"), strings.TrimRight(diffs(have, want), "\n"))
+		}
+	}
+func indent(s string) string {
+	s = strings.TrimRight(s, "\n")
+	return strings.Join(strings.Split(s, "\n"), "\n\t")
+func reformat(s string) string {
+	var out string
+	for _, line := range strings.Split(s, "\n") {
+		line = strings.TrimSpace(line)
+		if line != "" {
+			out += line + "\n"
+		}
+	}
+	return out
+func diffs(have, want string) string {
+	old := strings.Split(strings.TrimRight(want, "\n"), "\n")
+	new := strings.Split(strings.TrimRight(have, "\n"), "\n")
+	sort.Strings(old)
+	sort.Strings(new)
+	var buf bytes.Buffer
+	for len(old) > 0 || len(new) > 0 {
+		switch {
+		case len(new) == 0 || len(old) > 0 && old[0] < new[0]:
+			fmt.Fprintf(&buf, "- %s\n", old[0])
+			old = old[1:]
+		case len(old) == 0 || len(new) > 0 && old[0] > new[0]:
+			fmt.Fprintf(&buf, "+ %s\n", new[0])
+			new = new[1:]
+		default:
+			old = old[1:]
+			new = new[1:]
+		}
+	}
+	return buf.String()