internal/simdgen: fix generated rules for shifts

the rewrite rules don't always apply in the friendliest
order, be sure that they are defined so they work for
all orders.

this generates dev.simd CL 695475

Change-Id: I80784b1df90108fa97ea6156cdc9259fd2696868
Reviewed-on: https://go-review.googlesource.com/c/arch/+/695455
Reviewed-by: Junyang Shao <shaojunyang@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>

internal/simdgen/gen_simdrules.go

diff --git a/internal/simdgen/gen_simdrules.go b/internal/simdgen/gen_simdrules.go
index 9a0bfd5..b0fc7e6 100644
--- a/internal/simdgen/gen_simdrules.go
+++ b/internal/simdgen/gen_simdrules.go
@@ -32,9 +32,9 @@
 {{end}}
 {{define "maskInMaskOut"}}({{.GoOp}}{{.GoType}} {{.Args}} mask) => ({{.MaskOutConvert}} ({{.Asm}} {{.ArgsOut}} ({{.MaskInConvert}} <types.TypeMask> mask)))
 {{end}}
-{{define "sftimm"}}({{.GoOp}}{{.GoType}} x (MOVQconst [c])) => ({{.Asm}}const [uint8(c)] x)
+{{define "sftimm"}}({{.Asm}} x (MOVQconst [c])) => ({{.Asm}}const [uint8(c)] x)
 {{end}}
-{{define "masksftimm"}}({{.GoOp}}{{.GoType}} x (MOVQconst [c]) mask) => ({{.Asm}}const [uint8(c)] x ({{.MaskInConvert}} <types.TypeMask> mask))
+{{define "masksftimm"}}({{.Asm}} x (MOVQconst [c]) mask) => ({{.Asm}}const [uint8(c)] x mask)
 {{end}}
 `))
 )
@@ -176,22 +176,24 @@
 
 		if gOp.SpecialLower != nil {
 			if *gOp.SpecialLower == "sftimm" {
-				sftImmData := data
-				if tplName == "maskIn" {
-					sftImmData.tplName = "masksftimm"
-				} else {
-					sftImmData.tplName = "sftimm"
+				if data.GoType[0] == 'I' {
+					// only do these for signed types, it is a duplicate rewrite for unsigned
+					sftImmData := data
+					if tplName == "maskIn" {
+						sftImmData.tplName = "masksftimm"
+					} else {
+						sftImmData.tplName = "sftimm"
+					}
+					allData = append(allData, sftImmData)
 				}
-				allData = append(allData, sftImmData)
 			} else {
 				panic("simdgen sees unknwon special lower " + *gOp.SpecialLower + ", maybe implement it?")
 			}
-		} else {
-			// SpecialLower rules cannot use "...".
-			if tplName == "pureVreg" && data.Args == data.ArgsOut {
-				data.Args = "..."
-				data.ArgsOut = "..."
-			}
+		}
+
+		if tplName == "pureVreg" && data.Args == data.ArgsOut {
+			data.Args = "..."
+			data.ArgsOut = "..."
 		}
 		data.tplName = tplName
 		allData = append(allData, data)