cmd/objdump: fix disassembly suffixes

    MOVB $1, (AX) was being disassembled as MOVL $1, (AX).

    Use the memory size to override the standard size.
    Fix the tests.

Change-Id: Ieac10cc8f6ec443c8bb45a370681f7b7cf4b92cb
Reviewed-on: https://go-review.googlesource.com/23607
Reviewed-by: Ian Lance Taylor <iant@golang.org>
diff --git a/x86/x86asm/plan9x.go b/x86/x86asm/plan9x.go
index c9850d2..06ffd4d 100644
--- a/x86/x86asm/plan9x.go
+++ b/x86/x86asm/plan9x.go
@@ -49,7 +49,11 @@
 
 	op := inst.Op.String()
 	if plan9Suffix[inst.Op] {
-		switch inst.DataSize {
+		s := inst.DataSize
+		if inst.MemBytes != 0 {
+			s = inst.MemBytes * 8
+		}
+		switch s {
 		case 8:
 			op += "B"
 		case 16:
diff --git a/x86/x86asm/testdata/decode.txt b/x86/x86asm/testdata/decode.txt
index 2fd37d8..9ae027a 100644
--- a/x86/x86asm/testdata/decode.txt
+++ b/x86/x86asm/testdata/decode.txt
@@ -7,10 +7,10 @@
 0100|11223344556677885f5f5f5f5f5f	64	intel	add dword ptr [rax], eax
 0100|11223344556677885f5f5f5f5f5f	64	plan9	ADDL AX, 0(AX)
 0211|223344556677885f5f5f5f5f5f5f	32	intel	add dl, byte ptr [ecx]
-0211|223344556677885f5f5f5f5f5f5f	32	plan9	ADDL 0(CX), DL
+0211|223344556677885f5f5f5f5f5f5f	32	plan9	ADDB 0(CX), DL
 0211|223344556677885f5f5f5f5f5f5f	64	gnu	add (%rcx),%dl
 0211|223344556677885f5f5f5f5f5f5f	64	intel	add dl, byte ptr [rcx]
-0211|223344556677885f5f5f5f5f5f5f	64	plan9	ADDL 0(CX), DL
+0211|223344556677885f5f5f5f5f5f5f	64	plan9	ADDB 0(CX), DL
 0311|223344556677885f5f5f5f5f5f5f	32	intel	add edx, dword ptr [ecx]
 0311|223344556677885f5f5f5f5f5f5f	32	plan9	ADDL 0(CX), DX
 0311|223344556677885f5f5f5f5f5f5f	64	gnu	add (%rcx),%edx
@@ -37,20 +37,20 @@
 07|11223344556677885f5f5f5f5f5f5f	64	intel	error: unrecognized instruction
 07|11223344556677885f5f5f5f5f5f5f	64	plan9	error: unrecognized instruction
 0811|223344556677885f5f5f5f5f5f5f	32	intel	or byte ptr [ecx], dl
-0811|223344556677885f5f5f5f5f5f5f	32	plan9	ORL DL, 0(CX)
+0811|223344556677885f5f5f5f5f5f5f	32	plan9	ORB DL, 0(CX)
 0811|223344556677885f5f5f5f5f5f5f	64	gnu	or %dl,(%rcx)
 0811|223344556677885f5f5f5f5f5f5f	64	intel	or byte ptr [rcx], dl
-0811|223344556677885f5f5f5f5f5f5f	64	plan9	ORL DL, 0(CX)
+0811|223344556677885f5f5f5f5f5f5f	64	plan9	ORB DL, 0(CX)
 0911|223344556677885f5f5f5f5f5f5f	32	intel	or dword ptr [ecx], edx
 0911|223344556677885f5f5f5f5f5f5f	32	plan9	ORL DX, 0(CX)
 0911|223344556677885f5f5f5f5f5f5f	64	gnu	or %edx,(%rcx)
 0911|223344556677885f5f5f5f5f5f5f	64	intel	or dword ptr [rcx], edx
 0911|223344556677885f5f5f5f5f5f5f	64	plan9	ORL DX, 0(CX)
 0a11|223344556677885f5f5f5f5f5f5f	32	intel	or dl, byte ptr [ecx]
-0a11|223344556677885f5f5f5f5f5f5f	32	plan9	ORL 0(CX), DL
+0a11|223344556677885f5f5f5f5f5f5f	32	plan9	ORB 0(CX), DL
 0a11|223344556677885f5f5f5f5f5f5f	64	gnu	or (%rcx),%dl
 0a11|223344556677885f5f5f5f5f5f5f	64	intel	or dl, byte ptr [rcx]
-0a11|223344556677885f5f5f5f5f5f5f	64	plan9	ORL 0(CX), DL
+0a11|223344556677885f5f5f5f5f5f5f	64	plan9	ORB 0(CX), DL
 0b11|223344556677885f5f5f5f5f5f5f	32	intel	or edx, dword ptr [ecx]
 0b11|223344556677885f5f5f5f5f5f5f	32	plan9	ORL 0(CX), DX
 0b11|223344556677885f5f5f5f5f5f5f	64	gnu	or (%rcx),%edx
@@ -1479,10 +1479,10 @@
 0faf11|223344556677885f5f5f5f5f5f	64	intel	imul edx, dword ptr [rcx]
 0faf11|223344556677885f5f5f5f5f5f	64	plan9	IMULL 0(CX), DX
 0fb011|223344556677885f5f5f5f5f5f	32	intel	cmpxchg byte ptr [ecx], dl
-0fb011|223344556677885f5f5f5f5f5f	32	plan9	CMPXCHGL DL, 0(CX)
+0fb011|223344556677885f5f5f5f5f5f	32	plan9	CMPXCHGB DL, 0(CX)
 0fb011|223344556677885f5f5f5f5f5f	64	gnu	cmpxchg %dl,(%rcx)
 0fb011|223344556677885f5f5f5f5f5f	64	intel	cmpxchg byte ptr [rcx], dl
-0fb011|223344556677885f5f5f5f5f5f	64	plan9	CMPXCHGL DL, 0(CX)
+0fb011|223344556677885f5f5f5f5f5f	64	plan9	CMPXCHGB DL, 0(CX)
 0fb111|223344556677885f5f5f5f5f5f	32	intel	cmpxchg dword ptr [ecx], edx
 0fb111|223344556677885f5f5f5f5f5f	32	plan9	CMPXCHGL DX, 0(CX)
 0fb111|223344556677885f5f5f5f5f5f	64	gnu	cmpxchg %edx,(%rcx)
@@ -1579,10 +1579,10 @@
 0fbf11|223344556677885f5f5f5f5f5f	64	intel	movsx edx, word ptr [rcx]
 0fbf11|223344556677885f5f5f5f5f5f	64	plan9	MOVSX 0(CX), DX
 0fc011|223344556677885f5f5f5f5f5f	32	intel	xadd byte ptr [ecx], dl
-0fc011|223344556677885f5f5f5f5f5f	32	plan9	XADDL DL, 0(CX)
+0fc011|223344556677885f5f5f5f5f5f	32	plan9	XADDB DL, 0(CX)
 0fc011|223344556677885f5f5f5f5f5f	64	gnu	xadd %dl,(%rcx)
 0fc011|223344556677885f5f5f5f5f5f	64	intel	xadd byte ptr [rcx], dl
-0fc011|223344556677885f5f5f5f5f5f	64	plan9	XADDL DL, 0(CX)
+0fc011|223344556677885f5f5f5f5f5f	64	plan9	XADDB DL, 0(CX)
 0fc111|223344556677885f5f5f5f5f5f	32	intel	xadd dword ptr [ecx], edx
 0fc111|223344556677885f5f5f5f5f5f	32	plan9	XADDL DX, 0(CX)
 0fc111|223344556677885f5f5f5f5f5f	64	gnu	xadd %edx,(%rcx)
@@ -1899,20 +1899,20 @@
 0ffe11|223344556677885f5f5f5f5f5f	64	intel	paddd mmx2, qword ptr [rcx]
 0ffe11|223344556677885f5f5f5f5f5f	64	plan9	PADDD 0(CX), M2
 1011|223344556677885f5f5f5f5f5f5f	32	intel	adc byte ptr [ecx], dl
-1011|223344556677885f5f5f5f5f5f5f	32	plan9	ADCL DL, 0(CX)
+1011|223344556677885f5f5f5f5f5f5f	32	plan9	ADCB DL, 0(CX)
 1011|223344556677885f5f5f5f5f5f5f	64	gnu	adc %dl,(%rcx)
 1011|223344556677885f5f5f5f5f5f5f	64	intel	adc byte ptr [rcx], dl
-1011|223344556677885f5f5f5f5f5f5f	64	plan9	ADCL DL, 0(CX)
+1011|223344556677885f5f5f5f5f5f5f	64	plan9	ADCB DL, 0(CX)
 1111|223344556677885f5f5f5f5f5f5f	32	intel	adc dword ptr [ecx], edx
 1111|223344556677885f5f5f5f5f5f5f	32	plan9	ADCL DX, 0(CX)
 1111|223344556677885f5f5f5f5f5f5f	64	gnu	adc %edx,(%rcx)
 1111|223344556677885f5f5f5f5f5f5f	64	intel	adc dword ptr [rcx], edx
 1111|223344556677885f5f5f5f5f5f5f	64	plan9	ADCL DX, 0(CX)
 1211|223344556677885f5f5f5f5f5f5f	32	intel	adc dl, byte ptr [ecx]
-1211|223344556677885f5f5f5f5f5f5f	32	plan9	ADCL 0(CX), DL
+1211|223344556677885f5f5f5f5f5f5f	32	plan9	ADCB 0(CX), DL
 1211|223344556677885f5f5f5f5f5f5f	64	gnu	adc (%rcx),%dl
 1211|223344556677885f5f5f5f5f5f5f	64	intel	adc dl, byte ptr [rcx]
-1211|223344556677885f5f5f5f5f5f5f	64	plan9	ADCL 0(CX), DL
+1211|223344556677885f5f5f5f5f5f5f	64	plan9	ADCB 0(CX), DL
 1311|223344556677885f5f5f5f5f5f5f	32	intel	adc edx, dword ptr [ecx]
 1311|223344556677885f5f5f5f5f5f5f	32	plan9	ADCL 0(CX), DX
 1311|223344556677885f5f5f5f5f5f5f	64	gnu	adc (%rcx),%edx
@@ -1939,20 +1939,20 @@
 17|11223344556677885f5f5f5f5f5f5f	64	intel	error: unrecognized instruction
 17|11223344556677885f5f5f5f5f5f5f	64	plan9	error: unrecognized instruction
 1811|223344556677885f5f5f5f5f5f5f	32	intel	sbb byte ptr [ecx], dl
-1811|223344556677885f5f5f5f5f5f5f	32	plan9	SBBL DL, 0(CX)
+1811|223344556677885f5f5f5f5f5f5f	32	plan9	SBBB DL, 0(CX)
 1811|223344556677885f5f5f5f5f5f5f	64	gnu	sbb %dl,(%rcx)
 1811|223344556677885f5f5f5f5f5f5f	64	intel	sbb byte ptr [rcx], dl
-1811|223344556677885f5f5f5f5f5f5f	64	plan9	SBBL DL, 0(CX)
+1811|223344556677885f5f5f5f5f5f5f	64	plan9	SBBB DL, 0(CX)
 1911|223344556677885f5f5f5f5f5f5f	32	intel	sbb dword ptr [ecx], edx
 1911|223344556677885f5f5f5f5f5f5f	32	plan9	SBBL DX, 0(CX)
 1911|223344556677885f5f5f5f5f5f5f	64	gnu	sbb %edx,(%rcx)
 1911|223344556677885f5f5f5f5f5f5f	64	intel	sbb dword ptr [rcx], edx
 1911|223344556677885f5f5f5f5f5f5f	64	plan9	SBBL DX, 0(CX)
 1a11|223344556677885f5f5f5f5f5f5f	32	intel	sbb dl, byte ptr [ecx]
-1a11|223344556677885f5f5f5f5f5f5f	32	plan9	SBBL 0(CX), DL
+1a11|223344556677885f5f5f5f5f5f5f	32	plan9	SBBB 0(CX), DL
 1a11|223344556677885f5f5f5f5f5f5f	64	gnu	sbb (%rcx),%dl
 1a11|223344556677885f5f5f5f5f5f5f	64	intel	sbb dl, byte ptr [rcx]
-1a11|223344556677885f5f5f5f5f5f5f	64	plan9	SBBL 0(CX), DL
+1a11|223344556677885f5f5f5f5f5f5f	64	plan9	SBBB 0(CX), DL
 1b11|223344556677885f5f5f5f5f5f5f	32	intel	sbb edx, dword ptr [ecx]
 1b11|223344556677885f5f5f5f5f5f5f	32	plan9	SBBL 0(CX), DX
 1b11|223344556677885f5f5f5f5f5f5f	64	gnu	sbb (%rcx),%edx
@@ -1979,20 +1979,20 @@
 1f|11223344556677885f5f5f5f5f5f5f	64	intel	error: unrecognized instruction
 1f|11223344556677885f5f5f5f5f5f5f	64	plan9	error: unrecognized instruction
 2011|223344556677885f5f5f5f5f5f5f	32	intel	and byte ptr [ecx], dl
-2011|223344556677885f5f5f5f5f5f5f	32	plan9	ANDL DL, 0(CX)
+2011|223344556677885f5f5f5f5f5f5f	32	plan9	ANDB DL, 0(CX)
 2011|223344556677885f5f5f5f5f5f5f	64	gnu	and %dl,(%rcx)
 2011|223344556677885f5f5f5f5f5f5f	64	intel	and byte ptr [rcx], dl
-2011|223344556677885f5f5f5f5f5f5f	64	plan9	ANDL DL, 0(CX)
+2011|223344556677885f5f5f5f5f5f5f	64	plan9	ANDB DL, 0(CX)
 2111|223344556677885f5f5f5f5f5f5f	32	intel	and dword ptr [ecx], edx
 2111|223344556677885f5f5f5f5f5f5f	32	plan9	ANDL DX, 0(CX)
 2111|223344556677885f5f5f5f5f5f5f	64	gnu	and %edx,(%rcx)
 2111|223344556677885f5f5f5f5f5f5f	64	intel	and dword ptr [rcx], edx
 2111|223344556677885f5f5f5f5f5f5f	64	plan9	ANDL DX, 0(CX)
 2211|223344556677885f5f5f5f5f5f5f	32	intel	and dl, byte ptr [ecx]
-2211|223344556677885f5f5f5f5f5f5f	32	plan9	ANDL 0(CX), DL
+2211|223344556677885f5f5f5f5f5f5f	32	plan9	ANDB 0(CX), DL
 2211|223344556677885f5f5f5f5f5f5f	64	gnu	and (%rcx),%dl
 2211|223344556677885f5f5f5f5f5f5f	64	intel	and dl, byte ptr [rcx]
-2211|223344556677885f5f5f5f5f5f5f	64	plan9	ANDL 0(CX), DL
+2211|223344556677885f5f5f5f5f5f5f	64	plan9	ANDB 0(CX), DL
 2311|223344556677885f5f5f5f5f5f5f	32	intel	and edx, dword ptr [ecx]
 2311|223344556677885f5f5f5f5f5f5f	32	plan9	ANDL 0(CX), DX
 2311|223344556677885f5f5f5f5f5f5f	64	gnu	and (%rcx),%edx
@@ -2020,9 +2020,9 @@
 267011|223344556677885f5f5f5f5f5f	64	plan9	ES JO .+17
 26a01122334455667788|5f5f5f5f5f5f	64	gnu	mov %es:-0x778899aabbccddef,%al
 26a01122334455667788|5f5f5f5f5f5f	64	intel	mov al, byte ptr [0x8877665544332211]
-26a01122334455667788|5f5f5f5f5f5f	64	plan9	ES MOVL -0x778899aabbccddef, AL
+26a01122334455667788|5f5f5f5f5f5f	64	plan9	ES MOVB -0x778899aabbccddef, AL
 26a011223344|556677885f5f5f5f5f5f	32	intel	mov al, byte ptr es:[0x44332211]
-26a011223344|556677885f5f5f5f5f5f	32	plan9	ES MOVL ES:0x44332211, AL
+26a011223344|556677885f5f5f5f5f5f	32	plan9	ES MOVB ES:0x44332211, AL
 26|8211223344556677885f5f5f5f5f5f	32	intel	es
 26|8211223344556677885f5f5f5f5f5f	32	plan9	ES Op(0)
 26|8211223344556677885f5f5f5f5f5f	64	gnu	es
@@ -2034,20 +2034,20 @@
 27|11223344556677885f5f5f5f5f5f5f	64	intel	error: unrecognized instruction
 27|11223344556677885f5f5f5f5f5f5f	64	plan9	error: unrecognized instruction
 2811|223344556677885f5f5f5f5f5f5f	32	intel	sub byte ptr [ecx], dl
-2811|223344556677885f5f5f5f5f5f5f	32	plan9	SUBL DL, 0(CX)
+2811|223344556677885f5f5f5f5f5f5f	32	plan9	SUBB DL, 0(CX)
 2811|223344556677885f5f5f5f5f5f5f	64	gnu	sub %dl,(%rcx)
 2811|223344556677885f5f5f5f5f5f5f	64	intel	sub byte ptr [rcx], dl
-2811|223344556677885f5f5f5f5f5f5f	64	plan9	SUBL DL, 0(CX)
+2811|223344556677885f5f5f5f5f5f5f	64	plan9	SUBB DL, 0(CX)
 2911|223344556677885f5f5f5f5f5f5f	32	intel	sub dword ptr [ecx], edx
 2911|223344556677885f5f5f5f5f5f5f	32	plan9	SUBL DX, 0(CX)
 2911|223344556677885f5f5f5f5f5f5f	64	gnu	sub %edx,(%rcx)
 2911|223344556677885f5f5f5f5f5f5f	64	intel	sub dword ptr [rcx], edx
 2911|223344556677885f5f5f5f5f5f5f	64	plan9	SUBL DX, 0(CX)
 2a11|223344556677885f5f5f5f5f5f5f	32	intel	sub dl, byte ptr [ecx]
-2a11|223344556677885f5f5f5f5f5f5f	32	plan9	SUBL 0(CX), DL
+2a11|223344556677885f5f5f5f5f5f5f	32	plan9	SUBB 0(CX), DL
 2a11|223344556677885f5f5f5f5f5f5f	64	gnu	sub (%rcx),%dl
 2a11|223344556677885f5f5f5f5f5f5f	64	intel	sub dl, byte ptr [rcx]
-2a11|223344556677885f5f5f5f5f5f5f	64	plan9	SUBL 0(CX), DL
+2a11|223344556677885f5f5f5f5f5f5f	64	plan9	SUBB 0(CX), DL
 2b11|223344556677885f5f5f5f5f5f5f	32	intel	sub edx, dword ptr [ecx]
 2b11|223344556677885f5f5f5f5f5f5f	32	plan9	SUBL 0(CX), DX
 2b11|223344556677885f5f5f5f5f5f5f	64	gnu	sub (%rcx),%edx
@@ -2069,20 +2069,20 @@
 2f|11223344556677885f5f5f5f5f5f5f	64	intel	error: unrecognized instruction
 2f|11223344556677885f5f5f5f5f5f5f	64	plan9	error: unrecognized instruction
 3011|223344556677885f5f5f5f5f5f5f	32	intel	xor byte ptr [ecx], dl
-3011|223344556677885f5f5f5f5f5f5f	32	plan9	XORL DL, 0(CX)
+3011|223344556677885f5f5f5f5f5f5f	32	plan9	XORB DL, 0(CX)
 3011|223344556677885f5f5f5f5f5f5f	64	gnu	xor %dl,(%rcx)
 3011|223344556677885f5f5f5f5f5f5f	64	intel	xor byte ptr [rcx], dl
-3011|223344556677885f5f5f5f5f5f5f	64	plan9	XORL DL, 0(CX)
+3011|223344556677885f5f5f5f5f5f5f	64	plan9	XORB DL, 0(CX)
 3111|223344556677885f5f5f5f5f5f5f	32	intel	xor dword ptr [ecx], edx
 3111|223344556677885f5f5f5f5f5f5f	32	plan9	XORL DX, 0(CX)
 3111|223344556677885f5f5f5f5f5f5f	64	gnu	xor %edx,(%rcx)
 3111|223344556677885f5f5f5f5f5f5f	64	intel	xor dword ptr [rcx], edx
 3111|223344556677885f5f5f5f5f5f5f	64	plan9	XORL DX, 0(CX)
 3211|223344556677885f5f5f5f5f5f5f	32	intel	xor dl, byte ptr [ecx]
-3211|223344556677885f5f5f5f5f5f5f	32	plan9	XORL 0(CX), DL
+3211|223344556677885f5f5f5f5f5f5f	32	plan9	XORB 0(CX), DL
 3211|223344556677885f5f5f5f5f5f5f	64	gnu	xor (%rcx),%dl
 3211|223344556677885f5f5f5f5f5f5f	64	intel	xor dl, byte ptr [rcx]
-3211|223344556677885f5f5f5f5f5f5f	64	plan9	XORL 0(CX), DL
+3211|223344556677885f5f5f5f5f5f5f	64	plan9	XORB 0(CX), DL
 3311|223344556677885f5f5f5f5f5f5f	32	intel	xor edx, dword ptr [ecx]
 3311|223344556677885f5f5f5f5f5f5f	32	plan9	XORL 0(CX), DX
 3311|223344556677885f5f5f5f5f5f5f	64	gnu	xor (%rcx),%edx
@@ -2120,20 +2120,20 @@
 37|11223344556677885f5f5f5f5f5f5f	64	intel	error: unrecognized instruction
 37|11223344556677885f5f5f5f5f5f5f	64	plan9	error: unrecognized instruction
 3811|223344556677885f5f5f5f5f5f5f	32	intel	cmp byte ptr [ecx], dl
-3811|223344556677885f5f5f5f5f5f5f	32	plan9	CMPL DL, 0(CX)
+3811|223344556677885f5f5f5f5f5f5f	32	plan9	CMPB DL, 0(CX)
 3811|223344556677885f5f5f5f5f5f5f	64	gnu	cmp %dl,(%rcx)
 3811|223344556677885f5f5f5f5f5f5f	64	intel	cmp byte ptr [rcx], dl
-3811|223344556677885f5f5f5f5f5f5f	64	plan9	CMPL DL, 0(CX)
+3811|223344556677885f5f5f5f5f5f5f	64	plan9	CMPB DL, 0(CX)
 3911|223344556677885f5f5f5f5f5f5f	32	intel	cmp dword ptr [ecx], edx
 3911|223344556677885f5f5f5f5f5f5f	32	plan9	CMPL DX, 0(CX)
 3911|223344556677885f5f5f5f5f5f5f	64	gnu	cmp %edx,(%rcx)
 3911|223344556677885f5f5f5f5f5f5f	64	intel	cmp dword ptr [rcx], edx
 3911|223344556677885f5f5f5f5f5f5f	64	plan9	CMPL DX, 0(CX)
 3a11|223344556677885f5f5f5f5f5f5f	32	intel	cmp dl, byte ptr [ecx]
-3a11|223344556677885f5f5f5f5f5f5f	32	plan9	CMPL 0(CX), DL
+3a11|223344556677885f5f5f5f5f5f5f	32	plan9	CMPB 0(CX), DL
 3a11|223344556677885f5f5f5f5f5f5f	64	gnu	cmp (%rcx),%dl
 3a11|223344556677885f5f5f5f5f5f5f	64	intel	cmp dl, byte ptr [rcx]
-3a11|223344556677885f5f5f5f5f5f5f	64	plan9	CMPL 0(CX), DL
+3a11|223344556677885f5f5f5f5f5f5f	64	plan9	CMPB 0(CX), DL
 3b11|223344556677885f5f5f5f5f5f5f	32	intel	cmp edx, dword ptr [ecx]
 3b11|223344556677885f5f5f5f5f5f5f	32	plan9	CMPL 0(CX), DX
 3b11|223344556677885f5f5f5f5f5f5f	64	gnu	cmp (%rcx),%edx
@@ -2570,13 +2570,14 @@
 488b11|223344556677885f5f5f5f5f5f	64	plan9	MOVQ 0(CX), DX
 488c11|223344556677885f5f5f5f5f5f	64	gnu	mov %ss,(%rcx)
 488c11|223344556677885f5f5f5f5f5f	64	intel	mov word ptr [rcx], ss
-488c11|223344556677885f5f5f5f5f5f	64	plan9	MOVQ SS, 0(CX)
+# MOVQ is probably more correct here (reads 16 bits of segment register, zero extends, writes 64 bits at CX)
+488c11|223344556677885f5f5f5f5f5f	64	plan9	MOVW SS, 0(CX)
 488d11|223344556677885f5f5f5f5f5f	64	gnu	lea (%rcx),%rdx
 488d11|223344556677885f5f5f5f5f5f	64	intel	lea rdx, ptr [rcx]
 488d11|223344556677885f5f5f5f5f5f	64	plan9	LEAQ 0(CX), DX
 488e11|223344556677885f5f5f5f5f5f	64	gnu	mov (%rcx),%ss
 488e11|223344556677885f5f5f5f5f5f	64	intel	mov ss, word ptr [rcx]
-488e11|223344556677885f5f5f5f5f5f	64	plan9	MOVQ 0(CX), SS
+488e11|223344556677885f5f5f5f5f5f	64	plan9	MOVW 0(CX), SS
 488f00|11223344556677885f5f5f5f5f	64	gnu	popq (%rax)
 488f00|11223344556677885f5f5f5f5f	64	intel	pop qword ptr [rax]
 488f00|11223344556677885f5f5f5f5f	64	plan9	POPQ 0(AX)
@@ -2597,13 +2598,13 @@
 489d|11223344556677885f5f5f5f5f5f	64	plan9	POPFQ
 48a01122334455667788|5f5f5f5f5f5f	64	gnu	mov -0x778899aabbccddef,%al
 48a01122334455667788|5f5f5f5f5f5f	64	intel	mov al, byte ptr [0x8877665544332211]
-48a01122334455667788|5f5f5f5f5f5f	64	plan9	MOVQ -0x778899aabbccddef, AL
+48a01122334455667788|5f5f5f5f5f5f	64	plan9	MOVB -0x778899aabbccddef, AL
 48a11122334455667788|5f5f5f5f5f5f	64	gnu	mov -0x778899aabbccddef,%rax
 48a11122334455667788|5f5f5f5f5f5f	64	intel	mov rax, qword ptr [0x8877665544332211]
 48a11122334455667788|5f5f5f5f5f5f	64	plan9	MOVQ -0x778899aabbccddef, AX
 48a21122334455667788|5f5f5f5f5f5f	64	gnu	mov %al,-0x778899aabbccddef
 48a21122334455667788|5f5f5f5f5f5f	64	intel	mov byte ptr [0x8877665544332211], al
-48a21122334455667788|5f5f5f5f5f5f	64	plan9	MOVQ AL, -0x778899aabbccddef
+48a21122334455667788|5f5f5f5f5f5f	64	plan9	MOVB AL, -0x778899aabbccddef
 48a31122334455667788|5f5f5f5f5f5f	64	gnu	mov %rax,-0x778899aabbccddef
 48a31122334455667788|5f5f5f5f5f5f	64	intel	mov qword ptr [0x8877665544332211], rax
 48a31122334455667788|5f5f5f5f5f5f	64	plan9	MOVQ AX, -0x778899aabbccddef
@@ -3873,10 +3874,10 @@
 660fc21122|3344556677885f5f5f5f5f	64	intel	cmppd xmm2, xmmword ptr [rcx], 0x22
 660fc21122|3344556677885f5f5f5f5f	64	plan9	CMPPD $0x22, 0(CX), X2
 660fc311|223344556677885f5f5f5f5f	32	intel	movnti dword ptr [ecx], edx
-660fc311|223344556677885f5f5f5f5f	32	plan9	MOVNTIW DX, 0(CX)
+660fc311|223344556677885f5f5f5f5f	32	plan9	MOVNTIL DX, 0(CX)
 660fc311|223344556677885f5f5f5f5f	64	gnu	movnti %edx,(%rcx)
 660fc311|223344556677885f5f5f5f5f	64	intel	movnti dword ptr [rcx], edx
-660fc311|223344556677885f5f5f5f5f	64	plan9	MOVNTIW DX, 0(CX)
+660fc311|223344556677885f5f5f5f5f	64	plan9	MOVNTIL DX, 0(CX)
 660fc41122|3344556677885f5f5f5f5f	32	intel	pinsrw xmm2, word ptr [ecx], 0x22
 660fc41122|3344556677885f5f5f5f5f	32	plan9	PINSRW $0x22, 0(CX), X2
 660fc41122|3344556677885f5f5f5f5f	64	gnu	pinsrw $0x22,(%rcx),%xmm2
@@ -4665,35 +4666,36 @@
 66ef|11223344556677885f5f5f5f5f5f	64	intel	out dx, ax
 66ef|11223344556677885f5f5f5f5f5f	64	plan9	OUTW AX, DX
 66f20f2a11|223344556677885f5f5f5f	32	intel	cvtsi2sd xmm2, dword ptr [ecx]
-66f20f2a11|223344556677885f5f5f5f	32	plan9	REPNE CVTSI2SDW 0(CX), X2
+66f20f2a11|223344556677885f5f5f5f	32	plan9	REPNE CVTSI2SDL 0(CX), X2
 66f20f2a11|223344556677885f5f5f5f	64	gnu	cvtsi2sdl (%rcx),%xmm2
 66f20f2a11|223344556677885f5f5f5f	64	intel	cvtsi2sd xmm2, dword ptr [rcx]
-66f20f2a11|223344556677885f5f5f5f	64	plan9	REPNE CVTSI2SDW 0(CX), X2
+66f20f2a11|223344556677885f5f5f5f	64	plan9	REPNE CVTSI2SDL 0(CX), X2
+# the Q extension is the size of the source float64 in memory. The destination is L.
 66f20f2c11|223344556677885f5f5f5f	32	intel	cvttsd2si edx, qword ptr [ecx]
-66f20f2c11|223344556677885f5f5f5f	32	plan9	REPNE CVTTSD2SIW 0(CX), DX
+66f20f2c11|223344556677885f5f5f5f	32	plan9	REPNE CVTTSD2SIQ 0(CX), DX
 66f20f2c11|223344556677885f5f5f5f	64	gnu	cvttsd2si (%rcx),%dx
 66f20f2c11|223344556677885f5f5f5f	64	intel	cvttsd2si edx, qword ptr [rcx]
-66f20f2c11|223344556677885f5f5f5f	64	plan9	REPNE CVTTSD2SIW 0(CX), DX
+66f20f2c11|223344556677885f5f5f5f	64	plan9	REPNE CVTTSD2SIQ 0(CX), DX
 66f20f2d11|223344556677885f5f5f5f	32	intel	cvtsd2si edx, qword ptr [ecx]
-66f20f2d11|223344556677885f5f5f5f	32	plan9	REPNE CVTSD2SIW 0(CX), DX
+66f20f2d11|223344556677885f5f5f5f	32	plan9	REPNE CVTSD2SIQ 0(CX), DX
 66f20f2d11|223344556677885f5f5f5f	64	gnu	cvtsd2si (%rcx),%dx
 66f20f2d11|223344556677885f5f5f5f	64	intel	cvtsd2si edx, qword ptr [rcx]
-66f20f2d11|223344556677885f5f5f5f	64	plan9	REPNE CVTSD2SIW 0(CX), DX
+66f20f2d11|223344556677885f5f5f5f	64	plan9	REPNE CVTSD2SIQ 0(CX), DX
 66f20f38f011|223344556677885f5f5f	32	intel	crc32 edx, byte ptr [ecx]
 66f20f38f011|223344556677885f5f5f	32	plan9	REPNE CRC32 0(CX), DX
 66f20f38f011|223344556677885f5f5f	64	gnu	crc32b (%rcx),%edx
 66f20f38f011|223344556677885f5f5f	64	intel	crc32 edx, byte ptr [rcx]
 66f20f38f011|223344556677885f5f5f	64	plan9	REPNE CRC32 0(CX), DX
 66f30f2c11|223344556677885f5f5f5f	32	intel	cvttss2si edx, dword ptr [ecx]
-66f30f2c11|223344556677885f5f5f5f	32	plan9	REP CVTTSS2SIW 0(CX), DX
+66f30f2c11|223344556677885f5f5f5f	32	plan9	REP CVTTSS2SIL 0(CX), DX
 66f30f2c11|223344556677885f5f5f5f	64	gnu	cvttss2si (%rcx),%dx
 66f30f2c11|223344556677885f5f5f5f	64	intel	cvttss2si edx, dword ptr [rcx]
-66f30f2c11|223344556677885f5f5f5f	64	plan9	REP CVTTSS2SIW 0(CX), DX
+66f30f2c11|223344556677885f5f5f5f	64	plan9	REP CVTTSS2SIL 0(CX), DX
 66f30f2d11|223344556677885f5f5f5f	32	intel	cvtss2si edx, dword ptr [ecx]
-66f30f2d11|223344556677885f5f5f5f	32	plan9	REP CVTSS2SIW 0(CX), DX
+66f30f2d11|223344556677885f5f5f5f	32	plan9	REP CVTSS2SIL 0(CX), DX
 66f30f2d11|223344556677885f5f5f5f	64	gnu	cvtss2si (%rcx),%dx
 66f30f2d11|223344556677885f5f5f5f	64	intel	cvtss2si edx, dword ptr [rcx]
-66f30f2d11|223344556677885f5f5f5f	64	plan9	REP CVTSS2SIW 0(CX), DX
+66f30f2d11|223344556677885f5f5f5f	64	plan9	REP CVTSS2SIL 0(CX), DX
 66f30fae11|223344556677885f5f5f5f	64	gnu	wrfsbasel (%rcx)
 66f30fae11|223344556677885f5f5f5f	64	intel	wrfsbase dword ptr [rcx]
 66f30fae11|223344556677885f5f5f5f	64	plan9	REP WRFSBASE 0(CX)
@@ -4917,45 +4919,45 @@
 7f11|223344556677885f5f5f5f5f5f5f	64	intel	jnle .+0x11
 7f11|223344556677885f5f5f5f5f5f5f	64	plan9	JG .+17
 800011|223344556677885f5f5f5f5f5f	32	intel	add byte ptr [eax], 0x11
-800011|223344556677885f5f5f5f5f5f	32	plan9	ADDL $0x11, 0(AX)
+800011|223344556677885f5f5f5f5f5f	32	plan9	ADDB $0x11, 0(AX)
 800011|223344556677885f5f5f5f5f5f	64	gnu	addb $0x11,(%rax)
 800011|223344556677885f5f5f5f5f5f	64	intel	add byte ptr [rax], 0x11
-800011|223344556677885f5f5f5f5f5f	64	plan9	ADDL $0x11, 0(AX)
+800011|223344556677885f5f5f5f5f5f	64	plan9	ADDB $0x11, 0(AX)
 800811|223344556677885f5f5f5f5f5f	32	intel	or byte ptr [eax], 0x11
-800811|223344556677885f5f5f5f5f5f	32	plan9	ORL $0x11, 0(AX)
+800811|223344556677885f5f5f5f5f5f	32	plan9	ORB $0x11, 0(AX)
 800811|223344556677885f5f5f5f5f5f	64	gnu	orb $0x11,(%rax)
 800811|223344556677885f5f5f5f5f5f	64	intel	or byte ptr [rax], 0x11
-800811|223344556677885f5f5f5f5f5f	64	plan9	ORL $0x11, 0(AX)
+800811|223344556677885f5f5f5f5f5f	64	plan9	ORB $0x11, 0(AX)
 801122|3344556677885f5f5f5f5f5f5f	32	intel	adc byte ptr [ecx], 0x22
-801122|3344556677885f5f5f5f5f5f5f	32	plan9	ADCL $0x22, 0(CX)
+801122|3344556677885f5f5f5f5f5f5f	32	plan9	ADCB $0x22, 0(CX)
 801122|3344556677885f5f5f5f5f5f5f	64	gnu	adcb $0x22,(%rcx)
 801122|3344556677885f5f5f5f5f5f5f	64	intel	adc byte ptr [rcx], 0x22
-801122|3344556677885f5f5f5f5f5f5f	64	plan9	ADCL $0x22, 0(CX)
+801122|3344556677885f5f5f5f5f5f5f	64	plan9	ADCB $0x22, 0(CX)
 801811|223344556677885f5f5f5f5f5f	32	intel	sbb byte ptr [eax], 0x11
-801811|223344556677885f5f5f5f5f5f	32	plan9	SBBL $0x11, 0(AX)
+801811|223344556677885f5f5f5f5f5f	32	plan9	SBBB $0x11, 0(AX)
 801811|223344556677885f5f5f5f5f5f	64	gnu	sbbb $0x11,(%rax)
 801811|223344556677885f5f5f5f5f5f	64	intel	sbb byte ptr [rax], 0x11
-801811|223344556677885f5f5f5f5f5f	64	plan9	SBBL $0x11, 0(AX)
+801811|223344556677885f5f5f5f5f5f	64	plan9	SBBB $0x11, 0(AX)
 802011|223344556677885f5f5f5f5f5f	32	intel	and byte ptr [eax], 0x11
-802011|223344556677885f5f5f5f5f5f	32	plan9	ANDL $0x11, 0(AX)
+802011|223344556677885f5f5f5f5f5f	32	plan9	ANDB $0x11, 0(AX)
 802011|223344556677885f5f5f5f5f5f	64	gnu	andb $0x11,(%rax)
 802011|223344556677885f5f5f5f5f5f	64	intel	and byte ptr [rax], 0x11
-802011|223344556677885f5f5f5f5f5f	64	plan9	ANDL $0x11, 0(AX)
+802011|223344556677885f5f5f5f5f5f	64	plan9	ANDB $0x11, 0(AX)
 802811|223344556677885f5f5f5f5f5f	32	intel	sub byte ptr [eax], 0x11
-802811|223344556677885f5f5f5f5f5f	32	plan9	SUBL $0x11, 0(AX)
+802811|223344556677885f5f5f5f5f5f	32	plan9	SUBB $0x11, 0(AX)
 802811|223344556677885f5f5f5f5f5f	64	gnu	subb $0x11,(%rax)
 802811|223344556677885f5f5f5f5f5f	64	intel	sub byte ptr [rax], 0x11
-802811|223344556677885f5f5f5f5f5f	64	plan9	SUBL $0x11, 0(AX)
+802811|223344556677885f5f5f5f5f5f	64	plan9	SUBB $0x11, 0(AX)
 803011|223344556677885f5f5f5f5f5f	32	intel	xor byte ptr [eax], 0x11
-803011|223344556677885f5f5f5f5f5f	32	plan9	XORL $0x11, 0(AX)
+803011|223344556677885f5f5f5f5f5f	32	plan9	XORB $0x11, 0(AX)
 803011|223344556677885f5f5f5f5f5f	64	gnu	xorb $0x11,(%rax)
 803011|223344556677885f5f5f5f5f5f	64	intel	xor byte ptr [rax], 0x11
-803011|223344556677885f5f5f5f5f5f	64	plan9	XORL $0x11, 0(AX)
+803011|223344556677885f5f5f5f5f5f	64	plan9	XORB $0x11, 0(AX)
 803811|223344556677885f5f5f5f5f5f	32	intel	cmp byte ptr [eax], 0x11
-803811|223344556677885f5f5f5f5f5f	32	plan9	CMPL $0x11, 0(AX)
+803811|223344556677885f5f5f5f5f5f	32	plan9	CMPB $0x11, 0(AX)
 803811|223344556677885f5f5f5f5f5f	64	gnu	cmpb $0x11,(%rax)
 803811|223344556677885f5f5f5f5f5f	64	intel	cmp byte ptr [rax], 0x11
-803811|223344556677885f5f5f5f5f5f	64	plan9	CMPL $0x11, 0(AX)
+803811|223344556677885f5f5f5f5f5f	64	plan9	CMPB $0x11, 0(AX)
 810011223344|556677885f5f5f5f5f5f	32	intel	add dword ptr [eax], 0x44332211
 810011223344|556677885f5f5f5f5f5f	32	plan9	ADDL $0x44332211, 0(AX)
 810011223344|556677885f5f5f5f5f5f	64	gnu	addl $0x44332211,(%rax)
@@ -5037,65 +5039,65 @@
 833811|223344556677885f5f5f5f5f5f	64	intel	cmp dword ptr [rax], 0x11
 833811|223344556677885f5f5f5f5f5f	64	plan9	CMPL $0x11, 0(AX)
 8411|223344556677885f5f5f5f5f5f5f	32	intel	test byte ptr [ecx], dl
-8411|223344556677885f5f5f5f5f5f5f	32	plan9	TESTL DL, 0(CX)
+8411|223344556677885f5f5f5f5f5f5f	32	plan9	TESTB DL, 0(CX)
 8411|223344556677885f5f5f5f5f5f5f	64	gnu	test %dl,(%rcx)
 8411|223344556677885f5f5f5f5f5f5f	64	intel	test byte ptr [rcx], dl
-8411|223344556677885f5f5f5f5f5f5f	64	plan9	TESTL DL, 0(CX)
+8411|223344556677885f5f5f5f5f5f5f	64	plan9	TESTB DL, 0(CX)
 8511|223344556677885f5f5f5f5f5f5f	32	intel	test dword ptr [ecx], edx
 8511|223344556677885f5f5f5f5f5f5f	32	plan9	TESTL DX, 0(CX)
 8511|223344556677885f5f5f5f5f5f5f	64	gnu	test %edx,(%rcx)
 8511|223344556677885f5f5f5f5f5f5f	64	intel	test dword ptr [rcx], edx
 8511|223344556677885f5f5f5f5f5f5f	64	plan9	TESTL DX, 0(CX)
 8611|223344556677885f5f5f5f5f5f5f	32	intel	xchg byte ptr [ecx], dl
-8611|223344556677885f5f5f5f5f5f5f	32	plan9	XCHGL DL, 0(CX)
+8611|223344556677885f5f5f5f5f5f5f	32	plan9	XCHGB DL, 0(CX)
 8611|223344556677885f5f5f5f5f5f5f	64	gnu	xchg %dl,(%rcx)
 8611|223344556677885f5f5f5f5f5f5f	64	intel	xchg byte ptr [rcx], dl
-8611|223344556677885f5f5f5f5f5f5f	64	plan9	XCHGL DL, 0(CX)
+8611|223344556677885f5f5f5f5f5f5f	64	plan9	XCHGB DL, 0(CX)
 8711|223344556677885f5f5f5f5f5f5f	32	intel	xchg dword ptr [ecx], edx
 8711|223344556677885f5f5f5f5f5f5f	32	plan9	XCHGL DX, 0(CX)
 8711|223344556677885f5f5f5f5f5f5f	64	gnu	xchg %edx,(%rcx)
 8711|223344556677885f5f5f5f5f5f5f	64	intel	xchg dword ptr [rcx], edx
 8711|223344556677885f5f5f5f5f5f5f	64	plan9	XCHGL DX, 0(CX)
 8811|223344556677885f5f5f5f5f5f5f	32	intel	mov byte ptr [ecx], dl
-8811|223344556677885f5f5f5f5f5f5f	32	plan9	MOVL DL, 0(CX)
+8811|223344556677885f5f5f5f5f5f5f	32	plan9	MOVB DL, 0(CX)
 8811|223344556677885f5f5f5f5f5f5f	64	gnu	mov %dl,(%rcx)
 8811|223344556677885f5f5f5f5f5f5f	64	intel	mov byte ptr [rcx], dl
-8811|223344556677885f5f5f5f5f5f5f	64	plan9	MOVL DL, 0(CX)
+8811|223344556677885f5f5f5f5f5f5f	64	plan9	MOVB DL, 0(CX)
 8911|223344556677885f5f5f5f5f5f5f	32	intel	mov dword ptr [ecx], edx
 8911|223344556677885f5f5f5f5f5f5f	32	plan9	MOVL DX, 0(CX)
 8911|223344556677885f5f5f5f5f5f5f	64	gnu	mov %edx,(%rcx)
 8911|223344556677885f5f5f5f5f5f5f	64	intel	mov dword ptr [rcx], edx
 8911|223344556677885f5f5f5f5f5f5f	64	plan9	MOVL DX, 0(CX)
 8a11|223344556677885f5f5f5f5f5f5f	32	intel	mov dl, byte ptr [ecx]
-8a11|223344556677885f5f5f5f5f5f5f	32	plan9	MOVL 0(CX), DL
+8a11|223344556677885f5f5f5f5f5f5f	32	plan9	MOVB 0(CX), DL
 8a11|223344556677885f5f5f5f5f5f5f	64	gnu	mov (%rcx),%dl
 8a11|223344556677885f5f5f5f5f5f5f	64	intel	mov dl, byte ptr [rcx]
-8a11|223344556677885f5f5f5f5f5f5f	64	plan9	MOVL 0(CX), DL
+8a11|223344556677885f5f5f5f5f5f5f	64	plan9	MOVB 0(CX), DL
 8b11|223344556677885f5f5f5f5f5f5f	32	intel	mov edx, dword ptr [ecx]
 8b11|223344556677885f5f5f5f5f5f5f	32	plan9	MOVL 0(CX), DX
 8b11|223344556677885f5f5f5f5f5f5f	64	gnu	mov (%rcx),%edx
 8b11|223344556677885f5f5f5f5f5f5f	64	intel	mov edx, dword ptr [rcx]
 8b11|223344556677885f5f5f5f5f5f5f	64	plan9	MOVL 0(CX), DX
 8c11|223344556677885f5f5f5f5f5f5f	32	intel	mov word ptr [ecx], ss
-8c11|223344556677885f5f5f5f5f5f5f	32	plan9	MOVL SS, 0(CX)
+8c11|223344556677885f5f5f5f5f5f5f	32	plan9	MOVW SS, 0(CX)
 8c11|223344556677885f5f5f5f5f5f5f	64	gnu	mov %ss,(%rcx)
 8c11|223344556677885f5f5f5f5f5f5f	64	intel	mov word ptr [rcx], ss
-8c11|223344556677885f5f5f5f5f5f5f	64	plan9	MOVL SS, 0(CX)
+8c11|223344556677885f5f5f5f5f5f5f	64	plan9	MOVW SS, 0(CX)
 8d11|223344556677885f5f5f5f5f5f5f	32	intel	lea edx, ptr [ecx]
 8d11|223344556677885f5f5f5f5f5f5f	32	plan9	LEAL 0(CX), DX
 8d11|223344556677885f5f5f5f5f5f5f	64	gnu	lea (%rcx),%edx
 8d11|223344556677885f5f5f5f5f5f5f	64	intel	lea edx, ptr [rcx]
 8d11|223344556677885f5f5f5f5f5f5f	64	plan9	LEAL 0(CX), DX
 8e11|223344556677885f5f5f5f5f5f5f	32	intel	mov ss, word ptr [ecx]
-8e11|223344556677885f5f5f5f5f5f5f	32	plan9	MOVL 0(CX), SS
+8e11|223344556677885f5f5f5f5f5f5f	32	plan9	MOVW 0(CX), SS
 8e11|223344556677885f5f5f5f5f5f5f	64	gnu	mov (%rcx),%ss
 8e11|223344556677885f5f5f5f5f5f5f	64	intel	mov ss, word ptr [rcx]
-8e11|223344556677885f5f5f5f5f5f5f	64	plan9	MOVL 0(CX), SS
+8e11|223344556677885f5f5f5f5f5f5f	64	plan9	MOVW 0(CX), SS
 8f00|11223344556677885f5f5f5f5f5f	32	intel	pop dword ptr [eax]
 8f00|11223344556677885f5f5f5f5f5f	32	plan9	POPL 0(AX)
 8f00|11223344556677885f5f5f5f5f5f	64	gnu	popq (%rax)
 8f00|11223344556677885f5f5f5f5f5f	64	intel	pop qword ptr [rax]
-8f00|11223344556677885f5f5f5f5f5f	64	plan9	POPL 0(AX)
+8f00|11223344556677885f5f5f5f5f5f	64	plan9	POPQ 0(AX)
 91|11223344556677885f5f5f5f5f5f5f	32	intel	xchg ecx, eax
 91|11223344556677885f5f5f5f5f5f5f	32	plan9	XCHGL AX, CX
 91|11223344556677885f5f5f5f5f5f5f	64	intel	xchg ecx, eax
@@ -5144,9 +5146,9 @@
 a111223344|556677885f5f5f5f5f5f5f	32	plan9	MOVL 0x44332211, AX
 a21122334455667788|5f5f5f5f5f5f5f	64	gnu	mov %al,-0x778899aabbccddef
 a21122334455667788|5f5f5f5f5f5f5f	64	intel	mov byte ptr [0x8877665544332211], al
-a21122334455667788|5f5f5f5f5f5f5f	64	plan9	MOVL AL, -0x778899aabbccddef
+a21122334455667788|5f5f5f5f5f5f5f	64	plan9	MOVB AL, -0x778899aabbccddef
 a211223344|556677885f5f5f5f5f5f5f	32	intel	mov byte ptr [0x44332211], al
-a211223344|556677885f5f5f5f5f5f5f	32	plan9	MOVL AL, 0x44332211
+a211223344|556677885f5f5f5f5f5f5f	32	plan9	MOVB AL, 0x44332211
 a31122334455667788|5f5f5f5f5f5f5f	64	gnu	mov %eax,-0x778899aabbccddef
 a31122334455667788|5f5f5f5f5f5f5f	64	intel	mov dword ptr [0x8877665544332211], eax
 a31122334455667788|5f5f5f5f5f5f5f	64	plan9	MOVL AX, -0x778899aabbccddef
@@ -5223,40 +5225,40 @@
 b811223344|556677885f5f5f5f5f5f5f	64	intel	mov eax, 0x44332211
 b811223344|556677885f5f5f5f5f5f5f	64	plan9	MOVL $0x44332211, AX
 c00011|223344556677885f5f5f5f5f5f	32	intel	rol byte ptr [eax], 0x11
-c00011|223344556677885f5f5f5f5f5f	32	plan9	ROLL $0x11, 0(AX)
+c00011|223344556677885f5f5f5f5f5f	32	plan9	ROLB $0x11, 0(AX)
 c00011|223344556677885f5f5f5f5f5f	64	gnu	rolb $0x11,(%rax)
 c00011|223344556677885f5f5f5f5f5f	64	intel	rol byte ptr [rax], 0x11
-c00011|223344556677885f5f5f5f5f5f	64	plan9	ROLL $0x11, 0(AX)
+c00011|223344556677885f5f5f5f5f5f	64	plan9	ROLB $0x11, 0(AX)
 c00811|223344556677885f5f5f5f5f5f	32	intel	ror byte ptr [eax], 0x11
-c00811|223344556677885f5f5f5f5f5f	32	plan9	RORL $0x11, 0(AX)
+c00811|223344556677885f5f5f5f5f5f	32	plan9	RORB $0x11, 0(AX)
 c00811|223344556677885f5f5f5f5f5f	64	gnu	rorb $0x11,(%rax)
 c00811|223344556677885f5f5f5f5f5f	64	intel	ror byte ptr [rax], 0x11
-c00811|223344556677885f5f5f5f5f5f	64	plan9	RORL $0x11, 0(AX)
+c00811|223344556677885f5f5f5f5f5f	64	plan9	RORB $0x11, 0(AX)
 c01122|3344556677885f5f5f5f5f5f5f	32	intel	rcl byte ptr [ecx], 0x22
-c01122|3344556677885f5f5f5f5f5f5f	32	plan9	RCLL $0x22, 0(CX)
+c01122|3344556677885f5f5f5f5f5f5f	32	plan9	RCLB $0x22, 0(CX)
 c01122|3344556677885f5f5f5f5f5f5f	64	gnu	rclb $0x22,(%rcx)
 c01122|3344556677885f5f5f5f5f5f5f	64	intel	rcl byte ptr [rcx], 0x22
-c01122|3344556677885f5f5f5f5f5f5f	64	plan9	RCLL $0x22, 0(CX)
+c01122|3344556677885f5f5f5f5f5f5f	64	plan9	RCLB $0x22, 0(CX)
 c01811|223344556677885f5f5f5f5f5f	32	intel	rcr byte ptr [eax], 0x11
-c01811|223344556677885f5f5f5f5f5f	32	plan9	RCRL $0x11, 0(AX)
+c01811|223344556677885f5f5f5f5f5f	32	plan9	RCRB $0x11, 0(AX)
 c01811|223344556677885f5f5f5f5f5f	64	gnu	rcrb $0x11,(%rax)
 c01811|223344556677885f5f5f5f5f5f	64	intel	rcr byte ptr [rax], 0x11
-c01811|223344556677885f5f5f5f5f5f	64	plan9	RCRL $0x11, 0(AX)
+c01811|223344556677885f5f5f5f5f5f	64	plan9	RCRB $0x11, 0(AX)
 c02011|223344556677885f5f5f5f5f5f	32	intel	shl byte ptr [eax], 0x11
-c02011|223344556677885f5f5f5f5f5f	32	plan9	SHLL $0x11, 0(AX)
+c02011|223344556677885f5f5f5f5f5f	32	plan9	SHLB $0x11, 0(AX)
 c02011|223344556677885f5f5f5f5f5f	64	gnu	shlb $0x11,(%rax)
 c02011|223344556677885f5f5f5f5f5f	64	intel	shl byte ptr [rax], 0x11
-c02011|223344556677885f5f5f5f5f5f	64	plan9	SHLL $0x11, 0(AX)
+c02011|223344556677885f5f5f5f5f5f	64	plan9	SHLB $0x11, 0(AX)
 c02811|223344556677885f5f5f5f5f5f	32	intel	shr byte ptr [eax], 0x11
-c02811|223344556677885f5f5f5f5f5f	32	plan9	SHRL $0x11, 0(AX)
+c02811|223344556677885f5f5f5f5f5f	32	plan9	SHRB $0x11, 0(AX)
 c02811|223344556677885f5f5f5f5f5f	64	gnu	shrb $0x11,(%rax)
 c02811|223344556677885f5f5f5f5f5f	64	intel	shr byte ptr [rax], 0x11
-c02811|223344556677885f5f5f5f5f5f	64	plan9	SHRL $0x11, 0(AX)
+c02811|223344556677885f5f5f5f5f5f	64	plan9	SHRB $0x11, 0(AX)
 c03811|223344556677885f5f5f5f5f5f	32	intel	sar byte ptr [eax], 0x11
-c03811|223344556677885f5f5f5f5f5f	32	plan9	SARL $0x11, 0(AX)
+c03811|223344556677885f5f5f5f5f5f	32	plan9	SARB $0x11, 0(AX)
 c03811|223344556677885f5f5f5f5f5f	64	gnu	sarb $0x11,(%rax)
 c03811|223344556677885f5f5f5f5f5f	64	intel	sar byte ptr [rax], 0x11
-c03811|223344556677885f5f5f5f5f5f	64	plan9	SARL $0x11, 0(AX)
+c03811|223344556677885f5f5f5f5f5f	64	plan9	SARB $0x11, 0(AX)
 c10011|223344556677885f5f5f5f5f5f	32	intel	rol dword ptr [eax], 0x11
 c10011|223344556677885f5f5f5f5f5f	32	plan9	ROLL $0x11, 0(AX)
 c10011|223344556677885f5f5f5f5f5f	64	gnu	roll $0x11,(%rax)
@@ -5302,10 +5304,10 @@
 c511|223344556677885f5f5f5f5f5f5f	32	intel	lds edx, ptr [ecx]
 c511|223344556677885f5f5f5f5f5f5f	32	plan9	LDS 0(CX), DX
 c60011|223344556677885f5f5f5f5f5f	32	intel	mov byte ptr [eax], 0x11
-c60011|223344556677885f5f5f5f5f5f	32	plan9	MOVL $0x11, 0(AX)
+c60011|223344556677885f5f5f5f5f5f	32	plan9	MOVB $0x11, 0(AX)
 c60011|223344556677885f5f5f5f5f5f	64	gnu	movb $0x11,(%rax)
 c60011|223344556677885f5f5f5f5f5f	64	intel	mov byte ptr [rax], 0x11
-c60011|223344556677885f5f5f5f5f5f	64	plan9	MOVL $0x11, 0(AX)
+c60011|223344556677885f5f5f5f5f5f	64	plan9	MOVB $0x11, 0(AX)
 c6f811|223344556677885f5f5f5f5f5f	32	intel	xabort 0x11
 c6f811|223344556677885f5f5f5f5f5f	32	plan9	XABORT $0x11
 c6f811|223344556677885f5f5f5f5f5f	64	gnu	xabort $0x11
@@ -5362,40 +5364,40 @@
 cf|11223344556677885f5f5f5f5f5f5f	64	intel	iretd
 cf|11223344556677885f5f5f5f5f5f5f	64	plan9	IRETD
 d000|11223344556677885f5f5f5f5f5f	32	intel	rol byte ptr [eax], 0x1
-d000|11223344556677885f5f5f5f5f5f	32	plan9	ROLL $0x1, 0(AX)
+d000|11223344556677885f5f5f5f5f5f	32	plan9	ROLB $0x1, 0(AX)
 d000|11223344556677885f5f5f5f5f5f	64	gnu	rolb (%rax)
 d000|11223344556677885f5f5f5f5f5f	64	intel	rol byte ptr [rax], 0x1
-d000|11223344556677885f5f5f5f5f5f	64	plan9	ROLL $0x1, 0(AX)
+d000|11223344556677885f5f5f5f5f5f	64	plan9	ROLB $0x1, 0(AX)
 d008|11223344556677885f5f5f5f5f5f	32	intel	ror byte ptr [eax], 0x1
-d008|11223344556677885f5f5f5f5f5f	32	plan9	RORL $0x1, 0(AX)
+d008|11223344556677885f5f5f5f5f5f	32	plan9	RORB $0x1, 0(AX)
 d008|11223344556677885f5f5f5f5f5f	64	gnu	rorb (%rax)
 d008|11223344556677885f5f5f5f5f5f	64	intel	ror byte ptr [rax], 0x1
-d008|11223344556677885f5f5f5f5f5f	64	plan9	RORL $0x1, 0(AX)
+d008|11223344556677885f5f5f5f5f5f	64	plan9	RORB $0x1, 0(AX)
 d011|223344556677885f5f5f5f5f5f5f	32	intel	rcl byte ptr [ecx], 0x1
-d011|223344556677885f5f5f5f5f5f5f	32	plan9	RCLL $0x1, 0(CX)
+d011|223344556677885f5f5f5f5f5f5f	32	plan9	RCLB $0x1, 0(CX)
 d011|223344556677885f5f5f5f5f5f5f	64	gnu	rclb (%rcx)
 d011|223344556677885f5f5f5f5f5f5f	64	intel	rcl byte ptr [rcx], 0x1
-d011|223344556677885f5f5f5f5f5f5f	64	plan9	RCLL $0x1, 0(CX)
+d011|223344556677885f5f5f5f5f5f5f	64	plan9	RCLB $0x1, 0(CX)
 d018|11223344556677885f5f5f5f5f5f	32	intel	rcr byte ptr [eax], 0x1
-d018|11223344556677885f5f5f5f5f5f	32	plan9	RCRL $0x1, 0(AX)
+d018|11223344556677885f5f5f5f5f5f	32	plan9	RCRB $0x1, 0(AX)
 d018|11223344556677885f5f5f5f5f5f	64	gnu	rcrb (%rax)
 d018|11223344556677885f5f5f5f5f5f	64	intel	rcr byte ptr [rax], 0x1
-d018|11223344556677885f5f5f5f5f5f	64	plan9	RCRL $0x1, 0(AX)
+d018|11223344556677885f5f5f5f5f5f	64	plan9	RCRB $0x1, 0(AX)
 d020|11223344556677885f5f5f5f5f5f	32	intel	shl byte ptr [eax], 0x1
-d020|11223344556677885f5f5f5f5f5f	32	plan9	SHLL $0x1, 0(AX)
+d020|11223344556677885f5f5f5f5f5f	32	plan9	SHLB $0x1, 0(AX)
 d020|11223344556677885f5f5f5f5f5f	64	gnu	shlb (%rax)
 d020|11223344556677885f5f5f5f5f5f	64	intel	shl byte ptr [rax], 0x1
-d020|11223344556677885f5f5f5f5f5f	64	plan9	SHLL $0x1, 0(AX)
+d020|11223344556677885f5f5f5f5f5f	64	plan9	SHLB $0x1, 0(AX)
 d028|11223344556677885f5f5f5f5f5f	32	intel	shr byte ptr [eax], 0x1
-d028|11223344556677885f5f5f5f5f5f	32	plan9	SHRL $0x1, 0(AX)
+d028|11223344556677885f5f5f5f5f5f	32	plan9	SHRB $0x1, 0(AX)
 d028|11223344556677885f5f5f5f5f5f	64	gnu	shrb (%rax)
 d028|11223344556677885f5f5f5f5f5f	64	intel	shr byte ptr [rax], 0x1
-d028|11223344556677885f5f5f5f5f5f	64	plan9	SHRL $0x1, 0(AX)
+d028|11223344556677885f5f5f5f5f5f	64	plan9	SHRB $0x1, 0(AX)
 d038|11223344556677885f5f5f5f5f5f	32	intel	sar byte ptr [eax], 0x1
-d038|11223344556677885f5f5f5f5f5f	32	plan9	SARL $0x1, 0(AX)
+d038|11223344556677885f5f5f5f5f5f	32	plan9	SARB $0x1, 0(AX)
 d038|11223344556677885f5f5f5f5f5f	64	gnu	sarb (%rax)
 d038|11223344556677885f5f5f5f5f5f	64	intel	sar byte ptr [rax], 0x1
-d038|11223344556677885f5f5f5f5f5f	64	plan9	SARL $0x1, 0(AX)
+d038|11223344556677885f5f5f5f5f5f	64	plan9	SARB $0x1, 0(AX)
 d100|11223344556677885f5f5f5f5f5f	32	intel	rol dword ptr [eax], 0x1
 d100|11223344556677885f5f5f5f5f5f	32	plan9	ROLL $0x1, 0(AX)
 d100|11223344556677885f5f5f5f5f5f	64	gnu	roll (%rax)
@@ -5432,40 +5434,40 @@
 d138|11223344556677885f5f5f5f5f5f	64	intel	sar dword ptr [rax], 0x1
 d138|11223344556677885f5f5f5f5f5f	64	plan9	SARL $0x1, 0(AX)
 d200|11223344556677885f5f5f5f5f5f	32	intel	rol byte ptr [eax], cl
-d200|11223344556677885f5f5f5f5f5f	32	plan9	ROLL CL, 0(AX)
+d200|11223344556677885f5f5f5f5f5f	32	plan9	ROLB CL, 0(AX)
 d200|11223344556677885f5f5f5f5f5f	64	gnu	rolb %cl,(%rax)
 d200|11223344556677885f5f5f5f5f5f	64	intel	rol byte ptr [rax], cl
-d200|11223344556677885f5f5f5f5f5f	64	plan9	ROLL CL, 0(AX)
+d200|11223344556677885f5f5f5f5f5f	64	plan9	ROLB CL, 0(AX)
 d208|11223344556677885f5f5f5f5f5f	32	intel	ror byte ptr [eax], cl
-d208|11223344556677885f5f5f5f5f5f	32	plan9	RORL CL, 0(AX)
+d208|11223344556677885f5f5f5f5f5f	32	plan9	RORB CL, 0(AX)
 d208|11223344556677885f5f5f5f5f5f	64	gnu	rorb %cl,(%rax)
 d208|11223344556677885f5f5f5f5f5f	64	intel	ror byte ptr [rax], cl
-d208|11223344556677885f5f5f5f5f5f	64	plan9	RORL CL, 0(AX)
+d208|11223344556677885f5f5f5f5f5f	64	plan9	RORB CL, 0(AX)
 d211|223344556677885f5f5f5f5f5f5f	32	intel	rcl byte ptr [ecx], cl
-d211|223344556677885f5f5f5f5f5f5f	32	plan9	RCLL CL, 0(CX)
+d211|223344556677885f5f5f5f5f5f5f	32	plan9	RCLB CL, 0(CX)
 d211|223344556677885f5f5f5f5f5f5f	64	gnu	rclb %cl,(%rcx)
 d211|223344556677885f5f5f5f5f5f5f	64	intel	rcl byte ptr [rcx], cl
-d211|223344556677885f5f5f5f5f5f5f	64	plan9	RCLL CL, 0(CX)
+d211|223344556677885f5f5f5f5f5f5f	64	plan9	RCLB CL, 0(CX)
 d218|11223344556677885f5f5f5f5f5f	32	intel	rcr byte ptr [eax], cl
-d218|11223344556677885f5f5f5f5f5f	32	plan9	RCRL CL, 0(AX)
+d218|11223344556677885f5f5f5f5f5f	32	plan9	RCRB CL, 0(AX)
 d218|11223344556677885f5f5f5f5f5f	64	gnu	rcrb %cl,(%rax)
 d218|11223344556677885f5f5f5f5f5f	64	intel	rcr byte ptr [rax], cl
-d218|11223344556677885f5f5f5f5f5f	64	plan9	RCRL CL, 0(AX)
+d218|11223344556677885f5f5f5f5f5f	64	plan9	RCRB CL, 0(AX)
 d220|11223344556677885f5f5f5f5f5f	32	intel	shl byte ptr [eax], cl
-d220|11223344556677885f5f5f5f5f5f	32	plan9	SHLL CL, 0(AX)
+d220|11223344556677885f5f5f5f5f5f	32	plan9	SHLB CL, 0(AX)
 d220|11223344556677885f5f5f5f5f5f	64	gnu	shlb %cl,(%rax)
 d220|11223344556677885f5f5f5f5f5f	64	intel	shl byte ptr [rax], cl
-d220|11223344556677885f5f5f5f5f5f	64	plan9	SHLL CL, 0(AX)
+d220|11223344556677885f5f5f5f5f5f	64	plan9	SHLB CL, 0(AX)
 d228|11223344556677885f5f5f5f5f5f	32	intel	shr byte ptr [eax], cl
-d228|11223344556677885f5f5f5f5f5f	32	plan9	SHRL CL, 0(AX)
+d228|11223344556677885f5f5f5f5f5f	32	plan9	SHRB CL, 0(AX)
 d228|11223344556677885f5f5f5f5f5f	64	gnu	shrb %cl,(%rax)
 d228|11223344556677885f5f5f5f5f5f	64	intel	shr byte ptr [rax], cl
-d228|11223344556677885f5f5f5f5f5f	64	plan9	SHRL CL, 0(AX)
+d228|11223344556677885f5f5f5f5f5f	64	plan9	SHRB CL, 0(AX)
 d238|11223344556677885f5f5f5f5f5f	32	intel	sar byte ptr [eax], cl
-d238|11223344556677885f5f5f5f5f5f	32	plan9	SARL CL, 0(AX)
+d238|11223344556677885f5f5f5f5f5f	32	plan9	SARB CL, 0(AX)
 d238|11223344556677885f5f5f5f5f5f	64	gnu	sarb %cl,(%rax)
 d238|11223344556677885f5f5f5f5f5f	64	intel	sar byte ptr [rax], cl
-d238|11223344556677885f5f5f5f5f5f	64	plan9	SARL CL, 0(AX)
+d238|11223344556677885f5f5f5f5f5f	64	plan9	SARB CL, 0(AX)
 d300|11223344556677885f5f5f5f5f5f	32	intel	rol dword ptr [eax], cl
 d300|11223344556677885f5f5f5f5f5f	32	plan9	ROLL CL, 0(AX)
 d300|11223344556677885f5f5f5f5f5f	64	gnu	roll %cl,(%rax)
@@ -6254,15 +6256,15 @@
 f20f2a11|223344556677885f5f5f5f5f	64	intel	cvtsi2sd xmm2, dword ptr [rcx]
 f20f2a11|223344556677885f5f5f5f5f	64	plan9	REPNE CVTSI2SDL 0(CX), X2
 f20f2c11|223344556677885f5f5f5f5f	32	intel	cvttsd2si edx, qword ptr [ecx]
-f20f2c11|223344556677885f5f5f5f5f	32	plan9	REPNE CVTTSD2SIL 0(CX), DX
+f20f2c11|223344556677885f5f5f5f5f	32	plan9	REPNE CVTTSD2SIQ 0(CX), DX
 f20f2c11|223344556677885f5f5f5f5f	64	gnu	cvttsd2si (%rcx),%edx
 f20f2c11|223344556677885f5f5f5f5f	64	intel	cvttsd2si edx, qword ptr [rcx]
-f20f2c11|223344556677885f5f5f5f5f	64	plan9	REPNE CVTTSD2SIL 0(CX), DX
+f20f2c11|223344556677885f5f5f5f5f	64	plan9	REPNE CVTTSD2SIQ 0(CX), DX
 f20f2d11|223344556677885f5f5f5f5f	32	intel	cvtsd2si edx, qword ptr [ecx]
-f20f2d11|223344556677885f5f5f5f5f	32	plan9	REPNE CVTSD2SIL 0(CX), DX
+f20f2d11|223344556677885f5f5f5f5f	32	plan9	REPNE CVTSD2SIQ 0(CX), DX
 f20f2d11|223344556677885f5f5f5f5f	64	gnu	cvtsd2si (%rcx),%edx
 f20f2d11|223344556677885f5f5f5f5f	64	intel	cvtsd2si edx, qword ptr [rcx]
-f20f2d11|223344556677885f5f5f5f5f	64	plan9	REPNE CVTSD2SIL 0(CX), DX
+f20f2d11|223344556677885f5f5f5f5f	64	plan9	REPNE CVTSD2SIQ 0(CX), DX
 f20f38f011|223344556677885f5f5f5f	32	intel	crc32 edx, byte ptr [ecx]
 f20f38f011|223344556677885f5f5f5f	32	plan9	REPNE CRC32 0(CX), DX
 f20f38f011|223344556677885f5f5f5f	64	gnu	crc32b (%rcx),%edx
@@ -6530,10 +6532,10 @@
 f3480f2a11|223344556677885f5f5f5f	64	plan9	REP CVTSI2SSQ 0(CX), X2
 f3480f2c11|223344556677885f5f5f5f	64	gnu	cvttss2si (%rcx),%rdx
 f3480f2c11|223344556677885f5f5f5f	64	intel	cvttss2si rdx, dword ptr [rcx]
-f3480f2c11|223344556677885f5f5f5f	64	plan9	REP CVTTSS2SIQ 0(CX), DX
+f3480f2c11|223344556677885f5f5f5f	64	plan9	REP CVTTSS2SIL 0(CX), DX
 f3480f2d11|223344556677885f5f5f5f	64	gnu	cvtss2si (%rcx),%rdx
 f3480f2d11|223344556677885f5f5f5f	64	intel	cvtss2si rdx, dword ptr [rcx]
-f3480f2d11|223344556677885f5f5f5f	64	plan9	REP CVTSS2SIQ 0(CX), DX
+f3480f2d11|223344556677885f5f5f5f	64	plan9	REP CVTSS2SIL 0(CX), DX
 f3480fae11|223344556677885f5f5f5f	64	gnu	wrfsbaseq (%rcx)
 f3480fae11|223344556677885f5f5f5f	64	intel	wrfsbase qword ptr [rcx]
 f3480fae11|223344556677885f5f5f5f	64	plan9	REP WRFSBASE 0(CX)
@@ -6591,40 +6593,40 @@
 f5|11223344556677885f5f5f5f5f5f5f	64	intel	cmc
 f5|11223344556677885f5f5f5f5f5f5f	64	plan9	CMC
 f60011|223344556677885f5f5f5f5f5f	32	intel	test byte ptr [eax], 0x11
-f60011|223344556677885f5f5f5f5f5f	32	plan9	TESTL $0x11, 0(AX)
+f60011|223344556677885f5f5f5f5f5f	32	plan9	TESTB $0x11, 0(AX)
 f60011|223344556677885f5f5f5f5f5f	64	gnu	testb $0x11,(%rax)
 f60011|223344556677885f5f5f5f5f5f	64	intel	test byte ptr [rax], 0x11
-f60011|223344556677885f5f5f5f5f5f	64	plan9	TESTL $0x11, 0(AX)
+f60011|223344556677885f5f5f5f5f5f	64	plan9	TESTB $0x11, 0(AX)
 f611|223344556677885f5f5f5f5f5f5f	32	intel	not byte ptr [ecx]
-f611|223344556677885f5f5f5f5f5f5f	32	plan9	NOTL 0(CX)
+f611|223344556677885f5f5f5f5f5f5f	32	plan9	NOTB 0(CX)
 f611|223344556677885f5f5f5f5f5f5f	64	gnu	notb (%rcx)
 f611|223344556677885f5f5f5f5f5f5f	64	intel	not byte ptr [rcx]
-f611|223344556677885f5f5f5f5f5f5f	64	plan9	NOTL 0(CX)
+f611|223344556677885f5f5f5f5f5f5f	64	plan9	NOTB 0(CX)
 f618|11223344556677885f5f5f5f5f5f	32	intel	neg byte ptr [eax]
-f618|11223344556677885f5f5f5f5f5f	32	plan9	NEGL 0(AX)
+f618|11223344556677885f5f5f5f5f5f	32	plan9	NEGB 0(AX)
 f618|11223344556677885f5f5f5f5f5f	64	gnu	negb (%rax)
 f618|11223344556677885f5f5f5f5f5f	64	intel	neg byte ptr [rax]
-f618|11223344556677885f5f5f5f5f5f	64	plan9	NEGL 0(AX)
+f618|11223344556677885f5f5f5f5f5f	64	plan9	NEGB 0(AX)
 f620|11223344556677885f5f5f5f5f5f	32	intel	mul byte ptr [eax]
-f620|11223344556677885f5f5f5f5f5f	32	plan9	MULL 0(AX)
+f620|11223344556677885f5f5f5f5f5f	32	plan9	MULB 0(AX)
 f620|11223344556677885f5f5f5f5f5f	64	gnu	mulb (%rax)
 f620|11223344556677885f5f5f5f5f5f	64	intel	mul byte ptr [rax]
-f620|11223344556677885f5f5f5f5f5f	64	plan9	MULL 0(AX)
+f620|11223344556677885f5f5f5f5f5f	64	plan9	MULB 0(AX)
 f628|11223344556677885f5f5f5f5f5f	32	intel	imul byte ptr [eax]
-f628|11223344556677885f5f5f5f5f5f	32	plan9	IMULL 0(AX)
+f628|11223344556677885f5f5f5f5f5f	32	plan9	IMULB 0(AX)
 f628|11223344556677885f5f5f5f5f5f	64	gnu	imulb (%rax)
 f628|11223344556677885f5f5f5f5f5f	64	intel	imul byte ptr [rax]
-f628|11223344556677885f5f5f5f5f5f	64	plan9	IMULL 0(AX)
+f628|11223344556677885f5f5f5f5f5f	64	plan9	IMULB 0(AX)
 f630|11223344556677885f5f5f5f5f5f	32	intel	div byte ptr [eax]
-f630|11223344556677885f5f5f5f5f5f	32	plan9	DIVL 0(AX)
+f630|11223344556677885f5f5f5f5f5f	32	plan9	DIVB 0(AX)
 f630|11223344556677885f5f5f5f5f5f	64	gnu	divb (%rax)
 f630|11223344556677885f5f5f5f5f5f	64	intel	div byte ptr [rax]
-f630|11223344556677885f5f5f5f5f5f	64	plan9	DIVL 0(AX)
+f630|11223344556677885f5f5f5f5f5f	64	plan9	DIVB 0(AX)
 f638|11223344556677885f5f5f5f5f5f	32	intel	idiv byte ptr [eax]
-f638|11223344556677885f5f5f5f5f5f	32	plan9	IDIVL 0(AX)
+f638|11223344556677885f5f5f5f5f5f	32	plan9	IDIVB 0(AX)
 f638|11223344556677885f5f5f5f5f5f	64	gnu	idivb (%rax)
 f638|11223344556677885f5f5f5f5f5f	64	intel	idiv byte ptr [rax]
-f638|11223344556677885f5f5f5f5f5f	64	plan9	IDIVL 0(AX)
+f638|11223344556677885f5f5f5f5f5f	64	plan9	IDIVB 0(AX)
 f70011223344|556677885f5f5f5f5f5f	32	intel	test dword ptr [eax], 0x44332211
 f70011223344|556677885f5f5f5f5f5f	32	plan9	TESTL $0x44332211, 0(AX)
 f70011223344|556677885f5f5f5f5f5f	64	gnu	testl $0x44332211,(%rax)
@@ -6691,15 +6693,15 @@
 fd|11223344556677885f5f5f5f5f5f5f	64	intel	std
 fd|11223344556677885f5f5f5f5f5f5f	64	plan9	STD
 fe00|11223344556677885f5f5f5f5f5f	32	intel	inc byte ptr [eax]
-fe00|11223344556677885f5f5f5f5f5f	32	plan9	INCL 0(AX)
+fe00|11223344556677885f5f5f5f5f5f	32	plan9	INCB 0(AX)
 fe00|11223344556677885f5f5f5f5f5f	64	gnu	incb (%rax)
 fe00|11223344556677885f5f5f5f5f5f	64	intel	inc byte ptr [rax]
-fe00|11223344556677885f5f5f5f5f5f	64	plan9	INCL 0(AX)
+fe00|11223344556677885f5f5f5f5f5f	64	plan9	INCB 0(AX)
 fe08|11223344556677885f5f5f5f5f5f	32	intel	dec byte ptr [eax]
-fe08|11223344556677885f5f5f5f5f5f	32	plan9	DECL 0(AX)
+fe08|11223344556677885f5f5f5f5f5f	32	plan9	DECB 0(AX)
 fe08|11223344556677885f5f5f5f5f5f	64	gnu	decb (%rax)
 fe08|11223344556677885f5f5f5f5f5f	64	intel	dec byte ptr [rax]
-fe08|11223344556677885f5f5f5f5f5f	64	plan9	DECL 0(AX)
+fe08|11223344556677885f5f5f5f5f5f	64	plan9	DECB 0(AX)
 ff00|11223344556677885f5f5f5f5f5f	32	intel	inc dword ptr [eax]
 ff00|11223344556677885f5f5f5f5f5f	32	plan9	INCL 0(AX)
 ff00|11223344556677885f5f5f5f5f5f	64	gnu	incl (%rax)
@@ -6728,7 +6730,7 @@
 ff30|11223344556677885f5f5f5f5f5f	32	plan9	PUSHL 0(AX)
 ff30|11223344556677885f5f5f5f5f5f	64	gnu	pushq (%rax)
 ff30|11223344556677885f5f5f5f5f5f	64	intel	push qword ptr [rax]
-ff30|11223344556677885f5f5f5f5f5f	64	plan9	PUSHL 0(AX)
+ff30|11223344556677885f5f5f5f5f5f	64	plan9	PUSHQ 0(AX)
 c5fe6f06|44556677885f5f5f5f5f5f5f	32	intel	vmovdqu ymm0, ymmword ptr [esi]
 c5fe6f06|44556677885f5f5f5f5f5f5f	32	plan9	VMOVDQU 0(SI), X0
 c5fe6f06|44556677885f5f5f5f5f5f5f	32	gnu	vmovdqu (%esi),%ymm0