cmd/internal/obj/loong64: add ROTR, ROTRV instructions support
Reference: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
Change-Id: I29adb84eb70bffd963c79ed6957a5197896fb2bf
Reviewed-on: https://go-review.googlesource.com/c/go/+/422316
Run-TryBot: Wayne Zuo <wdvxdr@golangcn.org>
Reviewed-by: Ian Lance Taylor <iant@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
diff --git a/src/cmd/asm/internal/asm/testdata/loong64enc1.s b/src/cmd/asm/internal/asm/testdata/loong64enc1.s
index 3200466..83bb6ec 100644
--- a/src/cmd/asm/internal/asm/testdata/loong64enc1.s
+++ b/src/cmd/asm/internal/asm/testdata/loong64enc1.s
@@ -41,8 +41,12 @@
SRL R4, R5, R6 // a6901700
SRA R4, R5 // a5101800
SRA R4, R5, R6 // a6101800
+ ROTR R4, R5 // a5101b00
+ ROTR R4, R5, R6 // a6101b00
SLLV R4, R5 // a5901800
SLLV R4, R5, R6 // a6901800
+ ROTRV R4, R5 // a5901b00
+ ROTRV R4, R5, R6 // a6901b00
CLO R4, R5 // 85100000
CLZ R4, R5 // 85140000
ADDF F4, F5 // a5900001
@@ -102,8 +106,12 @@
SRL $4, R4 // 84904400
SRA $4, R4, R5 // 85904800
SRA $4, R4 // 84904800
+ ROTR $4, R4, R5 // 85904c00
+ ROTR $4, R4 // 84904c00
SLLV $4, R4, R5 // 85104100
SLLV $4, R4 // 84104100
+ ROTRV $4, R4, R5 // 85104d00
+ ROTRV $4, R4 // 84104d00
SYSCALL // 00002b00
BEQ R4, R5, 1(PC) // 85040058
BEQ R4, 1(PC) // 80040058
diff --git a/src/cmd/internal/obj/loong64/a.out.go b/src/cmd/internal/obj/loong64/a.out.go
index f57d167..88bf714 100644
--- a/src/cmd/internal/obj/loong64/a.out.go
+++ b/src/cmd/internal/obj/loong64/a.out.go
@@ -335,6 +335,7 @@
ASQRTF
ASRA
ASRL
+ AROTR
ASUB
ASUBD
ASUBF
@@ -362,6 +363,7 @@
ASLLV
ASRAV
ASRLV
+ AROTRV
ADIVV
ADIVVU
diff --git a/src/cmd/internal/obj/loong64/anames.go b/src/cmd/internal/obj/loong64/anames.go
index c1dcb5b..20e7465 100644
--- a/src/cmd/internal/obj/loong64/anames.go
+++ b/src/cmd/internal/obj/loong64/anames.go
@@ -88,6 +88,7 @@
"SQRTF",
"SRA",
"SRL",
+ "ROTR",
"SUB",
"SUBD",
"SUBF",
@@ -107,6 +108,7 @@
"SLLV",
"SRAV",
"SRLV",
+ "ROTRV",
"DIVV",
"DIVVU",
"REMV",
diff --git a/src/cmd/internal/obj/loong64/asm.go b/src/cmd/internal/obj/loong64/asm.go
index 7b46f3c..2ac4d3e 100644
--- a/src/cmd/internal/obj/loong64/asm.go
+++ b/src/cmd/internal/obj/loong64/asm.go
@@ -980,10 +980,12 @@
case ASLL:
opset(ASRL, r0)
opset(ASRA, r0)
+ opset(AROTR, r0)
case ASLLV:
opset(ASRAV, r0)
opset(ASRLV, r0)
+ opset(AROTRV, r0)
case ASUB:
opset(ASUBU, r0)
@@ -1653,12 +1655,16 @@
return 0x2f << 15
case ASRA:
return 0x30 << 15
+ case AROTR:
+ return 0x36 << 15
case ASLLV:
return 0x31 << 15
case ASRLV:
return 0x32 << 15
case ASRAV:
return 0x33 << 15
+ case AROTRV:
+ return 0x37 << 15
case AADDV:
return 0x21 << 15
case AADDVU:
@@ -1845,6 +1851,8 @@
return 0x00089 << 15
case ASRA:
return 0x00091 << 15
+ case AROTR:
+ return 0x00099 << 15
case AADDV:
return 0x00b << 22
case AADDVU:
@@ -1939,6 +1947,9 @@
case ASRAV,
-ASRAV:
return 0x0049 << 16
+ case AROTRV,
+ -AROTRV:
+ return 0x004d << 16
case -ALL:
return 0x020 << 24
case -ALLV:
@@ -1961,7 +1972,8 @@
switch a {
case ASLLV,
ASRLV,
- ASRAV:
+ ASRAV,
+ AROTRV:
return true
}
return false
