commit b19d1a73c7d6d5f0aa59f060561421b7ccdaedaf
author Ben Shi <powerman1st@163.com> Mon Jul 10 07:27:41 2017 +0000
committer Cherry Zhang <cherryyz@google.com> Mon Jul 10 10:57:12 2017 +0000
tree b6379c869b44930c09d746e1dc5f57be60db4f25
parent 0f7de0481c140060c1c1133aeb5d2b708cb124d6

arm/armasm: fix wrong register order in SMLABT/SMLATB/SMLATT/SMLAD/SMLSD

SMLABT/SMLATB/SMLATT/SMLAD/SMLSD are MLA(mul&add) like instructions,
which need the third register to be the addend. But currently the addend
is placed in the first position in the decoded register list.

This patch fixes it and adds corresponding tests.

Change-Id: I57f3e96876c54497badf1a12ae7dae18fe6fcc11
Reviewed-on: https://go-review.googlesource.com/47890
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>