arm64/arm64asm: adjust the disassembly codes of FMOVQ/FLDP/FSTP

Currently FMOVQ, FLDP and FSTP are objdumped as MOVD, LDP and STP, and the
floating point register arguments of these instructions are objdumped as
"V" register format. This CL makes the disassembly formats of these instructions
consistent with their assembly formats.

Besides Go has no LDUR and VLDUR instructions, but the disassembler objdumps
MOVD as LDUR and VLDUR in some cases, this CL changes the disassembly format
of the arm64 LDUR instruction as MOVD, MOVW or FMOV{B,H,S,D,Q}.

Change-Id: I0f964db422c9c42929e639528ac2c0c4adcfee37
Reviewed-on: https://go-review.googlesource.com/c/arch/+/300729
Reviewed-by: eric fang <eric.fang@arm.com>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Trust: eric fang <eric.fang@arm.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Go Bot <gobot@golang.org>
2 files changed
tree: eb22bfe63cdf4ddae12d0cf5ba486668542ff7fd
  1. AUTHORS
  2. CONTRIBUTING.md
  3. CONTRIBUTORS
  4. LICENSE
  5. PATENTS
  6. README.md
  7. arm/
  8. arm64/
  9. codereview.cfg
  10. go.mod
  11. go.sum
  12. ppc64/
  13. x86/
README.md

arch

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