commit | d48d9c4a19f675a8a8d73d667eda85015faf1ace | [log] [tgz] |
---|---|---|
author | Paul E. Murphy <murp@ibm.com> | Tue Dec 01 11:50:12 2020 -0600 |
committer | Lynn Boger <laboger@linux.vnet.ibm.com> | Wed Mar 24 14:21:54 2021 +0000 |
tree | 90a8de41656c9bc94ffbc2697af69c4426f3bf4e | |
parent | ea130f1b0a00e959b082751b4a4b151514cc3646 [diff] |
ppc64asm,ppc64map: update for ISA 3.1 Likewise, add all missing ISA 3.0 instructions. This table is generated in a two-step process. 1. Parse ISA 3.1 Appendix F. 2. Scan ISA for descriptions 3. Sort to match old ISA (and check for bugs) and append new insn to bottom A second patch will reformat these instructions into a sorting order of the ISA 3.1 appendix F, that is by version then alphabetically. This intermediate patch ensures we don't regress, and helped catch quite a few ISA 3.1 typos. The tooling is left in another repo, and is loosely based on the spec.go tooling for ppc64. Notably, transaction memory instructions are effectively removed in ISA 3.1, and some shuffling of descriptions has result in cmp*/li/lis becoming extended mnemonics instead, thus they go away. VLE/SPE/embedded instructions are also removed. They were never used, and have been removed since ISA 3.0. Similarly, the new ISA introduces prefixed instructions using opcode 1. They are encoded like two instruction words. However, it should be noted prefixes cannot be applied to any instruction, only those specifically enumerated in the documentation. Likewise, what would be the primary opcode of the suffixed instruction is not always identical to it's non-prefixed counterpart. A number of small changes have been made to the parser to accomodate new instructions and minor changes to existing ones. Note, DCBI was a book iii-e instruction in ISA 2.07, and only emulated on P8, and the opcode is reserved in newer ISAs. Note, isel BI decoding is slightly different than gnu. It is much more readable to decode like other condition register BI fields. Similarly, paste. and mtfsf* like instruction decoding is improved to match the newer ISA. Note, book ii extended mnemonics are mostly ignored. These are inconsistently described in the documentation, and most should never appear in golang compiled code. We do handle the exceptional cases for some, such as the hwsync/lwsync and the l*arx instructions. Change-Id: I41711807a5fbdbdd22a2bde4159a09dad5382691 Reviewed-on: https://go-review.googlesource.com/c/arch/+/298793 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Reviewed-by: Carlos Eduardo Seo <carlos.seo@linaro.org> Trust: Carlos Eduardo Seo <carlos.seo@linaro.org>
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