riscv64: add support for RVV 1.0 instructions

Add support for the dissassembly of RVV 1.0 instructions and a lot of
test cases.  The test cases are based on the test cases found in
go/src/cmd/asm/internal/asm/testdata/riscv64.s in the main go repo.

We rename arg_rs1_amo, an argument that represents a pointer without
an offset, to arg_rs1_ptr so it can be reused by the vector
instructions.

Change-Id: Icd7ec2e853fe03f94aac35698f44e1aeaac2edae
Reviewed-on: https://go-review.googlesource.com/c/arch/+/670876
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Joel Sing <joel@sing.id.au>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Mark Freeman <markfreeman@google.com>
11 files changed
tree: a0c540de6736615343c5056e368e218c58f7c402
  1. arm/
  2. arm64/
  3. loong64/
  4. ppc64/
  5. riscv64/
  6. s390x/
  7. x86/
  8. codereview.cfg
  9. CONTRIBUTING.md
  10. go.mod
  11. go.sum
  12. LICENSE
  13. PATENTS
  14. README.md
README.md

arch

Go Reference

This repository holds machine architecture information used by the Go toolchain. The parts needed in the main Go repository are copied in.

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This repository uses Gerrit for code changes. To learn how to submit changes to this repository, see https://go.dev/doc/contribute.

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