arm64/instgen: support memory with extensions in SVE

This CL generates CL 764780.

Supported addressing patterns:
(Z7.D.SXTW<<2)(Z6.D), where Z6.D is the base, Z7.D is the indices.
SXTW/UXTW represents signed/unsigned extension, << represents LSL.

Change-Id: Id79c8534d140a1d36ee12f80e8294486cac0c236
Reviewed-on: https://go-review.googlesource.com/c/arch/+/764800
Commit-Queue: Junyang Shao <shaojunyang@google.com>
Reviewed-by: David Chase <drchase@google.com>
LUCI-TryBot-Result: golang-scoped@luci-project-accounts.iam.gserviceaccount.com <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
3 files changed
tree: 3fabcde351c855864fae0a111c64ecdae0574204
  1. arm/
  2. arm64/
  3. loong64/
  4. ppc64/
  5. riscv64/
  6. s390x/
  7. x86/
  8. codereview.cfg
  9. CONTRIBUTING.md
  10. go.mod
  11. go.sum
  12. LICENSE
  13. PATENTS
  14. README.md
README.md

arch

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This repository holds machine architecture information used by the Go toolchain. The parts needed in the main Go repository are copied in.

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