arm64/instgen: support memory with extensions in SVE This CL generates CL 764780. Supported addressing patterns: (Z7.D.SXTW<<2)(Z6.D), where Z6.D is the base, Z7.D is the indices. SXTW/UXTW represents signed/unsigned extension, << represents LSL. Change-Id: Id79c8534d140a1d36ee12f80e8294486cac0c236 Reviewed-on: https://go-review.googlesource.com/c/arch/+/764800 Commit-Queue: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: golang-scoped@luci-project-accounts.iam.gserviceaccount.com <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
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