ppc64/ppc64map: add encoder functionality

Use the ISA information to generate bits for supporting ISA 3.1
(POWER10) instructions. This creates a new file asm9_gtables.go
to allow assembly of instructions defined in pp64.csv.

This uses the input pp64.csv file to generate an encoding function
for each "type" of instruction. Some encoder functions can be
shared (e.x fpr/gpr/vsr opcodes which share similar encoding). These
are named based on the oldest instruction which uses the function,
like "type_xxspltiw".

All functions share two tables which store the fixed bits of an
instruction. Non-prefixed instructions use GenOpcodes exclusively,
prefixed opcodes use the GenPfxOpcodes table to hold the suffix
instruction word bits. These are used to populate the instruction
specific encoding bits for a particular type.

Likewise, the function opsetGen is created to map opcodes which share
identical argument types. This plugs into the buildop function in
asm9.go.

Change-Id: I50cddfcec86b667774af858fb8efe8910dfe80b8
Reviewed-on: https://go-review.googlesource.com/c/arch/+/350609
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Run-TryBot: Paul Murphy <murp@ibm.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Heschi Kreinick <heschi@google.com>
1 file changed
tree: e204517cec256c0ac217ccab945cd3b91ce92a9b
  1. arm/
  2. arm64/
  3. ppc64/
  4. x86/
  5. codereview.cfg
  6. CONTRIBUTING.md
  7. go.mod
  8. go.sum
  9. LICENSE
  10. PATENTS
  11. README.md
README.md

arch

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